1 /* $NetBSD: if_re_cardbus.c,v 1.19 2009/08/29 14:18:34 tsutsui Exp $ */
4 * Copyright (c) 2004 Jonathan Stone
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 * Cardbus specific routines for Realtek 8169 ethernet adapter.
34 * Netgear GA-511 (8169S)
38 #include <sys/cdefs.h>
39 __KERNEL_RCSID(0, "$NetBSD: if_re_cardbus.c,v 1.19 2009/08/29 14:18:34 tsutsui Exp $");
41 #include <sys/param.h>
42 #include <sys/systm.h>
43 #include <sys/device.h>
46 #include <net/if_ether.h>
47 #include <net/if_media.h>
51 #include <dev/pci/pcireg.h>
52 #include <dev/pci/pcivar.h>
53 #include <dev/pci/pcidevs.h>
55 #include <dev/cardbus/cardbusvar.h>
57 #include <dev/mii/mii.h>
58 #include <dev/mii/miivar.h>
61 * Default to using PIO access for this driver. On SMP systems,
62 * there appear to be problems with memory mapped mode: it looks like
63 * doing too many memory mapped access back to back in rapid succession
64 * can hang the bus. I'm inclined to blame this on crummy design/construction
65 * on the part of Realtek. Memory mapped mode does appear to work on
66 * uniprocessor systems though.
68 #define RTK_USEIOSPACE
70 #include <dev/ic/rtl81x9reg.h>
71 #include <dev/ic/rtl81x9var.h>
73 #include <dev/ic/rtl8169var.h>
76 * Various supported device vendors/types and their names.
78 static const struct rtk_type re_cardbus_devs
[] = {
79 { PCI_VENDOR_REALTEK
, PCI_PRODUCT_REALTEK_RT8169
,
80 RTK_8169
, "Realtek 10/100/1000baseT" },
84 static int re_cardbus_match(device_t
, cfdata_t
, void *);
85 static void re_cardbus_attach(device_t
, device_t
, void *);
86 static int re_cardbus_detach(device_t
, int);
88 struct re_cardbus_softc
{
89 struct rtk_softc sc_rtk
; /* real rtk softc */
91 /* CardBus-specific goo. */
93 cardbus_devfunc_t sc_ct
;
99 bus_size_t sc_mapsize
;
100 cardbus_intr_line_t sc_intrline
;
103 CFATTACH_DECL_NEW(re_cardbus
, sizeof(struct re_cardbus_softc
),
104 re_cardbus_match
, re_cardbus_attach
, re_cardbus_detach
, re_activate
);
106 const struct rtk_type
*re_cardbus_lookup(const struct cardbus_attach_args
*);
108 void re_cardbus_setup(struct re_cardbus_softc
*);
110 int re_cardbus_enable(struct rtk_softc
*);
111 void re_cardbus_disable(struct rtk_softc
*);
113 const struct rtk_type
*
114 re_cardbus_lookup(const struct cardbus_attach_args
*ca
)
116 const struct rtk_type
*t
;
118 for (t
= re_cardbus_devs
; t
->rtk_name
!= NULL
; t
++) {
119 if (CARDBUS_VENDOR(ca
->ca_id
) == t
->rtk_vid
&&
120 CARDBUS_PRODUCT(ca
->ca_id
) == t
->rtk_did
) {
128 re_cardbus_match(device_t parent
, cfdata_t cf
, void *aux
)
130 struct cardbus_attach_args
*ca
= aux
;
132 if (re_cardbus_lookup(ca
) != NULL
)
140 re_cardbus_attach(device_t parent
, device_t self
, void *aux
)
142 struct re_cardbus_softc
*csc
= device_private(self
);
143 struct rtk_softc
*sc
= &csc
->sc_rtk
;
144 struct cardbus_attach_args
*ca
= aux
;
145 cardbus_devfunc_t ct
= ca
->ca_ct
;
146 const struct rtk_type
*t
;
150 sc
->sc_dmat
= ca
->ca_dmat
;
152 csc
->sc_tag
= ca
->ca_tag
;
153 csc
->sc_intrline
= ca
->ca_intrline
;
155 t
= re_cardbus_lookup(ca
);
158 panic("%s: impossible", __func__
);
160 aprint_normal(": %s\n", t
->rtk_name
);
163 * Power management hooks.
165 sc
->sc_enable
= re_cardbus_enable
;
166 sc
->sc_disable
= re_cardbus_disable
;
169 * Map control/status registers.
171 csc
->sc_csr
= CARDBUS_COMMAND_MASTER_ENABLE
;
172 #ifdef RTK_USEIOSPACE
173 if (Cardbus_mapreg_map(ct
, RTK_PCI_LOIO
, CARDBUS_MAPREG_TYPE_IO
, 0,
174 &sc
->rtk_btag
, &sc
->rtk_bhandle
, &adr
, &csc
->sc_mapsize
) == 0) {
177 (*ct
->ct_cf
->cardbus_io_open
)(cc
, 0, adr
, adr
+csc
->sc_mapsize
);
179 csc
->sc_cben
= CARDBUS_IO_ENABLE
;
180 csc
->sc_csr
|= CARDBUS_COMMAND_IO_ENABLE
;
181 csc
->sc_bar_reg
= RTK_PCI_LOIO
;
182 csc
->sc_bar_val
= adr
| CARDBUS_MAPREG_TYPE_IO
;
185 if (Cardbus_mapreg_map(ct
, RTK_PCI_LOMEM
, CARDBUS_MAPREG_TYPE_MEM
, 0,
186 &sc
->rtk_btag
, &sc
->rtk_bhandle
, &adr
, &csc
->sc_mapsize
) == 0) {
189 (*ct
->ct_cf
->cardbus_mem_open
)(cc
, 0, adr
, adr
+csc
->sc_mapsize
);
191 csc
->sc_cben
= CARDBUS_MEM_ENABLE
;
192 csc
->sc_csr
|= CARDBUS_COMMAND_MEM_ENABLE
;
193 csc
->sc_bar_reg
= RTK_PCI_LOMEM
;
194 csc
->sc_bar_val
= adr
| CARDBUS_MAPREG_TYPE_MEM
;
198 aprint_error_dev(self
, "unable to map deviceregisters\n");
202 * Handle power management nonsense and initialize the
203 * configuration registers.
205 re_cardbus_setup(csc
);
207 sc
->sc_dmat
= ca
->ca_dmat
;
211 * Power down the socket.
213 Cardbus_function_disable(csc
->sc_ct
);
217 re_cardbus_detach(device_t self
, int flags
)
219 struct re_cardbus_softc
*csc
= device_private(self
);
220 struct rtk_softc
*sc
= &csc
->sc_rtk
;
221 struct cardbus_devfunc
*ct
= csc
->sc_ct
;
226 panic("%s: cardbus softc, cardbus_devfunc NULL",
235 * Unhook the interrupt handler.
237 if (csc
->sc_ih
!= NULL
)
238 cardbus_intr_disestablish(ct
->ct_cc
, ct
->ct_cf
, csc
->sc_ih
);
241 * Release bus space and close window.
243 if (csc
->sc_bar_reg
!= 0)
244 Cardbus_mapreg_unmap(ct
, csc
->sc_bar_reg
,
245 sc
->rtk_btag
, sc
->rtk_bhandle
, csc
->sc_mapsize
);
251 re_cardbus_setup(struct re_cardbus_softc
*csc
)
253 struct rtk_softc
*sc
= &csc
->sc_rtk
;
254 cardbus_devfunc_t ct
= csc
->sc_ct
;
255 cardbus_chipset_tag_t cc
= ct
->ct_cc
;
256 cardbus_function_tag_t cf
= ct
->ct_cf
;
257 pcireg_t reg
, command
;
261 * Handle power management nonsense.
263 if (cardbus_get_capability(cc
, cf
, csc
->sc_tag
,
264 PCI_CAP_PWRMGMT
, &pmreg
, 0)) {
265 command
= cardbus_conf_read(cc
, cf
, csc
->sc_tag
,
267 if (command
& PCI_PMCSR_STATE_MASK
) {
268 pcireg_t iobase
, membase
, irq
;
270 /* Save important PCI config data. */
271 iobase
= cardbus_conf_read(cc
, cf
, csc
->sc_tag
,
273 membase
= cardbus_conf_read(cc
, cf
,csc
->sc_tag
,
275 irq
= cardbus_conf_read(cc
, cf
,csc
->sc_tag
,
276 CARDBUS_INTERRUPT_REG
);
278 /* Reset the power state. */
279 aprint_normal_dev(sc
->sc_dev
,
280 "chip is in D%d power mode -- setting to D0\n",
281 command
& PCI_PMCSR_STATE_MASK
);
282 command
&= ~PCI_PMCSR_STATE_MASK
;
283 cardbus_conf_write(cc
, cf
, csc
->sc_tag
,
284 pmreg
+ PCI_PMCSR
, command
);
286 /* Restore PCI config data. */
287 cardbus_conf_write(cc
, cf
, csc
->sc_tag
,
288 RTK_PCI_LOIO
, iobase
);
289 cardbus_conf_write(cc
, cf
, csc
->sc_tag
,
290 RTK_PCI_LOMEM
, membase
);
291 cardbus_conf_write(cc
, cf
, csc
->sc_tag
,
292 CARDBUS_INTERRUPT_REG
, irq
);
296 /* Program the BAR */
297 cardbus_conf_write(cc
, cf
, csc
->sc_tag
,
298 csc
->sc_bar_reg
, csc
->sc_bar_val
);
300 /* Make sure the right access type is on the CardBus bridge. */
301 (*ct
->ct_cf
->cardbus_ctrl
)(cc
, csc
->sc_cben
);
302 (*ct
->ct_cf
->cardbus_ctrl
)(cc
, CARDBUS_BM_ENABLE
);
304 /* Enable the appropriate bits in the CARDBUS CSR. */
305 reg
= cardbus_conf_read(cc
, cf
, csc
->sc_tag
,
306 CARDBUS_COMMAND_STATUS_REG
);
307 reg
&= ~(CARDBUS_COMMAND_IO_ENABLE
|CARDBUS_COMMAND_MEM_ENABLE
);
309 cardbus_conf_write(cc
, cf
, csc
->sc_tag
,
310 CARDBUS_COMMAND_STATUS_REG
, reg
);
313 * Make sure the latency timer is set to some reasonable
316 reg
= cardbus_conf_read(cc
, cf
, csc
->sc_tag
, CARDBUS_BHLC_REG
);
317 if (CARDBUS_LATTIMER(reg
) < 0x40) {
318 reg
&= ~(CARDBUS_LATTIMER_MASK
<< CARDBUS_LATTIMER_SHIFT
);
319 reg
|= (0x40 << CARDBUS_LATTIMER_SHIFT
);
320 cardbus_conf_write(cc
, cf
, csc
->sc_tag
, CARDBUS_BHLC_REG
, reg
);
325 re_cardbus_enable(struct rtk_softc
*sc
)
327 struct re_cardbus_softc
*csc
= (struct re_cardbus_softc
*)sc
;
328 cardbus_devfunc_t ct
= csc
->sc_ct
;
329 cardbus_chipset_tag_t cc
= ct
->ct_cc
;
330 cardbus_function_tag_t cf
= ct
->ct_cf
;
333 * Power on the socket.
335 Cardbus_function_enable(ct
);
338 * Set up the PCI configuration registers.
340 re_cardbus_setup(csc
);
343 * Map and establish the interrupt.
345 csc
->sc_ih
= cardbus_intr_establish(cc
, cf
, csc
->sc_intrline
,
346 IPL_NET
, re_intr
, sc
);
347 if (csc
->sc_ih
== NULL
) {
348 aprint_error_dev(sc
->sc_dev
,
349 "unable to establish interrupt\n");
350 Cardbus_function_disable(csc
->sc_ct
);
357 re_cardbus_disable(struct rtk_softc
*sc
)
359 struct re_cardbus_softc
*csc
= (struct re_cardbus_softc
*)sc
;
360 cardbus_devfunc_t ct
= csc
->sc_ct
;
361 cardbus_chipset_tag_t cc
= ct
->ct_cc
;
362 cardbus_function_tag_t cf
= ct
->ct_cf
;
364 /* Unhook the interrupt handler. */
365 cardbus_intr_disestablish(cc
, cf
, csc
->sc_ih
);
368 /* Power down the socket. */
369 Cardbus_function_disable(ct
);