1 /* $NetBSD: if_rtk_cardbus.c,v 1.37 2008/06/24 19:44:52 drochner Exp $ */
4 * Copyright (c) 2000 Masanori Kanaoka
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 * Cardbus specific routines for Realtek 8139 ethernet adapter.
34 * - elecom-Laneed LD-10/100CBA (Accton MPX5030)
35 * - MELCO LPC3-TX-CB (Realtek 8139)
38 #include <sys/cdefs.h>
39 __KERNEL_RCSID(0, "$NetBSD: if_rtk_cardbus.c,v 1.37 2008/06/24 19:44:52 drochner Exp $");
45 #include <sys/param.h>
46 #include <sys/systm.h>
47 #include <sys/callout.h>
48 #include <sys/device.h>
49 #include <sys/sockio.h>
51 #include <sys/malloc.h>
52 #include <sys/kernel.h>
53 #include <sys/socket.h>
56 #include <net/if_arp.h>
57 #include <net/if_ether.h>
58 #include <net/if_dl.h>
59 #include <net/if_media.h>
61 #include <netinet/in.h>
62 #include <netinet/if_inarp.h>
74 #include <dev/pci/pcireg.h>
75 #include <dev/pci/pcivar.h>
76 #include <dev/pci/pcidevs.h>
78 #include <dev/cardbus/cardbusvar.h>
79 #include <dev/pci/pcidevs.h>
81 #include <dev/mii/mii.h>
82 #include <dev/mii/miivar.h>
85 * Default to using PIO access for this driver. On SMP systems,
86 * there appear to be problems with memory mapped mode: it looks like
87 * doing too many memory mapped access back to back in rapid succession
88 * can hang the bus. I'm inclined to blame this on crummy design/construction
89 * on the part of Realtek. Memory mapped mode does appear to work on
90 * uniprocessor systems though.
92 #define RTK_USEIOSPACE
94 #include <dev/ic/rtl81x9reg.h>
95 #include <dev/ic/rtl81x9var.h>
98 * Various supported device vendors/types and their names.
100 static const struct rtk_type rtk_cardbus_devs
[] = {
101 { PCI_VENDOR_ACCTON
, PCI_PRODUCT_ACCTON_MPX5030
,
102 RTK_8139
, "Accton MPX 5030/5038 10/100BaseTX" },
103 { PCI_VENDOR_DLINK
, PCI_PRODUCT_DLINK_DFE690TXD
,
104 RTK_8139
, "D-Link DFE-690TXD 10/100BaseTX" },
105 { PCI_VENDOR_REALTEK
, PCI_PRODUCT_REALTEK_RT8138
,
106 RTK_8139
, "Realtek 8138 10/100BaseTX" },
107 { PCI_VENDOR_REALTEK
, PCI_PRODUCT_REALTEK_RT8139
,
108 RTK_8139
, "Realtek 8139 10/100BaseTX" },
109 { PCI_VENDOR_COREGA
, PCI_PRODUCT_COREGA_CB_TXD
,
110 RTK_8139
, "Corega FEther CB-TXD 10/100BaseTX" },
111 { PCI_VENDOR_COREGA
, PCI_PRODUCT_COREGA_2CB_TXD
,
112 RTK_8139
, "Corega FEther II CB-TXD 10/100BaseTX" },
113 { PCI_VENDOR_PLANEX
, PCI_PRODUCT_PLANEX_FNW_3603_TX
,
114 RTK_8139
, "Planex FNW-3603 10/100BaseTX" },
115 { PCI_VENDOR_PLANEX
, PCI_PRODUCT_PLANEX_FNW_3800_TX
,
116 RTK_8139
, "Planex 10/100BaseTX FNW-3800-TX" },
117 { PCI_VENDOR_ABOCOM
, PCI_PRODUCT_ABOCOM_FE2000VX
,
118 RTK_8139
, "AboCom FE2000VX 10/100BaseTX" },
123 static int rtk_cardbus_match(device_t
, cfdata_t
, void *);
124 static void rtk_cardbus_attach(device_t
, device_t
, void *);
125 static int rtk_cardbus_detach(device_t
, int);
127 struct rtk_cardbus_softc
{
128 struct rtk_softc sc_rtk
; /* real rtk softc */
130 /* CardBus-specific goo. */
132 cardbus_devfunc_t sc_ct
;
138 bus_size_t sc_mapsize
;
139 cardbus_intr_line_t sc_intrline
;
142 CFATTACH_DECL_NEW(rtk_cardbus
, sizeof(struct rtk_cardbus_softc
),
143 rtk_cardbus_match
, rtk_cardbus_attach
, rtk_cardbus_detach
, rtk_activate
);
145 const struct rtk_type
*rtk_cardbus_lookup(const struct cardbus_attach_args
*);
147 void rtk_cardbus_setup(struct rtk_cardbus_softc
*);
149 int rtk_cardbus_enable(struct rtk_softc
*);
150 void rtk_cardbus_disable(struct rtk_softc
*);
151 void rtk_cardbus_power(struct rtk_softc
*, int);
153 const struct rtk_type
*
154 rtk_cardbus_lookup(const struct cardbus_attach_args
*ca
)
156 const struct rtk_type
*t
;
158 for (t
= rtk_cardbus_devs
; t
->rtk_name
!= NULL
; t
++){
159 if (CARDBUS_VENDOR(ca
->ca_id
) == t
->rtk_vid
&&
160 CARDBUS_PRODUCT(ca
->ca_id
) == t
->rtk_did
) {
168 rtk_cardbus_match(device_t parent
, cfdata_t cf
, void *aux
)
170 struct cardbus_attach_args
*ca
= aux
;
172 if (rtk_cardbus_lookup(ca
) != NULL
)
180 rtk_cardbus_attach(device_t parent
, device_t self
, void *aux
)
182 struct rtk_cardbus_softc
*csc
= device_private(self
);
183 struct rtk_softc
*sc
= &csc
->sc_rtk
;
184 struct cardbus_attach_args
*ca
= aux
;
185 cardbus_devfunc_t ct
= ca
->ca_ct
;
186 const struct rtk_type
*t
;
190 sc
->sc_dmat
= ca
->ca_dmat
;
192 csc
->sc_tag
= ca
->ca_tag
;
193 csc
->sc_intrline
= ca
->ca_intrline
;
195 t
= rtk_cardbus_lookup(ca
);
198 panic("%s: impossible", __func__
);
200 aprint_normal(": %s\n", t
->rtk_name
);
203 * Power management hooks.
205 sc
->sc_enable
= rtk_cardbus_enable
;
206 sc
->sc_disable
= rtk_cardbus_disable
;
209 * Map control/status registers.
211 csc
->sc_csr
= CARDBUS_COMMAND_MASTER_ENABLE
;
212 #ifdef RTK_USEIOSPACE
213 if (Cardbus_mapreg_map(ct
, RTK_PCI_LOIO
, CARDBUS_MAPREG_TYPE_IO
, 0,
214 &sc
->rtk_btag
, &sc
->rtk_bhandle
, &adr
, &csc
->sc_mapsize
) == 0) {
217 (*ct
->ct_cf
->cardbus_io_open
)(cc
, 0, adr
, adr
+csc
->sc_mapsize
);
219 csc
->sc_cben
= CARDBUS_IO_ENABLE
;
220 csc
->sc_csr
|= CARDBUS_COMMAND_IO_ENABLE
;
221 csc
->sc_bar_reg
= RTK_PCI_LOIO
;
222 csc
->sc_bar_val
= adr
| CARDBUS_MAPREG_TYPE_IO
;
225 if (Cardbus_mapreg_map(ct
, RTK_PCI_LOMEM
, CARDBUS_MAPREG_TYPE_MEM
, 0,
226 &sc
->rtk_btag
, &sc
->rtk_bhandle
, &adr
, &csc
->sc_mapsize
) == 0) {
229 (*ct
->ct_cf
->cardbus_mem_open
)(cc
, 0, adr
, adr
+csc
->sc_mapsize
);
231 csc
->sc_cben
= CARDBUS_MEM_ENABLE
;
232 csc
->sc_csr
|= CARDBUS_COMMAND_MEM_ENABLE
;
233 csc
->sc_bar_reg
= RTK_PCI_LOMEM
;
234 csc
->sc_bar_val
= adr
| CARDBUS_MAPREG_TYPE_MEM
;
238 aprint_error_dev(self
, " unable to map deviceregisters\n");
242 * Handle power management nonsense and initialize the
243 * configuration registers.
245 rtk_cardbus_setup(csc
);
249 if (pmf_device_register(self
, NULL
, NULL
))
250 pmf_class_network_register(self
, &sc
->ethercom
.ec_if
);
252 aprint_error_dev(self
, "couldn't establish power handler\n");
255 * Power down the socket.
257 Cardbus_function_disable(csc
->sc_ct
);
261 rtk_cardbus_detach(device_t self
, int flags
)
263 struct rtk_cardbus_softc
*csc
= device_private(self
);
264 struct rtk_softc
*sc
= &csc
->sc_rtk
;
265 struct cardbus_devfunc
*ct
= csc
->sc_ct
;
270 panic("%s: data structure lacks", device_xname(self
));
276 * Unhook the interrupt handler.
278 if (csc
->sc_ih
!= NULL
)
279 cardbus_intr_disestablish(ct
->ct_cc
, ct
->ct_cf
, csc
->sc_ih
);
282 * Release bus space and close window.
284 if (csc
->sc_bar_reg
!= 0)
285 Cardbus_mapreg_unmap(ct
, csc
->sc_bar_reg
,
286 sc
->rtk_btag
, sc
->rtk_bhandle
, csc
->sc_mapsize
);
292 rtk_cardbus_setup(struct rtk_cardbus_softc
*csc
)
294 struct rtk_softc
*sc
= &csc
->sc_rtk
;
295 cardbus_devfunc_t ct
= csc
->sc_ct
;
296 cardbus_chipset_tag_t cc
= ct
->ct_cc
;
297 cardbus_function_tag_t cf
= ct
->ct_cf
;
298 pcireg_t reg
, command
;
302 * Handle power management nonsense.
304 if (cardbus_get_capability(cc
, cf
, csc
->sc_tag
,
305 PCI_CAP_PWRMGMT
, &pmreg
, 0)) {
306 command
= cardbus_conf_read(cc
, cf
, csc
->sc_tag
,
308 if (command
& PCI_PMCSR_STATE_MASK
) {
309 pcireg_t iobase
, membase
, irq
;
311 /* Save important PCI config data. */
312 iobase
= cardbus_conf_read(cc
, cf
, csc
->sc_tag
,
314 membase
= cardbus_conf_read(cc
, cf
,csc
->sc_tag
,
316 irq
= cardbus_conf_read(cc
, cf
,csc
->sc_tag
,
317 CARDBUS_INTERRUPT_REG
);
319 /* Reset the power state. */
320 aprint_normal_dev(sc
->sc_dev
,
321 "chip is in D%d power mode -- setting to D0\n",
322 command
& PCI_PMCSR_STATE_MASK
);
323 command
&= ~PCI_PMCSR_STATE_MASK
;
324 cardbus_conf_write(cc
, cf
, csc
->sc_tag
,
325 pmreg
+ PCI_PMCSR
, command
);
327 /* Restore PCI config data. */
328 cardbus_conf_write(cc
, cf
, csc
->sc_tag
,
329 RTK_PCI_LOIO
, iobase
);
330 cardbus_conf_write(cc
, cf
, csc
->sc_tag
,
331 RTK_PCI_LOMEM
, membase
);
332 cardbus_conf_write(cc
, cf
, csc
->sc_tag
,
333 CARDBUS_INTERRUPT_REG
, irq
);
337 /* Program the BAR */
338 cardbus_conf_write(cc
, cf
, csc
->sc_tag
,
339 csc
->sc_bar_reg
, csc
->sc_bar_val
);
341 /* Make sure the right access type is on the CardBus bridge. */
342 (*ct
->ct_cf
->cardbus_ctrl
)(cc
, csc
->sc_cben
);
343 (*ct
->ct_cf
->cardbus_ctrl
)(cc
, CARDBUS_BM_ENABLE
);
345 /* Enable the appropriate bits in the CARDBUS CSR. */
346 reg
= cardbus_conf_read(cc
, cf
, csc
->sc_tag
,
347 CARDBUS_COMMAND_STATUS_REG
);
348 reg
&= ~(CARDBUS_COMMAND_IO_ENABLE
|CARDBUS_COMMAND_MEM_ENABLE
);
350 cardbus_conf_write(cc
, cf
, csc
->sc_tag
,
351 CARDBUS_COMMAND_STATUS_REG
, reg
);
354 * Make sure the latency timer is set to some reasonable
357 reg
= cardbus_conf_read(cc
, cf
, csc
->sc_tag
, CARDBUS_BHLC_REG
);
358 if (CARDBUS_LATTIMER(reg
) < 0x20) {
359 reg
&= ~(CARDBUS_LATTIMER_MASK
<< CARDBUS_LATTIMER_SHIFT
);
360 reg
|= (0x20 << CARDBUS_LATTIMER_SHIFT
);
361 cardbus_conf_write(cc
, cf
, csc
->sc_tag
, CARDBUS_BHLC_REG
, reg
);
366 rtk_cardbus_enable(struct rtk_softc
*sc
)
368 struct rtk_cardbus_softc
*csc
= (struct rtk_cardbus_softc
*)sc
;
369 cardbus_devfunc_t ct
= csc
->sc_ct
;
370 cardbus_chipset_tag_t cc
= ct
->ct_cc
;
371 cardbus_function_tag_t cf
= ct
->ct_cf
;
374 * Power on the socket.
376 Cardbus_function_enable(ct
);
379 * Set up the PCI configuration registers.
381 rtk_cardbus_setup(csc
);
384 * Map and establish the interrupt.
386 csc
->sc_ih
= cardbus_intr_establish(cc
, cf
, csc
->sc_intrline
,
387 IPL_NET
, rtk_intr
, sc
);
388 if (csc
->sc_ih
== NULL
) {
389 aprint_error_dev(sc
->sc_dev
,
390 "unable to establish interrupt\n");
391 Cardbus_function_disable(csc
->sc_ct
);
398 rtk_cardbus_disable(struct rtk_softc
*sc
)
400 struct rtk_cardbus_softc
*csc
= (struct rtk_cardbus_softc
*)sc
;
401 cardbus_devfunc_t ct
= csc
->sc_ct
;
402 cardbus_chipset_tag_t cc
= ct
->ct_cc
;
403 cardbus_function_tag_t cf
= ct
->ct_cf
;
405 /* Unhook the interrupt handler. */
406 cardbus_intr_disestablish(cc
, cf
, csc
->sc_ih
);
409 /* Power down the socket. */
410 Cardbus_function_disable(ct
);