Expand PMF_FN_* macros.
[netbsd-mini2440.git] / sys / dev / cardbus / if_tlp_cardbus.c
blob400125dc478af5829ca8b031f72d81355ccbaaa6
1 /* $NetBSD: if_tlp_cardbus.c,v 1.60 2009/03/14 15:36:16 dsl Exp $ */
3 /*-
4 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
34 * CardBus bus front-end for the Digital Semiconductor ``Tulip'' (21x4x)
35 * Ethernet controller family driver.
38 #include <sys/cdefs.h>
39 __KERNEL_RCSID(0, "$NetBSD: if_tlp_cardbus.c,v 1.60 2009/03/14 15:36:16 dsl Exp $");
41 #include "opt_inet.h"
42 #include "bpfilter.h"
44 #include <sys/param.h>
45 #include <sys/systm.h>
46 #include <sys/mbuf.h>
47 #include <sys/malloc.h>
48 #include <sys/kernel.h>
49 #include <sys/socket.h>
50 #include <sys/ioctl.h>
51 #include <sys/errno.h>
52 #include <sys/device.h>
54 #include <machine/endian.h>
56 #include <net/if.h>
57 #include <net/if_dl.h>
58 #include <net/if_media.h>
59 #include <net/if_ether.h>
61 #if NBPFILTER > 0
62 #include <net/bpf.h>
63 #endif
65 #ifdef INET
66 #include <netinet/in.h>
67 #include <netinet/if_inarp.h>
68 #endif
71 #include <sys/bus.h>
72 #include <sys/intr.h>
74 #include <dev/mii/miivar.h>
75 #include <dev/mii/mii_bitbang.h>
77 #include <dev/ic/tulipreg.h>
78 #include <dev/ic/tulipvar.h>
80 #include <dev/pci/pcivar.h>
81 #include <dev/pci/pcireg.h>
82 #include <dev/pci/pcidevs.h>
84 #include <dev/cardbus/cardbusvar.h>
85 #include <dev/pci/pcidevs.h>
88 * PCI configuration space registers used by the Tulip.
90 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */
91 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */
92 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */
94 #define CFDA_SLEEP 0x80000000 /* sleep mode */
95 #define CFDA_SNOOZE 0x40000000 /* snooze mode */
97 struct tulip_cardbus_softc {
98 struct tulip_softc sc_tulip; /* real Tulip softc */
100 /* CardBus-specific goo. */
101 void *sc_ih; /* interrupt handle */
102 cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */
103 cardbustag_t sc_tag; /* our CardBus tag */
104 int sc_csr; /* CSR bits */
105 bus_size_t sc_mapsize; /* the size of mapped bus space
106 region */
108 int sc_cben; /* CardBus enables */
109 int sc_bar_reg; /* which BAR to use */
110 pcireg_t sc_bar_val; /* value of the BAR */
112 cardbus_intr_line_t sc_intrline; /* interrupt line */
115 int tlp_cardbus_match(device_t, cfdata_t, void *);
116 void tlp_cardbus_attach(device_t, device_t, void *);
117 int tlp_cardbus_detach(device_t, int);
119 CFATTACH_DECL_NEW(tlp_cardbus, sizeof(struct tulip_cardbus_softc),
120 tlp_cardbus_match, tlp_cardbus_attach, tlp_cardbus_detach, tlp_activate);
122 const struct tulip_cardbus_product {
123 u_int32_t tcp_vendor; /* PCI vendor ID */
124 u_int32_t tcp_product; /* PCI product ID */
125 tulip_chip_t tcp_chip; /* base Tulip chip type */
126 } tlp_cardbus_products[] = {
127 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142,
128 TULIP_CHIP_21142 },
130 { PCI_VENDOR_XIRCOM, PCI_PRODUCT_XIRCOM_X3201_3_21143,
131 TULIP_CHIP_X3201_3 },
133 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN983,
134 TULIP_CHIP_AN985 },
136 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242,
137 TULIP_CHIP_AN985 },
139 { PCI_VENDOR_ABOCOM, PCI_PRODUCT_ABOCOM_FE2500,
140 TULIP_CHIP_AN985 },
142 { PCI_VENDOR_ABOCOM, PCI_PRODUCT_ABOCOM_PCM200,
143 TULIP_CHIP_AN985 },
145 { PCI_VENDOR_ABOCOM, PCI_PRODUCT_ABOCOM_FE2500MX,
146 TULIP_CHIP_AN985 },
148 { PCI_VENDOR_HAWKING, PCI_PRODUCT_HAWKING_PN672TX,
149 TULIP_CHIP_AN985 },
151 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN985,
152 TULIP_CHIP_AN985 },
154 { PCI_VENDOR_MICROSOFT, PCI_PRODUCT_MICROSOFT_MN120,
155 TULIP_CHIP_AN985 },
157 { PCI_VENDOR_LINKSYS, PCI_PRODUCT_LINKSYS_PCMPC200,
158 TULIP_CHIP_AN985 },
160 { 0, 0,
161 TULIP_CHIP_INVALID },
164 struct tlp_cardbus_quirks {
165 void (*tpq_func)(struct tulip_cardbus_softc *,
166 const u_int8_t *);
167 u_int8_t tpq_oui[3];
170 void tlp_cardbus_lxt_quirks(struct tulip_cardbus_softc *,
171 const u_int8_t *);
173 const struct tlp_cardbus_quirks tlp_cardbus_21142_quirks[] = {
174 { tlp_cardbus_lxt_quirks, { 0x00, 0x40, 0x05 } },
175 { NULL, { 0, 0, 0 } }
178 void tlp_cardbus_setup(struct tulip_cardbus_softc *);
180 int tlp_cardbus_enable(struct tulip_softc *);
181 void tlp_cardbus_disable(struct tulip_softc *);
182 void tlp_cardbus_power(struct tulip_softc *, int);
184 void tlp_cardbus_x3201_reset(struct tulip_softc *);
186 const struct tulip_cardbus_product *tlp_cardbus_lookup
187 (const struct cardbus_attach_args *);
188 void tlp_cardbus_get_quirks(struct tulip_cardbus_softc *,
189 const u_int8_t *, const struct tlp_cardbus_quirks *);
191 const struct tulip_cardbus_product *
192 tlp_cardbus_lookup(const struct cardbus_attach_args *ca)
194 const struct tulip_cardbus_product *tcp;
196 for (tcp = tlp_cardbus_products;
197 tlp_chip_names[tcp->tcp_chip] != NULL;
198 tcp++) {
199 if (PCI_VENDOR(ca->ca_id) == tcp->tcp_vendor &&
200 PCI_PRODUCT(ca->ca_id) == tcp->tcp_product)
201 return (tcp);
203 return (NULL);
206 void
207 tlp_cardbus_get_quirks(struct tulip_cardbus_softc *csc, const u_int8_t *enaddr, const struct tlp_cardbus_quirks *tpq)
210 for (; tpq->tpq_func != NULL; tpq++) {
211 if (tpq->tpq_oui[0] == enaddr[0] &&
212 tpq->tpq_oui[1] == enaddr[1] &&
213 tpq->tpq_oui[2] == enaddr[2]) {
214 (*tpq->tpq_func)(csc, enaddr);
215 return;
221 tlp_cardbus_match(device_t parent, cfdata_t match,
222 void *aux)
224 struct cardbus_attach_args *ca = aux;
226 if (tlp_cardbus_lookup(ca) != NULL)
227 return (1);
229 return (0);
232 void
233 tlp_cardbus_attach(device_t parent, device_t self,
234 void *aux)
236 struct tulip_cardbus_softc *csc = device_private(self);
237 struct tulip_softc *sc = &csc->sc_tulip;
238 struct cardbus_attach_args *ca = aux;
239 cardbus_devfunc_t ct = ca->ca_ct;
240 const struct tulip_cardbus_product *tcp;
241 u_int8_t enaddr[ETHER_ADDR_LEN];
242 bus_addr_t adr;
243 pcireg_t reg;
245 sc->sc_dev = self;
246 sc->sc_devno = 0;
247 sc->sc_dmat = ca->ca_dmat;
248 csc->sc_ct = ct;
249 csc->sc_tag = ca->ca_tag;
251 tcp = tlp_cardbus_lookup(ca);
252 if (tcp == NULL) {
253 printf("\n");
254 panic("tlp_cardbus_attach: impossible");
256 sc->sc_chip = tcp->tcp_chip;
259 * By default, Tulip registers are 8 bytes long (4 bytes
260 * followed by a 4 byte pad).
262 sc->sc_regshift = 3;
265 * Power management hooks.
267 sc->sc_enable = tlp_cardbus_enable;
268 sc->sc_disable = tlp_cardbus_disable;
269 sc->sc_power = tlp_cardbus_power;
272 * Get revision info, and set some chip-specific variables.
274 sc->sc_rev = PCI_REVISION(ca->ca_class);
275 switch (sc->sc_chip) {
276 case TULIP_CHIP_21142:
277 if (sc->sc_rev >= 0x20)
278 sc->sc_chip = TULIP_CHIP_21143;
279 break;
281 case TULIP_CHIP_AN985:
283 * The AN983 and AN985 are very similar, and are
284 * differentiated by a "signature" register that
285 * is like, but not identical, to a PCI ID register.
287 reg = cardbus_conf_read(ct->ct_cc, ct->ct_cf, csc->sc_tag,
288 0x80);
289 switch (reg) {
290 case 0x09811317:
291 sc->sc_chip = TULIP_CHIP_AN985;
292 break;
294 case 0x09851317:
295 sc->sc_chip = TULIP_CHIP_AN983;
296 break;
299 break;
301 default:
302 /* Nothing. -- to make gcc happy */
303 break;
306 printf(": %s Ethernet, pass %d.%d\n",
307 tlp_chip_names[sc->sc_chip],
308 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf);
311 * Map the device.
313 csc->sc_csr = CARDBUS_COMMAND_MASTER_ENABLE;
314 if (Cardbus_mapreg_map(ct, TULIP_PCI_MMBA,
315 CARDBUS_MAPREG_TYPE_MEM, 0, &sc->sc_st, &sc->sc_sh, &adr,
316 &csc->sc_mapsize) == 0) {
317 #if rbus
318 #else
319 (*ct->ct_cf->cardbus_mem_open)(cc, 0, adr, adr+csc->sc_mapsize);
320 #endif
321 csc->sc_cben = CARDBUS_MEM_ENABLE;
322 csc->sc_csr |= CARDBUS_COMMAND_MEM_ENABLE;
323 csc->sc_bar_reg = TULIP_PCI_MMBA;
324 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_MEM;
325 } else if (Cardbus_mapreg_map(ct, TULIP_PCI_IOBA,
326 CARDBUS_MAPREG_TYPE_IO, 0, &sc->sc_st, &sc->sc_sh, &adr,
327 &csc->sc_mapsize) == 0) {
328 #if rbus
329 #else
330 (*ct->ct_cf->cardbus_io_open)(cc, 0, adr, adr+csc->sc_mapsize);
331 #endif
332 csc->sc_cben = CARDBUS_IO_ENABLE;
333 csc->sc_csr |= CARDBUS_COMMAND_IO_ENABLE;
334 csc->sc_bar_reg = TULIP_PCI_IOBA;
335 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_IO;
336 } else {
337 aprint_error_dev(self, "unable to map device registers\n");
338 return;
342 * Bring the chip out of powersave mode and initialize the
343 * configuration registers.
345 tlp_cardbus_setup(csc);
348 * Read the contents of the Ethernet Address ROM/SROM.
350 switch (sc->sc_chip) {
351 case TULIP_CHIP_X3201_3:
353 * No SROM on this chip.
355 break;
357 default:
358 if (tlp_read_srom(sc) == 0)
359 goto cant_cope;
360 break;
364 * Deal with chip/board quirks. This includes setting up
365 * the mediasw, and extracting the Ethernet address from
366 * the rombuf.
368 switch (sc->sc_chip) {
369 case TULIP_CHIP_21142:
370 case TULIP_CHIP_21143:
371 /* Check for new format SROM. */
372 if (tlp_isv_srom_enaddr(sc, enaddr) != 0) {
374 * We start out with the 2114x ISV media switch.
375 * When we search for quirks, we may change to
376 * a different switch.
378 sc->sc_mediasw = &tlp_2114x_isv_mediasw;
379 } else if (tlp_parse_old_srom(sc, enaddr) == 0) {
381 * Not an ISV SROM, and not in old DEC Address
382 * ROM format. Try to snarf it out of the CIS.
384 if (ca->ca_cis.funce.network.netid_present == 0)
385 goto cant_cope;
387 /* Grab the MAC address from the CIS. */
388 memcpy(enaddr, ca->ca_cis.funce.network.netid,
389 sizeof(enaddr));
393 * Deal with any quirks this board might have.
395 tlp_cardbus_get_quirks(csc, enaddr, tlp_cardbus_21142_quirks);
398 * If we don't already have a media switch, default to
399 * MII-over-SIO, with no special reset routine.
401 if (sc->sc_mediasw == NULL) {
402 printf("%s: defaulting to MII-over-SIO; no bets...\n",
403 device_xname(self));
404 sc->sc_mediasw = &tlp_sio_mii_mediasw;
406 break;
408 case TULIP_CHIP_AN983:
409 case TULIP_CHIP_AN985:
411 * The ADMtek AN985's Ethernet address is located
412 * at offset 8 of its EEPROM.
414 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN);
417 * The ADMtek AN985 can be configured in Single-Chip
418 * mode or MAC-only mode. Single-Chip uses the built-in
419 * PHY, MAC-only has an external PHY (usually HomePNA).
420 * The selection is based on an EEPROM setting, and both
421 * PHYs are access via MII attached to SIO.
423 * The AN985 "ghosts" the internal PHY onto all
424 * MII addresses, so we have to use a media init
425 * routine that limits the search.
426 * XXX How does this work with MAC-only mode?
428 sc->sc_mediasw = &tlp_an985_mediasw;
429 break;
431 case TULIP_CHIP_X3201_3:
433 * The X3201 doesn't have an SROM. Lift the MAC address
434 * from the CIS. Also, we have a special media switch:
435 * MII-on-SIO, plus some special GPIO setup.
437 memcpy(enaddr, ca->ca_cis.funce.network.netid, sizeof(enaddr));
438 sc->sc_reset = tlp_cardbus_x3201_reset;
439 sc->sc_mediasw = &tlp_sio_mii_mediasw;
440 break;
442 default:
443 cant_cope:
444 printf("%s: sorry, unable to handle your board\n",
445 device_xname(self));
446 return;
449 /* Remember which interrupt line. */
450 csc->sc_intrline = ca->ca_intrline;
453 * Finish off the attach.
455 tlp_attach(sc, enaddr);
458 * Power down the socket.
460 Cardbus_function_disable(csc->sc_ct);
464 tlp_cardbus_detach(device_t self, int flags)
466 struct tulip_cardbus_softc *csc = device_private(self);
467 struct tulip_softc *sc = &csc->sc_tulip;
468 struct cardbus_devfunc *ct = csc->sc_ct;
469 int rv;
471 #if defined(DIAGNOSTIC)
472 if (ct == NULL)
473 panic("%s: data structure lacks", device_xname(self));
474 #endif
476 rv = tlp_detach(sc);
477 if (rv)
478 return (rv);
481 * Unhook the interrupt handler.
483 if (csc->sc_ih != NULL)
484 cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, csc->sc_ih);
487 * Release bus space and close window.
489 if (csc->sc_bar_reg != 0)
490 Cardbus_mapreg_unmap(ct, csc->sc_bar_reg,
491 sc->sc_st, sc->sc_sh, csc->sc_mapsize);
493 return (0);
497 tlp_cardbus_enable(struct tulip_softc *sc)
499 struct tulip_cardbus_softc *csc = (void *) sc;
500 cardbus_devfunc_t ct = csc->sc_ct;
501 cardbus_chipset_tag_t cc = ct->ct_cc;
502 cardbus_function_tag_t cf = ct->ct_cf;
505 * Power on the socket.
507 Cardbus_function_enable(ct);
510 * Set up the PCI configuration registers.
512 tlp_cardbus_setup(csc);
515 * Map and establish the interrupt.
517 csc->sc_ih = cardbus_intr_establish(cc, cf, csc->sc_intrline, IPL_NET,
518 tlp_intr, sc);
519 if (csc->sc_ih == NULL) {
520 aprint_error_dev(sc->sc_dev,
521 "unable to establish interrupt\n");
522 Cardbus_function_disable(csc->sc_ct);
523 return (1);
525 return (0);
528 void
529 tlp_cardbus_disable(struct tulip_softc *sc)
531 struct tulip_cardbus_softc *csc = (void *) sc;
532 cardbus_devfunc_t ct = csc->sc_ct;
533 cardbus_chipset_tag_t cc = ct->ct_cc;
534 cardbus_function_tag_t cf = ct->ct_cf;
536 /* Unhook the interrupt handler. */
537 cardbus_intr_disestablish(cc, cf, csc->sc_ih);
538 csc->sc_ih = NULL;
540 /* Power down the socket. */
541 Cardbus_function_disable(ct);
544 void
545 tlp_cardbus_power(struct tulip_softc *sc, int why)
548 switch (why) {
549 case PWR_RESUME:
550 tlp_cardbus_enable(sc);
551 break;
552 case PWR_SUSPEND:
553 tlp_cardbus_disable(sc);
554 break;
558 void
559 tlp_cardbus_setup(struct tulip_cardbus_softc *csc)
561 struct tulip_softc *sc = &csc->sc_tulip;
562 cardbus_devfunc_t ct = csc->sc_ct;
563 cardbus_chipset_tag_t cc = ct->ct_cc;
564 cardbus_function_tag_t cf = ct->ct_cf;
565 pcireg_t reg;
568 * Check to see if the device is in power-save mode, and
569 * bring it out if necessary.
571 switch (sc->sc_chip) {
572 case TULIP_CHIP_21142:
573 case TULIP_CHIP_21143:
574 case TULIP_CHIP_X3201_3:
576 * Clear the "sleep mode" bit in the CFDA register.
578 reg = cardbus_conf_read(cc, cf, csc->sc_tag, TULIP_PCI_CFDA);
579 if (reg & (CFDA_SLEEP|CFDA_SNOOZE))
580 cardbus_conf_write(cc, cf, csc->sc_tag, TULIP_PCI_CFDA,
581 reg & ~(CFDA_SLEEP|CFDA_SNOOZE));
582 break;
584 default:
585 /* Nothing. -- to make gcc happy */
586 break;
589 (void)cardbus_set_powerstate(ct, csc->sc_tag, PCI_PWR_D0);
591 /* Program the BAR. */
592 cardbus_conf_write(cc, cf, csc->sc_tag, csc->sc_bar_reg,
593 csc->sc_bar_val);
595 /* Make sure the right access type is on the CardBus bridge. */
596 (*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_cben);
597 (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
599 /* Enable the appropriate bits in the PCI CSR. */
600 reg = cardbus_conf_read(cc, cf, csc->sc_tag, PCI_COMMAND_STATUS_REG);
601 reg &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE);
602 reg |= csc->sc_csr;
603 cardbus_conf_write(cc, cf, csc->sc_tag, PCI_COMMAND_STATUS_REG, reg);
606 * Make sure the latency timer is set to some reasonable
607 * value.
609 reg = cardbus_conf_read(cc, cf, csc->sc_tag, PCI_BHLC_REG);
610 if (PCI_LATTIMER(reg) < 0x20) {
611 reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
612 reg |= (0x20 << PCI_LATTIMER_SHIFT);
613 cardbus_conf_write(cc, cf, csc->sc_tag, PCI_BHLC_REG, reg);
617 void
618 tlp_cardbus_x3201_reset(struct tulip_softc *sc)
620 u_int32_t reg;
622 reg = TULIP_READ(sc, CSR_SIAGEN);
624 /* make GP[2,0] outputs */
625 TULIP_WRITE(sc, CSR_SIAGEN, (reg & ~SIAGEN_MD) | SIAGEN_CWE |
626 0x00050000);
627 TULIP_WRITE(sc, CSR_SIAGEN, (reg & ~SIAGEN_CWE) | SIAGEN_MD);
630 void
631 tlp_cardbus_lxt_quirks(struct tulip_cardbus_softc *csc,
632 const u_int8_t *enaddr)
634 struct tulip_softc *sc = &csc->sc_tulip;
636 sc->sc_mediasw = &tlp_sio_mii_mediasw;