1 /* $NetBSD: rbus_ppb.c,v 1.30 2009/05/12 12:11:17 cegger Exp $ */
4 * Copyright (c) 1999 The NetBSD Foundation, Inc.
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Michael Richardson <mcr@sandelman.ottawa.on.ca>
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
33 * CardBus front-end for the Intel/Digital DECchip 21152 PCI-PCI bridge
36 #include <sys/cdefs.h>
37 __KERNEL_RCSID(0, "$NetBSD: rbus_ppb.c,v 1.30 2009/05/12 12:11:17 cegger Exp $");
39 #include <sys/param.h>
40 #include <sys/systm.h>
42 #include <sys/malloc.h>
43 #include <sys/kernel.h>
44 #include <sys/socket.h>
45 #include <sys/ioctl.h>
46 #include <sys/errno.h>
47 #include <sys/device.h>
53 #include <machine/endian.h>
58 #include <dev/pci/pcivar.h>
59 #include <dev/pci/pcireg.h>
60 #include <dev/pci/pcidevs.h>
61 #include <dev/pci/ppbreg.h>
63 #include <dev/ic/i82365reg.h>
65 #include <dev/pci/pccbbreg.h>
66 #include <dev/pci/pccbbvar.h>
68 #include <dev/cardbus/cardbusvar.h>
69 #include <dev/pci/pcidevs.h>
71 #include <x86/pci/pci_addr_fixup.h>
72 #include <x86/pci/pci_bus_fixup.h>
73 #include <i386/pci/pci_intr_fixup.h>
74 #include <i386/pci/pcibios.h>
78 static int ppb_cardbus_match(device_t
, cfdata_t
, void *);
79 static void ppb_cardbus_attach(device_t
, device_t
, void *);
80 static int ppb_cardbus_detach(device_t self
, int flags
);
81 /*static*/ void ppb_cardbus_setup(struct ppb_softc
* sc
);
82 /*static*/ int ppb_cardbus_enable(struct ppb_softc
* sc
);
83 /*static*/ void ppb_cardbus_disable(struct ppb_softc
* sc
);
84 static int ppb_activate(device_t
, enum devact
);
85 int rppbprint(void *, const char *);
86 int rbus_intr_fixup(pci_chipset_tag_t
, int, int, int);
87 void rbus_do_header_fixup(pci_chipset_tag_t
, pcitag_t
, void *);
89 static void rbus_pci_phys_allocate(pci_chipset_tag_t
, pcitag_t
, void *);
91 static int rbus_do_phys_allocate(pci_chipset_tag_t
, pcitag_t
, int,
92 void *, int, bus_addr_t
*, bus_size_t
);
94 static void rbus_pci_phys_countspace(pci_chipset_tag_t
, pcitag_t
, void *);
96 static int rbus_do_phys_countspace(pci_chipset_tag_t
, pcitag_t
, int,
97 void *, int, bus_addr_t
*, bus_size_t
);
99 unsigned int rbus_round_up(unsigned int, unsigned int);
102 struct ppb_cardbus_softc
{
108 CFATTACH_DECL_NEW(rbus_ppb
, sizeof(struct ppb_cardbus_softc
),
109 ppb_cardbus_match
, ppb_cardbus_attach
, ppb_cardbus_detach
, ppb_activate
);
112 int rbus_ppb_debug
= 0; /* hack with kdb */
113 #define DPRINTF(X) if(rbus_ppb_debug) printf X
119 ppb_cardbus_match(device_t parent
, cfdata_t match
, void *aux
)
121 struct cardbus_attach_args
*ca
= aux
;
123 if (CARDBUS_VENDOR(ca
->ca_id
) == PCI_VENDOR_DEC
&&
124 CARDBUS_PRODUCT(ca
->ca_id
) == PCI_PRODUCT_DEC_21152
)
127 if(PCI_CLASS(ca
->ca_class
) == PCI_CLASS_BRIDGE
&&
128 PCI_SUBCLASS(ca
->ca_class
) == PCI_SUBCLASS_BRIDGE_PCI
) {
130 printf("recognizing generic bridge chip\n");
138 rppbprint(void *aux
, const char *pnp
)
140 struct pcibus_attach_args
*pba
= aux
;
142 /* only PCIs can attach to PPBs; easy. */
144 aprint_normal("pci at %s", pnp
);
145 aprint_normal(" bus %d (rbus)", pba
->pba_bus
);
150 rbus_intr_fixup(pci_chipset_tag_t pc
,
155 pci_device_foreach_min(pc
, minbus
,
156 maxbus
, rbus_do_header_fixup
, (void *)&line
);
161 rbus_do_header_fixup(pci_chipset_tag_t pc
, pcitag_t tag
, void *context
)
164 int bus
, device
, function
;
166 int *pline
= (int *)context
;
169 pci_decompose_tag(pc
, tag
, &bus
, &device
, &function
);
170 id
= pci_conf_read(pc
, tag
, PCI_ID_REG
);
172 intr
= pci_conf_read(pc
, tag
, PCI_INTERRUPT_REG
);
173 pin
= PCI_INTERRUPT_PIN(intr
);
174 irq
= PCI_INTERRUPT_LINE(intr
);
177 printf("do_header %02x:%02x:%02x pin=%d => line %d\n",
178 bus
, device
, function
, pin
, line
);
181 intr
&= ~(PCI_INTERRUPT_LINE_MASK
<< PCI_INTERRUPT_LINE_SHIFT
);
182 intr
|= (line
<< PCI_INTERRUPT_LINE_SHIFT
);
183 pci_conf_write(pc
, tag
, PCI_INTERRUPT_REG
, intr
);
188 * This function takes a range of PCI bus numbers and
189 * allocates space for all devices found in this space (the BARs) from
190 * the rbus space maps (I/O and memory).
192 * It assumes that "rbus" is defined. The whole concept does.
194 * It uses pci_device_foreach_min() to call rbus_pci_phys_allocate.
195 * This function is mostly stolen from
196 * pci_addr_fixup.c:pciaddr_resource_reserve.
199 struct rbus_pci_addr_fixup_context
{
200 struct ppb_cardbus_softc
*csc
;
201 cardbus_chipset_tag_t ct
;
202 struct cardbus_softc
*sc
;
203 struct cardbus_attach_args
*caa
;
206 bus_size_t
*bussize_ioreqs
;
207 bus_size_t
*bussize_memreqs
;
208 rbus_tag_t
*iobustags
;
209 rbus_tag_t
*membustags
;
213 rbus_round_up(unsigned int size
, unsigned int minval
)
223 while(power2
< (1 << 31) &&
225 power2
= power2
<< 1;
232 rbus_pci_addr_fixup(struct ppb_cardbus_softc
*csc
,
233 cardbus_chipset_tag_t ct
,
234 struct cardbus_softc
*sc
,
235 pci_chipset_tag_t pc
,
236 struct cardbus_attach_args
*caa
,
237 int minbus
, int maxbus
)
239 struct rbus_pci_addr_fixup_context rct
;
242 bus_space_handle_t handle
;
251 size
= sizeof(bus_size_t
)*(maxbus
+1);
252 rct
.bussize_ioreqs
= alloca(size
);
253 rct
.bussize_memreqs
= alloca(size
);
254 rct
.iobustags
= alloca(maxbus
* sizeof(rbus_tag_t
));
255 rct
.membustags
= alloca(maxbus
* sizeof(rbus_tag_t
));
257 memset(rct
.bussize_ioreqs
, 0, size
);
258 memset(rct
.bussize_memreqs
, 0, size
);
260 printf("%s: sizing buses %d-%d\n",
261 device_xname(rct
.csc
->sc_dev
),
264 pci_device_foreach_min(pc
, minbus
, maxbus
,
265 rbus_pci_phys_countspace
, &rct
);
268 * we need to determine amount of address space for each
269 * bus. To do this, we have to roll up amounts and then
270 * we need to divide up the cardbus's extent to allocate
271 * some space to each bus.
274 for(busnum
=maxbus
; busnum
> minbus
; busnum
--) {
275 if(pci_bus_parent
[busnum
] != 0) {
276 if(pci_bus_parent
[busnum
] < minbus
||
277 pci_bus_parent
[busnum
] >= maxbus
) {
278 printf("%s: bus %d has illegal parent %d\n",
279 device_xname(rct
.csc
->sc_dev
),
280 busnum
, pci_bus_parent
[busnum
]);
284 /* first round amount of space up */
285 rct
.bussize_ioreqs
[busnum
] =
286 rbus_round_up(rct
.bussize_ioreqs
[busnum
], PPB_IO_MIN
);
287 rct
.bussize_ioreqs
[pci_bus_parent
[busnum
]] +=
288 rct
.bussize_ioreqs
[busnum
];
290 rct
.bussize_memreqs
[busnum
] =
291 rbus_round_up(rct
.bussize_memreqs
[busnum
], PPB_MEM_MIN
);
292 rct
.bussize_memreqs
[pci_bus_parent
[busnum
]] +=
293 rct
.bussize_memreqs
[busnum
];
298 rct
.bussize_ioreqs
[minbus
] =
299 rbus_round_up(rct
.bussize_ioreqs
[minbus
], 4096);
300 rct
.bussize_memreqs
[minbus
] =
301 rbus_round_up(rct
.bussize_memreqs
[minbus
], 8);
303 printf("%s: total needs IO %08lx and MEM %08lx\n",
304 device_xname(rct
.csc
->sc_dev
),
305 rct
.bussize_ioreqs
[minbus
], rct
.bussize_memreqs
[minbus
]);
307 if(!caa
->ca_rbus_iot
) {
311 if(rct
.bussize_ioreqs
[minbus
]) {
312 if(rbus_space_alloc(caa
->ca_rbus_iot
, 0,
313 rct
.bussize_ioreqs
[minbus
],
314 rct
.bussize_ioreqs
[minbus
]-1 /* mask */,
315 rct
.bussize_ioreqs
[minbus
] /* align */,
319 panic("rbus_ppb: can not allocate %ld bytes in IO bus %d",
320 rct
.bussize_ioreqs
[minbus
], minbus
);
322 rct
.iobustags
[minbus
]=rbus_new(caa
->ca_rbus_iot
,
324 rct
.bussize_ioreqs
[minbus
],
325 0 /* offset to add to physical address
326 to make processor address */,
327 RBUS_SPACE_DEDICATE
);
330 if(rct
.bussize_memreqs
[minbus
]) {
331 if(rbus_space_alloc(caa
->ca_rbus_memt
, 0,
332 rct
.bussize_memreqs
[minbus
],
333 rct
.bussize_memreqs
[minbus
]-1 /* mask */,
334 rct
.bussize_memreqs
[minbus
] /* align */,
338 panic("%s: can not allocate %ld bytes in MEM bus %d",
339 device_xname(rct
.csc
->sc_dev
),
340 rct
.bussize_memreqs
[minbus
], minbus
);
342 rct
.membustags
[minbus
]=rbus_new(caa
->ca_rbus_memt
,
344 rct
.bussize_memreqs
[minbus
],
345 0 /* offset to add to physical
346 address to make processor
348 RBUS_SPACE_DEDICATE
);
351 for(busnum
=minbus
+1; busnum
<= maxbus
; busnum
++) {
354 busparent
= pci_bus_parent
[busnum
];
356 printf("%s: bus %d (parent=%d) needs IO %08lx and MEM %08lx\n",
357 device_xname(rct
.csc
->sc_dev
),
360 rct
.bussize_ioreqs
[busnum
],
361 rct
.bussize_memreqs
[busnum
]);
363 if(busparent
> maxbus
) {
364 panic("rbus_ppb: illegal parent");
367 if(rct
.bussize_ioreqs
[busnum
]) {
368 if(rbus_space_alloc(rct
.iobustags
[busparent
],
370 rct
.bussize_ioreqs
[busnum
],
371 rct
.bussize_ioreqs
[busnum
]-1 /*mask */,
372 rct
.bussize_ioreqs
[busnum
] /* align */,
376 panic("rbus_ppb: can not allocate %ld bytes in IO bus %d",
377 rct
.bussize_ioreqs
[busnum
], busnum
);
379 rct
.iobustags
[busnum
]=rbus_new(rct
.iobustags
[busparent
],
381 rct
.bussize_ioreqs
[busnum
],
382 0 /* offset to add to physical
384 to make processor address */,
385 RBUS_SPACE_DEDICATE
);
387 /* program the bridge */
389 /* enable I/O space */
390 reg
= pci_conf_read(pc
, pci_bus_tag
[busnum
],
391 PCI_COMMAND_STATUS_REG
);
392 reg
|= PCI_COMMAND_IO_ENABLE
| PCI_COMMAND_MASTER_ENABLE
;
393 pci_conf_write(pc
, pci_bus_tag
[busnum
],
394 PCI_COMMAND_STATUS_REG
, reg
);
396 /* now init the limit register for I/O */
397 pci_conf_write(pc
, pci_bus_tag
[busnum
], PPB_REG_IOSTATUS
,
398 (((start
& 0xf000) >> 8) << PPB_IOBASE_SHIFT
) |
400 rct
.bussize_ioreqs
[busnum
] +
401 4095) & 0xf000) >> 8) << PPB_IOLIMIT_SHIFT
));
404 if(rct
.bussize_memreqs
[busnum
]) {
405 if(rbus_space_alloc(rct
.membustags
[busparent
],
407 rct
.bussize_memreqs
[busnum
] /* size */,
408 rct
.bussize_memreqs
[busnum
]-1 /*mask */,
409 rct
.bussize_memreqs
[busnum
] /* align */,
413 panic("rbus_ppb: can not allocate %ld bytes in MEM bus %d",
414 rct
.bussize_memreqs
[busnum
], busnum
);
416 rct
.membustags
[busnum
]=rbus_new(rct
.membustags
[busparent
],
418 rct
.bussize_memreqs
[busnum
],
419 0 /* offset to add to physical
420 address to make processor
422 RBUS_SPACE_DEDICATE
);
424 /* program the bridge */
425 /* enable memory space */
426 reg
= pci_conf_read(pc
, pci_bus_tag
[busnum
],
427 PCI_COMMAND_STATUS_REG
);
428 reg
|= PCI_COMMAND_MEM_ENABLE
| PCI_COMMAND_MASTER_ENABLE
;
429 pci_conf_write(pc
, pci_bus_tag
[busnum
],
430 PCI_COMMAND_STATUS_REG
, reg
);
432 /* now init the limit register for memory */
433 pci_conf_write(pc
, pci_bus_tag
[busnum
], PPB_REG_MEM
,
434 ((start
& PPB_MEM_MASK
)
435 >> PPB_MEM_SHIFT
) << PPB_MEMBASE_SHIFT
|
437 rct
.bussize_memreqs
[busnum
] +
438 PPB_MEM_MIN
-1) >> PPB_MEM_SHIFT
)
439 << PPB_MEMLIMIT_SHIFT
));
441 /* and set the prefetchable limits as well */
442 pci_conf_write(pc
, pci_bus_tag
[busnum
], PPB_REG_PREFMEM
,
443 ((start
& PPB_MEM_MASK
)
444 >> PPB_MEM_SHIFT
) << PPB_MEMBASE_SHIFT
|
446 rct
.bussize_memreqs
[busnum
] +
447 PPB_MEM_MIN
-1) >> PPB_MEM_SHIFT
)
448 << PPB_MEMLIMIT_SHIFT
));
450 /* pci_conf_print(pc, pci_bus_tag[busnum], NULL); */
454 printf("%s: configuring buses %d-%d\n",
455 device_xname(rct
.csc
->sc_dev
),
457 pci_device_foreach_min(pc
, minbus
, maxbus
,
458 rbus_pci_phys_allocate
, &rct
);
462 rbus_pci_phys_countspace(pci_chipset_tag_t pc
, pcitag_t tag
, void *context
)
464 int bus
, device
, function
;
465 struct rbus_pci_addr_fixup_context
*rct
=
466 (struct rbus_pci_addr_fixup_context
*)context
;
468 pci_decompose_tag(pc
, tag
, &bus
, &device
, &function
);
470 printf("%s: configuring device %02x:%02x:%02x\n",
471 device_xname(rct
->csc
->sc_dev
),
472 bus
, device
, function
);
474 pciaddr_resource_manage(pc
, tag
,
475 rbus_do_phys_countspace
, context
);
480 rbus_do_phys_countspace(pci_chipset_tag_t pc
, pcitag_t tag
, int mapreg
, void *ctx
, int type
, bus_addr_t
*addr
, bus_size_t size
)
482 struct rbus_pci_addr_fixup_context
*rct
=
483 (struct rbus_pci_addr_fixup_context
*)ctx
;
484 int bus
, device
, function
;
486 pci_decompose_tag(pc
, tag
, &bus
, &device
, &function
);
489 printf("%s: skipping huge space request of size=%08x\n",
490 device_xname(rct
->csc
->sc_dev
), (unsigned int)size
);
494 if(PCI_MAPREG_TYPE(type
) == PCI_MAPREG_TYPE_IO
) {
495 rct
->bussize_ioreqs
[bus
] += size
;
497 rct
->bussize_memreqs
[bus
]+= size
;
504 rbus_pci_phys_allocate(pci_chipset_tag_t pc
, pcitag_t tag
, void *context
)
506 int bus
, device
, function
, command
;
507 struct rbus_pci_addr_fixup_context
*rct
=
508 (struct rbus_pci_addr_fixup_context
*)context
;
509 //cardbus_chipset_tag_t ct = rct->ct;
510 // struct cardbus_softc *sc = rct->sc;
512 pci_decompose_tag(pc
, tag
, &bus
, &device
, &function
);
514 printf("%s: configuring device %02x:%02x:%02x\n",
515 device_xname(rct
->csc
->sc_dev
),
516 bus
, device
, function
);
518 pciaddr_resource_manage(pc
, tag
,
519 rbus_do_phys_allocate
, context
);
521 /* now turn the device's memory and I/O on */
522 command
= pci_conf_read(pc
, tag
, PCI_COMMAND_STATUS_REG
);
523 command
|= PCI_COMMAND_IO_ENABLE
|PCI_COMMAND_MEM_ENABLE
;
524 pci_conf_write(pc
, tag
, PCI_COMMAND_STATUS_REG
, command
);
528 rbus_do_phys_allocate(pci_chipset_tag_t pc
, pcitag_t tag
, int mapreg
, void *ctx
, int type
, bus_addr_t
*addr
, bus_size_t size
)
530 struct rbus_pci_addr_fixup_context
*rct
=
531 (struct rbus_pci_addr_fixup_context
*)ctx
;
532 cardbus_chipset_tag_t ct
= rct
->ct
;
533 struct cardbus_softc
*sc
= rct
->sc
;
534 cardbus_function_t
*cf
= sc
->sc_cf
;
536 bus_space_tag_t bustag
;
537 bus_addr_t mask
= size
-1;
539 bus_space_handle_t handle
;
543 int bus
, device
, function
;
545 pci_decompose_tag(pc
, tag
, &bus
, &device
, &function
);
548 * some devices come up with garbage in them (Tulip?)
549 * we are in charge here, so give them address
552 * XXX this may be due to no secondary PCI reset!!!
556 printf("Already allocated space at %08x\n",
557 (unsigned int)*addr
);
563 printf("%s: skipping huge space request of size=%08x\n",
564 device_xname(rct
->csc
->sc_dev
), (unsigned int)size
);
568 if(PCI_MAPREG_TYPE(type
) == PCI_MAPREG_TYPE_IO
) {
570 rbustag
= rct
->iobustags
[bus
];
573 bustag
= sc
->sc_memt
;
574 rbustag
= rct
->membustags
[bus
];
578 if((*cf
->cardbus_space_alloc
)(ct
, rbustag
, base
, size
,
579 mask
, size
, busflags
|flags
,
581 printf("%s: no available resources (size=%08x) for bar %2d. fixup failed\n",
582 device_xname(rct
->csc
->sc_dev
), (unsigned int)size
, mapreg
);
585 pci_conf_write(pc
, tag
, mapreg
, *addr
);
589 printf("%s: alloc %s space of size %08x for %02d:%02d:%02d -> %08x\n",
590 device_xname(rct
->csc
->sc_dev
),
593 bus
, device
, function
, (unsigned int)*addr
);
595 /* write new address to PCI device configuration header */
596 pci_conf_write(pc
, tag
, mapreg
, *addr
);
600 DPRINTF(("%s: pci_addr_fixup: ",
601 device_xname(rct
->csc
->sc_dev
)));
603 if(rbus_ppb_debug
) { pciaddr_print_devid(pc
, tag
); }
607 /* double check that the value got inserted correctly */
608 if (pciaddr_ioaddr(pci_conf_read(pc
, tag
, mapreg
)) != *addr
) {
609 pci_conf_write(pc
, tag
, mapreg
, 0); /* clear */
610 printf("%s: fixup failed. (new address=%#x)\n",
611 device_xname(rct
->csc
->sc_dev
),
616 DPRINTF(("new address 0x%08x\n",
623 ppb_cardbus_attach(device_t parent
, device_t self
, void *aux
)
625 struct ppb_cardbus_softc
*csc
= device_private(self
);
626 struct cardbus_softc
*parent_sc
= device_private(parent
);
627 struct cardbus_attach_args
*ca
= aux
;
628 cardbus_devfunc_t ct
= ca
->ca_ct
;
629 cardbus_chipset_tag_t cc
= ct
->ct_cc
;
630 cardbus_function_tag_t cf
= ct
->ct_cf
;
631 struct pccbb_softc
*psc
= (struct pccbb_softc
*)cc
;
632 struct pcibus_attach_args pba
;
645 /* shut up compiler */
646 csc
->foo
= parent_sc
->sc_intrline
;
649 pci_devinfo(ca
->ca_id
, ca
->ca_class
, 0, devinfo
, sizeof(devinfo
));
650 printf(": %s (rev. 0x%02x)\n", devinfo
, PCI_REVISION(ca
->ca_class
));
652 csc
->sc_tag
= ca
->ca_tag
; /* XXX cardbustag_t == pcitag_t */
654 busdata
= cardbus_conf_read(cc
, cf
, ca
->ca_tag
, PPB_REG_BUSINFO
);
655 minbus
= pcibios_max_bus
;
656 maxbus
= minbus
; /* XXX; gcc */
658 if (PPB_BUSINFO_SECONDARY(busdata
) == 0) {
659 aprint_error_dev(self
, "not configured by system firmware calling pci_bus_fixup(%d)\n", 0);
662 * first, pull the reset wire on the secondary bridge
663 * to clear all devices
665 busdata
= cardbus_conf_read(cc
, cf
, ca
->ca_tag
,
666 PPB_REG_BRIDGECONTROL
);
667 cardbus_conf_write(cc
, cf
, ca
->ca_tag
, PPB_REG_BRIDGECONTROL
,
668 busdata
| PPB_BC_SECONDARY_RESET
);
670 cardbus_conf_write(cc
, cf
, ca
->ca_tag
, PPB_REG_BRIDGECONTROL
,
673 /* then go initialize the bridge control registers */
674 maxbus
= pci_bus_fixup(psc
->sc_pc
, 0);
677 busdata
= cardbus_conf_read(cc
, cf
, ca
->ca_tag
, PPB_REG_BUSINFO
);
678 if(PPB_BUSINFO_SECONDARY(busdata
) == 0) {
679 aprint_error_dev(self
, "still not configured, not fixable.\n");
684 minbus
= PPB_BUSINFO_SECONDARY(busdata
);
685 maxbus
= PPB_BUSINFO_SUBORDINATE(busdata
);
688 /* now, go and assign addresses for the new devices */
689 rbus_pci_addr_fixup(csc
, cc
, parent_sc
,
695 * now configure all connected devices to the IRQ which
696 * was assigned to this slot, as they will all arrive from
699 rbus_intr_fixup(psc
->sc_pc
, minbus
, maxbus
, ca
->ca_intrline
);
702 * enable direct routing of interrupts. We do this because
703 * we can not manage to get pccb_intr_establish() called until
704 * PCI subsystem is merged with rbus. The major thing that this
705 * routine does is avoid calling the driver's interrupt routine
706 * when the card has been removed.
708 * The rbus_ppb.c can not cope with card desertions until the merging
711 pccbb_intr_route(psc
);
714 * Attach the PCI bus than hangs off of it.
716 * XXX Don't pass-through Memory Read Multiple. Should we?
717 * XXX Consult the spec...
719 pba
.pba_iot
= ca
->ca_iot
;
720 pba
.pba_memt
= ca
->ca_memt
;
721 pba
.pba_dmat
= ca
->ca_dmat
;
722 pba
.pba_pc
= psc
->sc_pc
;
723 pba
.pba_flags
= PCI_FLAGS_IO_ENABLED
|PCI_FLAGS_MEM_ENABLED
;
724 pba
.pba_bus
= PPB_BUSINFO_SECONDARY(busdata
);
725 pba
.pba_bridgetag
= &csc
->sc_tag
;
726 /*pba.pba_intrswiz = parent_sc->sc_intrswiz; */
727 pba
.pba_intrtag
= psc
->sc_pa
.pa_intrtag
;
729 config_found_ia(self
, "pcibus", &pba
, rppbprint
);
733 ppb_cardbus_setup(struct ppb_softc
* sc
)
735 struct ppb_cardbus_softc
*csc
= (struct ppb_cardbus_softc
*) sc
;
737 cardbus_chipset_tag_t cc
= psc
->sc_cc
;
738 cardbus_function_tag_t cf
= psc
->sc_cf
;
741 /* shut up compiler */
744 printf("ppb_cardbus_setup called\n");
746 /* not sure what to do here */
747 cardbustag_t tag
= cardbus_make_tag(cc
, cf
, csc
->ct
->ct_bus
,
748 csc
->ct
->ct_dev
, csc
->ct
->ct_func
);
750 command
= Cardbus_conf_read(csc
->ct
, tag
, CARDBUS_COMMAND_STATUS_REG
);
751 if (csc
->base0_reg
) {
752 Cardbus_conf_write(csc
->ct
, tag
,
753 CARDBUS_BASE0_REG
, csc
->base0_reg
);
754 (cf
->cardbus_ctrl
) (cc
, CARDBUS_MEM_ENABLE
);
755 command
|= CARDBUS_COMMAND_MEM_ENABLE
|
756 CARDBUS_COMMAND_MASTER_ENABLE
;
757 } else if (csc
->base1_reg
) {
758 Cardbus_conf_write(csc
->ct
, tag
,
759 CARDBUS_BASE1_REG
, csc
->base1_reg
);
760 (cf
->cardbus_ctrl
) (cc
, CARDBUS_IO_ENABLE
);
761 command
|= (CARDBUS_COMMAND_IO_ENABLE
|
762 CARDBUS_COMMAND_MASTER_ENABLE
);
765 (cf
->cardbus_ctrl
) (cc
, CARDBUS_BM_ENABLE
);
767 /* enable the card */
768 Cardbus_conf_write(csc
->ct
, tag
, CARDBUS_COMMAND_STATUS_REG
, command
);
773 ppb_cardbus_enable(struct ppb_softc
* sc
)
776 struct ppb_cardbus_softc
*csc
= (struct ppb_cardbus_softc
*) sc
;
777 struct cardbus_softc
*psc
= device_private(device_parent(sc
->sc_dev
));
778 cardbus_chipset_tag_t cc
= psc
->sc_cc
;
779 cardbus_function_tag_t cf
= psc
->sc_cf
;
781 Cardbus_function_enable(csc
->ct
);
783 fxp_cardbus_setup(sc
);
785 /* Map and establish the interrupt. */
787 sc
->sc_ih
= cardbus_intr_establish(cc
, cf
, psc
->sc_intrline
, IPL_NET
,
789 if (NULL
== sc
->sc_ih
) {
790 aprint_error_dev(sc
->sc_dev
, "couldn't establish interrupt\n");
794 printf("%s: interrupting at %d\n", device_xname(sc
->sc_dev
),
802 ppb_cardbus_disable(struct ppb_softc
* sc
)
805 struct cardbus_softc
*psc
= device_private(device_parent(sc
->sc_dev
));
806 cardbus_chipset_tag_t cc
= psc
->sc_cc
;
807 cardbus_function_tag_t cf
= psc
->sc_cf
;
809 /* Remove interrupt handler. */
810 cardbus_intr_disestablish(cc
, cf
, sc
->sc_ih
);
812 Cardbus_function_disable(((struct fxp_cardbus_softc
*) sc
)->ct
);
817 ppb_cardbus_detach(device_t self
, int flags
)
819 /* struct ppb_softc *sc = device_private(self);*/
820 struct ppb_cardbus_softc
*csc
= device_private(self
);
823 struct cardbus_devfunc
*ct
= csc
->ct
;
828 panic("%s: data structure lacks", device_xname(sc
->sc_dev
));
834 * Unhook the interrupt handler.
836 cardbus_intr_disestablish(ct
->ct_cc
, ct
->ct_cf
, sc
->sc_ih
);
839 * release bus space and close window
842 reg
= CARDBUS_BASE0_REG
;
844 reg
= CARDBUS_BASE1_REG
;
845 Cardbus_mapreg_unmap(ct
, reg
, sc
->sc_st
, sc
->sc_sh
, csc
->size
);
856 ppb_activate(device_t self
, enum devact act
)
858 printf("ppb_activate called\n");