1 /* $NetBSD: hpciovar.h,v 1.4.24.1 2005/11/10 14:04:00 skrll Exp $ */
4 * Copyright (c) 2001 TAKEMURA Shin.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. Neither the name of the project nor the names of its contributors
16 * may be used to endorse or promote products derived from this software
17 * without specific prior written permission.
19 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 #ifndef _DEV_HPC_HPCIOVAR_H_
34 #define _DEV_HPC_HPCIOVAR_H_
37 typedef struct hpcio_chip
*hpcio_chip_t
;
38 typedef void *hpcio_intr_handle_t
;
43 int (*hc_portread
)(hpcio_chip_t
, int);
44 void (*hc_portwrite
)(hpcio_chip_t
, int, int);
45 hpcio_intr_handle_t(*hc_intr_establish
)(hpcio_chip_t
, int, int,
46 int (*)(void *), void *);
47 void (*hc_intr_disestablish
)(hpcio_chip_t
, hpcio_intr_handle_t
);
48 void (*hc_intr_clear
)(hpcio_chip_t
, hpcio_intr_handle_t
);
49 void (*hc_register_iochip
)(hpcio_chip_t
, hpcio_chip_t
);
50 void (*hc_update
)(hpcio_chip_t
);
51 void (*hc_dump
)(hpcio_chip_t
);
54 struct hpcio_attach_args
{
55 const char *haa_busname
;
57 hpcio_chip_t (*haa_getchip
)(void*, int);
58 bus_space_tag_t haa_iot
; /* I/O space tag */
60 #define HPCIO_BUSNAME "hpcioif"
62 #define hpcio_portread(hc, port) \
63 ((*(hc)->hc_portread)((hc), (port)))
64 #define hpcio_portwrite(hc, port, data) \
65 ((*(hc)->hc_portwrite)((hc), (port), (data)))
66 #define hpcio_intr_establish(hc, port, mode, func, arg) \
67 ((*(hc)->hc_intr_establish)((hc),(port),(mode),(func),(arg)))
68 #define hpcio_intr_disestablish(hc, handle) \
69 ((*(hc)->hc_intr_disestablish)((hc), (handle)))
70 #define hpcio_intr_clear(hc, handle) \
71 ((*(hc)->hc_intr_clear)((hc), (handle)))
72 #define hpcio_register_iochip(hc, iochip) \
73 ((*(hc)->hc_register_iochip)((hc), (iochip)))
74 #define hpcio_update(hc) \
75 ((*(hc)->hc_update)(hc))
76 #define hpcio_dump(hc) \
77 ((*(hc)->hc_dump)(hc))
79 /* interrupt trigger options. */
80 #define HPCIO_INTR_EDGE (1<<0)
81 #define HPCIO_INTR_LEVEL (0<<0)
82 #define HPCIO_INTR_HOLD (1<<1)
83 #define HPCIO_INTR_THROUGH (0<<1)
84 #define HPCIO_INTR_HIGH (1<<2)
85 #define HPCIO_INTR_LOW (0<<2)
86 #define HPCIO_INTR_POSEDGE (1<<3)
87 #define HPCIO_INTR_NEGEDGE (1<<4)
89 #define HPCIO_INTR_LEVEL_HIGH_HOLD \
90 (HPCIO_INTR_LEVEL|HPCIO_INTR_HIGH|HPCIO_INTR_HOLD)
91 #define HPCIO_INTR_LEVEL_HIGH_THROUGH \
92 (HPCIO_INTR_LEVEL|HPCIO_INTR_HIGH|HPCIO_INTR_THROUGH)
93 #define HPCIO_INTR_LEVEL_LOW_HOLD \
94 (HPCIO_INTR_LEVEL|HPCIO_INTR_LOW|HPCIO_INTR_HOLD)
95 #define HPCIO_INTR_LEVEL_LOW_THROUGH \
96 (HPCIO_INTR_LEVEL|HPCIO_INTR_LOW|HPCIO_INTR_THROUGH)
97 #define HPCIO_INTR_EDGE_HOLD \
98 (HPCIO_INTR_EDGE|HPCIO_INTR_HOLD)
99 #define HPCIO_INTR_EDGE_THROUGH \
100 (HPCIO_INTR_EDGE|HPCIO_INTR_THROUGH)
102 #endif /* !_DEV_HPC_HPCIOVAR_H_ */