sys/dev/ic/bwivar.h

   1 /*      $NetBSD: bwivar.h,v 1.4 2009/04/26 10:07:48 cegger Exp $        */
   2 /*      $OpenBSD: bwivar.h,v 1.23 2008/02/25 20:36:54 mglocker Exp $    */
   3
   4 /*
   5  * Copyright (c) 2007 The DragonFly Project.  All rights reserved.
   6  *
   7  * This code is derived from software contributed to The DragonFly Project
   8  * by Sepherosa Ziehau <sepherosa@gmail.com>
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions
  12  * are met:
  13  *
  14  * 1. Redistributions of source code must retain the above copyright
  15  *    notice, this list of conditions and the following disclaimer.
  16  * 2. Redistributions in binary form must reproduce the above copyright
  17  *    notice, this list of conditions and the following disclaimer in
  18  *    the documentation and/or other materials provided with the
  19  *    distribution.
  20  * 3. Neither the name of The DragonFly Project nor the names of its
  21  *    contributors may be used to endorse or promote products derived
  22  *    from this software without specific, prior written permission.
  23  *
  24  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  25  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  26  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  27  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
  28  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  29  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
  30  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  31  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  32  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  33  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  34  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  35  * SUCH DAMAGE.
  36  *
  37  * $DragonFly: src/sys/dev/netif/bwi/if_bwivar.h,v 1.1 2007/09/08 06:15:54 sephe Exp $
  38  */
  39
  40 #ifndef _DEV_IC_BWIVAR_H
  41 #define _DEV_IC_BWIVAR_H
  42
  43 #define BWI_ALIGN               0x1000
  44 #define BWI_RING_ALIGN          BWI_ALIGN
  45 #define BWI_BUS_SPACE_MAXADDR   0x3fffffff
  46
  47 #define BWI_TX_NRING            6
  48 #define BWI_TXRX_NRING          6
  49 #define BWI_TX_NDESC            128
  50 #define BWI_RX_NDESC            64
  51 #define BWI_TXSTATS_NDESC       64
  52 #define BWI_TX_NSPRDESC         2
  53 #define BWI_TX_DATA_RING        1
  54
  55 /* XXX Onoe/Sample/AMRR probably need different configuration */
  56 #define BWI_SHRETRY             7
  57 #define BWI_LGRETRY             4
  58 #define BWI_SHRETRY_FB          3
  59 #define BWI_LGRETRY_FB          2
  60
  61 #define BWI_LED_EVENT_NONE      -1
  62 #define BWI_LED_EVENT_POLL      0
  63 #define BWI_LED_EVENT_TX        1
  64 #define BWI_LED_EVENT_RX        2
  65 #define BWI_LED_SLOWDOWN(dur)   (dur) = (((dur) * 3) / 2)
  66
  67 enum bwi_txpwrcb_type {
  68         BWI_TXPWR_INIT = 0,
  69         BWI_TXPWR_FORCE = 1,
  70         BWI_TXPWR_CALIB = 2
  71 };
  72
  73 #define BWI_NOISE_FLOOR         -95     /* TODO: noise floor calc */
  74
  75 /* [TRC: Bizarreness.  Cf. bwi_rxeof in OpenBSD's if_bwi.c and
  76    DragonFlyBSD's bwi.c.] */
  77 #define BWI_FRAME_MIN_LEN(hdr)  \
  78         ((hdr) + sizeof(struct ieee80211_frame_ack) + IEEE80211_CRC_LEN)
  79
  80 #define CSR_READ_4(sc, reg)                     \
  81         bus_space_read_4((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg))
  82 #define CSR_READ_2(sc, reg)                     \
  83         bus_space_read_2((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg))
  84
  85 #define CSR_WRITE_4(sc, reg, val)               \
  86         bus_space_write_4((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg), (val))
  87 #define CSR_WRITE_2(sc, reg, val)               \
  88         bus_space_write_2((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg), (val))
  89
  90 #define CSR_SETBITS_4(sc, reg, bits)            \
  91         CSR_WRITE_4((sc), (reg), CSR_READ_4((sc), (reg)) | (bits))
  92 #define CSR_SETBITS_2(sc, reg, bits)            \
  93         CSR_WRITE_2((sc), (reg), CSR_READ_2((sc), (reg)) | (bits))
  94
  95 #define CSR_FILT_SETBITS_4(sc, reg, filt, bits) \
  96         CSR_WRITE_4((sc), (reg), (CSR_READ_4((sc), (reg)) & (filt)) | (bits))
  97 #define CSR_FILT_SETBITS_2(sc, reg, filt, bits) \
  98         CSR_WRITE_2((sc), (reg), (CSR_READ_2((sc), (reg)) & (filt)) | (bits))
  99
 100 #define CSR_CLRBITS_4(sc, reg, bits)            \
 101         CSR_WRITE_4((sc), (reg), CSR_READ_4((sc), (reg)) & ~(bits))
 102 #define CSR_CLRBITS_2(sc, reg, bits)            \
 103         CSR_WRITE_2((sc), (reg), CSR_READ_2((sc), (reg)) & ~(bits))
 104
 105 struct bwi_desc32 {
 106         /* Little endian */
 107         uint32_t        ctrl;
 108         uint32_t        addr;   /* BWI_DESC32_A_ */
 109 } __packed;
 110
 111 #define BWI_DESC32_A_FUNC_TXRX          0x1
 112 #define BWI_DESC32_A_FUNC_MASK          0xc0000000
 113 #define BWI_DESC32_A_ADDR_MASK          0x3fffffff
 114
 115 #define BWI_DESC32_C_BUFLEN_MASK        0x00001fff
 116 #define BWI_DESC32_C_ADDRHI_MASK        0x00030000
 117 #define BWI_DESC32_C_EOR                (1 << 28)
 118 #define BWI_DESC32_C_INTR               (1 << 29)
 119 #define BWI_DESC32_C_FRAME_END          (1 << 30)
 120 #define BWI_DESC32_C_FRAME_START        (1 << 31)
 121
 122 struct bwi_desc64 {
 123         /* Little endian */
 124         uint32_t        ctrl0;
 125         uint32_t        ctrl1;
 126         uint32_t        addr_lo;
 127         uint32_t        addr_hi;
 128 } __packed;
 129
 130 struct bwi_rxbuf_hdr {
 131         /* Little endian */
 132         uint16_t        rxh_buflen;     /* exclude bwi_rxbuf_hdr */
 133         uint8_t         rxh_pad1[2];
 134         uint16_t        rxh_flags1;
 135         uint8_t         rxh_rssi;
 136         uint8_t         rxh_sq;
 137         uint16_t        rxh_phyinfo;    /* BWI_RXH_PHYINFO_ */
 138         uint16_t        rxh_flags3;
 139         uint16_t        rxh_flags2;     /* BWI_RXH_F2_ */
 140         uint16_t        rxh_tsf;
 141         uint8_t         rxh_pad3[14];   /* Padded to 30bytes */
 142 } __packed;
 143
 144 #define BWI_RXH_F1_BCM2053_RSSI (1 << 14)
 145 #define BWI_RXH_F1_OFDM         (1 << 0)
 146
 147 #define BWI_RXH_F2_TYPE2FRAME   (1 << 2)
 148
 149 #define BWI_RXH_F3_BCM2050_RSSI (1 << 10)
 150
 151 #define BWI_RXH_PHYINFO_LNAGAIN (3 << 14)
 152
 153 struct bwi_txbuf_hdr {
 154         /* Little endian */
 155         uint32_t        txh_mac_ctrl;   /* BWI_TXH_MAC_C_ */
 156         uint8_t         txh_fc[2];
 157         uint16_t        txh_unknown1;
 158         uint16_t        txh_phy_ctrl;   /* BWI_TXH_PHY_C_ */
 159         uint8_t         txh_ivs[16];
 160         uint8_t         txh_addr1[IEEE80211_ADDR_LEN];
 161         uint16_t        txh_unknown2;
 162         uint8_t         txh_rts_fb_plcp[4];
 163         uint16_t        txh_rts_fb_duration;
 164         uint8_t         txh_fb_plcp[4];
 165         uint16_t        txh_fb_duration;
 166         uint8_t         txh_pad2[2];
 167         uint16_t        txh_id;         /* BWI_TXH_ID_ */
 168         uint16_t        txh_unknown3;
 169         uint8_t         txh_rts_plcp[6];
 170         uint8_t         txh_rts_fc[2];
 171         uint16_t        txh_rts_duration;
 172         uint8_t         txh_rts_ra[IEEE80211_ADDR_LEN];
 173         uint8_t         txh_rts_ta[IEEE80211_ADDR_LEN];
 174         uint8_t         txh_pad3[2];
 175         uint8_t         txh_plcp[6];
 176 } __packed;
 177
 178 #define BWI_TXH_ID_RING_MASK            0xe000
 179 #define BWI_TXH_ID_IDX_MASK             0x1fff
 180
 181 #define BWI_TXH_PHY_C_OFDM              (1 << 0)
 182 #define BWI_TXH_PHY_C_SHPREAMBLE        (1 << 4)
 183 #define BWI_TXH_PHY_C_ANTMODE_MASK      0x0300
 184
 185 #define BWI_TXH_MAC_C_ACK               (1 << 0)
 186 #define BWI_TXH_MAC_C_FIRST_FRAG        (1 << 3)
 187 #define BWI_TXH_MAC_C_HWSEQ             (1 << 4)
 188 #define BWI_TXH_MAC_C_FB_OFDM           (1 << 8)
 189
 190 struct bwi_txstats {
 191         /* Little endian */
 192         uint8_t         txs_pad1[4];
 193         uint16_t        txs_id;
 194         uint8_t         txs_flags;
 195         uint8_t         txs_retry_cnt;
 196         uint8_t         txs_pad2[2];
 197         uint16_t        txs_seq;
 198         uint16_t        txs_unknown;
 199         uint8_t         txs_pad3[2];    /* Padded to 16bytes */
 200 } __packed;
 201
 202 struct bwi_ring_data {
 203         uint32_t                 rdata_txrx_ctrl;
 204         bus_dma_segment_t        rdata_seg;
 205         bus_dmamap_t             rdata_dmap;
 206         bus_addr_t               rdata_paddr;
 207         void                    *rdata_desc;
 208 };
 209
 210 struct bwi_txbuf {
 211         struct mbuf             *tb_mbuf;
 212         bus_dmamap_t             tb_dmap;
 213
 214         struct ieee80211_node   *tb_ni;
 215         int                      tb_rate_idx[2];
 216 };
 217
 218 struct bwi_txbuf_data {
 219         struct bwi_txbuf        tbd_buf[BWI_TX_NDESC];
 220         int                     tbd_used;
 221         int                     tbd_idx;
 222 };
 223
 224 struct bwi_rxbuf {
 225         struct mbuf             *rb_mbuf;
 226         bus_addr_t               rb_paddr;
 227         bus_dmamap_t             rb_dmap;
 228 };
 229
 230 struct bwi_rxbuf_data {
 231         struct bwi_rxbuf        rbd_buf[BWI_RX_NDESC];
 232         bus_dmamap_t            rbd_tmp_dmap;
 233         int                     rbd_idx;
 234 };
 235
 236 struct bwi_txstats_data {
 237         bus_dma_segment_t        stats_ring_seg;
 238         bus_dmamap_t             stats_ring_dmap;
 239         bus_addr_t               stats_ring_paddr;
 240         void                    *stats_ring;
 241
 242         bus_dma_segment_t        stats_seg;
 243         bus_dmamap_t             stats_dmap;
 244         bus_addr_t               stats_paddr;
 245         struct bwi_txstats      *stats;
 246
 247         uint32_t                 stats_ctrl_base;
 248         int                      stats_idx;
 249 };
 250
 251 struct bwi_fwhdr {
 252         /* Big endian */
 253         uint8_t         fw_type;        /* BWI_FW_T_ */
 254         uint8_t         fw_gen;         /* BWI_FW_GEN */
 255         uint8_t         fw_pad[2];
 256         uint32_t        fw_size;
 257 #define fw_iv_cnt       fw_size
 258 } __packed;
 259
 260 #define BWI_FWHDR_SZ            sizeof(struct bwi_fwhdr)
 261 #define BWI_FW_VERSION3         3
 262 #define BWI_FW_VERSION4         4
 263 #define BWI_FW_VERSION3_REVMAX  0x128
 264 #define BWI_FW_T_UCODE          'u'
 265 #define BWI_FW_T_PCM            'p'
 266 #define BWI_FW_T_IV             'i'
 267 #define BWI_FW_GEN_1            1
 268 #define BWI_FW_IV_OFS_MASK      0x7fff
 269 #define BWI_FW_IV_IS_32BIT      (1 << 15)
 270
 271 #define BWI_FW_NAME_FORMAT      "v%d/%s%d.fw"
 272 #define BWI_FW_UCODE_PREFIX     "ucode"
 273 #define BWI_FW_PCM_PREFIX       "pcm"
 274 #define BWI_FW_IV_PREFIX        "b0g0initvals"
 275 #define BWI_FW_IV_EXT_PREFIX    "b0g0bsinitvals"
 276
 277 struct bwi_fw_image {
 278         char     fwi_name[64];
 279         uint8_t *fwi_data;
 280         size_t   fwi_size;
 281 };
 282
 283 struct bwi_fw_iv {
 284         /* Big endian */
 285         uint16_t                iv_ofs;
 286         union {
 287                 uint32_t        val32;
 288                 uint16_t        val16;
 289         }                       iv_val;
 290 } __packed;
 291
 292 struct bwi_led {
 293         uint8_t                 l_flags;        /* BWI_LED_F_ */
 294         uint8_t                 l_act;          /* BWI_LED_ACT_ */
 295         uint8_t                 l_mask;
 296 };
 297
 298 #define BWI_LED_F_ACTLOW        0x1
 299 #define BWI_LED_F_BLINK         0x2
 300 #define BWI_LED_F_POLLABLE      0x4
 301 #define BWI_LED_F_SLOW          0x8
 302
 303 enum bwi_clock_mode {
 304         BWI_CLOCK_MODE_SLOW,
 305         BWI_CLOCK_MODE_FAST,
 306         BWI_CLOCK_MODE_DYN
 307 };
 308
 309 struct bwi_regwin {
 310         uint32_t                rw_flags;       /* BWI_REGWIN_F_ */
 311         uint16_t                rw_type;        /* BWI_REGWIN_T_ */
 312         uint8_t                 rw_id;
 313         uint8_t                 rw_rev;
 314 };
 315
 316 #define BWI_REGWIN_F_EXIST      0x1
 317
 318 #define BWI_CREATE_REGWIN(rw, id, type, rev)    \
 319 do {                                            \
 320         (rw)->rw_flags = BWI_REGWIN_F_EXIST;    \
 321         (rw)->rw_type = (type);                 \
 322         (rw)->rw_id = (id);                     \
 323         (rw)->rw_rev = (rev);                   \
 324 } while (0)
 325
 326 #define BWI_REGWIN_EXIST(rw)    ((rw)->rw_flags & BWI_REGWIN_F_EXIST)
 327 #define BWI_GPIO_REGWIN(sc)                             \
 328         (BWI_REGWIN_EXIST(&(sc)->sc_com_regwin) ?       \
 329         &(sc)->sc_com_regwin : &(sc)->sc_bus_regwin)
 330
 331 struct bwi_mac;
 332
 333 struct bwi_phy {
 334         enum ieee80211_phymode  phy_mode;
 335         int                     phy_rev;
 336         int                     phy_version;
 337
 338         uint32_t                phy_flags;              /* BWI_PHY_F_ */
 339         uint16_t                phy_tbl_ctrl;
 340         uint16_t                phy_tbl_data_lo;
 341         uint16_t                phy_tbl_data_hi;
 342
 343         void                    (*phy_init)(struct bwi_mac *);
 344 };
 345
 346 #define BWI_PHY_F_CALIBRATED    0x1
 347 #define BWI_PHY_F_LINKED        0x2
 348 #define BWI_CLEAR_PHY_FLAGS     (BWI_PHY_F_CALIBRATED)
 349
 350 /* TX power control */
 351 struct bwi_tpctl {
 352         uint16_t                bbp_atten;      /* BBP attenuation: 4bits */
 353         uint16_t                rf_atten;       /* RF attenuation */
 354         uint16_t                tp_ctrl1;       /* ??: 3bits */
 355         uint16_t                tp_ctrl2;       /* ??: 4bits */
 356 };
 357
 358 #define BWI_RF_ATTEN_FACTOR     4
 359 #define BWI_RF_ATTEN_MAX0       9
 360 #define BWI_RF_ATTEN_MAX1       31
 361 #define BWI_BBP_ATTEN_MAX       11
 362 #define BWI_TPCTL1_MAX          7
 363
 364 struct bwi_rf_lo {
 365         int8_t                  ctrl_lo;
 366         int8_t                  ctrl_hi;
 367 };
 368
 369 struct bwi_rf {
 370         uint16_t                rf_type;        /* BWI_RF_T_ */
 371         uint16_t                rf_manu;
 372         int                     rf_rev;
 373
 374         uint32_t                rf_flags;       /* BWI_RF_F_ */
 375
 376 #define BWI_RFLO_MAX            56
 377         struct bwi_rf_lo        rf_lo[BWI_RFLO_MAX];
 378         uint8_t                 rf_lo_used[8];
 379
 380 #define BWI_INVALID_NRSSI       -1000
 381         int16_t                 rf_nrssi[2];    /* Narrow RSSI */
 382         int32_t                 rf_nrssi_slope;
 383
 384 #define BWI_NRSSI_TBLSZ         64
 385         int8_t                  rf_nrssi_table[BWI_NRSSI_TBLSZ];
 386
 387         uint16_t                rf_lo_gain;     /* loopback gain */
 388         uint16_t                rf_rx_gain;     /* TRSW RX gain */
 389
 390         uint16_t                rf_calib;       /* RF calibration value */
 391         uint                    rf_curchan;     /* current channel */
 392
 393         uint16_t                rf_ctrl_rd;
 394         int                     rf_ctrl_adj;
 395         void                    (*rf_off)(struct bwi_mac *);
 396         void                    (*rf_on)(struct bwi_mac *);
 397
 398         void                    (*rf_set_nrssi_thr)(struct bwi_mac *);
 399         void                    (*rf_calc_nrssi_slope)(struct bwi_mac *);
 400         int                     (*rf_calc_rssi)
 401                                 (struct bwi_mac *,
 402                                  const struct bwi_rxbuf_hdr *);
 403
 404         void                    (*rf_lo_update)(struct bwi_mac *);
 405
 406 #define BWI_TSSI_MAX            64
 407         int8_t                  rf_txpower_map0[BWI_TSSI_MAX];
 408                                                 /* Indexed by TSSI */
 409         int                     rf_idle_tssi0;
 410
 411         int8_t                  rf_txpower_map[BWI_TSSI_MAX];
 412         int                     rf_idle_tssi;
 413
 414         int                     rf_base_tssi;
 415
 416         int                     rf_txpower_max; /* dBm */
 417
 418         int                     rf_ant_mode;    /* BWI_ANT_MODE_ */
 419 };
 420
 421 #define BWI_RF_F_INITED         0x1
 422 #define BWI_RF_F_ON             0x2
 423 #define BWI_RF_CLEAR_FLAGS      (BWI_RF_F_INITED)
 424
 425 #define BWI_ANT_MODE_0          0
 426 #define BWI_ANT_MODE_1          1
 427 #define BWI_ANT_MODE_UNKN       2
 428 #define BWI_ANT_MODE_AUTO       3
 429
 430 struct fw_image;
 431
 432 struct bwi_mac {
 433         struct bwi_regwin        mac_regwin;    /* MUST be first field */
 434 #define mac_rw_flags             mac_regwin.rw_flags
 435 #define mac_type                 mac_regwin.rw_type
 436 #define mac_id                   mac_regwin.rw_id
 437 #define mac_rev                  mac_regwin.rw_rev
 438         struct bwi_softc        *mac_sc;
 439
 440         struct bwi_phy           mac_phy;       /* PHY I/F */
 441         struct bwi_rf            mac_rf;        /* RF I/F */
 442
 443         struct bwi_tpctl         mac_tpctl;     /* TX power control */
 444         uint32_t                 mac_flags;     /* BWI_MAC_F_ */
 445
 446         struct bwi_fw_image      mac_ucode_fwi;
 447         struct bwi_fw_image      mac_pcm_fwi;
 448         struct bwi_fw_image      mac_iv_fwi;
 449         struct bwi_fw_image      mac_iv_ext_fwi;
 450 };
 451
 452 #define mac_ucode mac_ucode_fwi.fwi_data
 453 #define mac_ucode_size mac_ucode_fwi.fwi_size
 454 #define mac_pcm mac_pcm_fwi.fwi_data
 455 #define mac_pcm_size mac_pcm_fwi.fwi_size
 456 #define mac_iv mac_iv_fwi.fwi_data
 457 #define mac_iv_size mac_iv_fwi.fwi_size
 458 #define mac_iv_ext mac_iv_ext_fwi.fwi_data
 459 #define mac_iv_ext_size mac_iv_ext_fwi.fwi_size
 460
 461 #define BWI_MAC_F_BSWAP         0x1
 462 #define BWI_MAC_F_TPCTL_INITED  0x2
 463 #define BWI_MAC_F_HAS_TXSTATS   0x4
 464 #define BWI_MAC_F_INITED        0x8
 465 #define BWI_MAC_F_ENABLED       0x10
 466 #define BWI_MAC_F_LOCKED        0x20    /* for debug */
 467 #define BWI_MAC_F_TPCTL_ERROR   0x40
 468 #define BWI_MAC_F_PHYE_RESET    0x80
 469
 470 #define BWI_CREATE_MAC(mac, sc, id, rev)        \
 471 do {                                            \
 472         BWI_CREATE_REGWIN(&(mac)->mac_regwin,   \
 473             (id), BWI_REGWIN_T_MAC, (rev));     \
 474         (mac)->mac_sc = (sc);                   \
 475 } while (0)
 476
 477 #define BWI_MAC_MAX             2
 478 #define BWI_LED_MAX             4
 479
 480 enum bwi_bus_space {
 481         BWI_BUS_SPACE_30BIT = 1,
 482         BWI_BUS_SPACE_32BIT,
 483         BWI_BUS_SPACE_64BIT
 484 };
 485
 486 #define BWI_TX_RADIOTAP_PRESENT                 \
 487         ((1 << IEEE80211_RADIOTAP_FLAGS) |      \
 488          (1 << IEEE80211_RADIOTAP_RATE) |       \
 489          (1 << IEEE80211_RADIOTAP_CHANNEL))
 490
 491 struct bwi_tx_radiotap_hdr {
 492         struct ieee80211_radiotap_header wt_ihdr;
 493         uint8_t         wt_flags;
 494         uint8_t         wt_rate;
 495         uint16_t        wt_chan_freq;
 496         uint16_t        wt_chan_flags;
 497 };
 498
 499 #define BWI_RX_RADIOTAP_PRESENT                         \
 500         ((1 << IEEE80211_RADIOTAP_TSFT) |               \
 501          (1 << IEEE80211_RADIOTAP_FLAGS) |              \
 502          (1 << IEEE80211_RADIOTAP_RATE) |               \
 503          (1 << IEEE80211_RADIOTAP_CHANNEL) |            \
 504          (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |      \
 505          (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE))
 506
 507 struct bwi_rx_radiotap_hdr {
 508         struct ieee80211_radiotap_header wr_ihdr;
 509         uint64_t        wr_tsf;
 510         uint8_t         wr_flags;
 511         uint8_t         wr_rate;
 512         uint16_t        wr_chan_freq;
 513         uint16_t        wr_chan_flags;
 514         int8_t          wr_antsignal;
 515         int8_t          wr_antnoise;
 516         /* TODO: sq */
 517 };
 518
 519 /* [TRC: XXX amrr] */
 520 struct bwi_node {
 521         struct ieee80211_node           ni;
 522         struct ieee80211_amrr_node      amn;
 523 };
 524
 525 struct bwi_softc {
 526         device_t                 sc_dev;
 527         struct ethercom          sc_ec;
 528         struct ieee80211com      sc_ic;
 529 #define sc_if sc_ec.ec_if
 530         uint32_t                 sc_flags;      /* BWI_F_ */
 531         void                    *sc_ih;         /* [TRC: interrupt handler] */
 532
 533         uint32_t                 sc_cap;        /* BWI_CAP_ */
 534         uint16_t                 sc_bbp_id;     /* BWI_BBPID_ */
 535         uint8_t                  sc_bbp_rev;
 536         uint8_t                  sc_bbp_pkg;
 537
 538         uint8_t                  sc_pci_revid;
 539         uint16_t                 sc_pci_did;
 540         uint16_t                 sc_pci_subvid;
 541         uint16_t                 sc_pci_subdid;
 542
 543         uint16_t                 sc_card_flags; /* BWI_CARD_F_ */
 544         uint16_t                 sc_pwron_delay;
 545         int                      sc_locale;
 546
 547         /* [TRC: No clue what these are for.]
 548         int                      sc_irq_rid;
 549         struct resource         *sc_irq_res;
 550         void                    *sc_irq_handle;
 551         */
 552
 553         /* [TRC: Likewise.]
 554         int                      sc_mem_rid;
 555         struct resource         *sc_mem_res;
 556         */
 557         bus_dma_tag_t            sc_dmat;
 558         bus_space_tag_t          sc_mem_bt;
 559         bus_space_handle_t       sc_mem_bh;
 560
 561         struct callout           sc_scan_ch;
 562         struct callout           sc_calib_ch;
 563
 564         /* [TRC: XXX amrr] */
 565         struct callout           sc_amrr_ch;
 566         struct ieee80211_amrr    sc_amrr;
 567
 568         struct bwi_regwin       *sc_cur_regwin;
 569         struct bwi_regwin        sc_com_regwin;
 570         struct bwi_regwin        sc_bus_regwin;
 571
 572         int                      sc_nmac;
 573         struct bwi_mac           sc_mac[BWI_MAC_MAX];
 574
 575         int                      sc_rx_rate;
 576         int                      sc_tx_rate;
 577         enum bwi_txpwrcb_type    sc_txpwrcb_type;
 578
 579         int                      sc_led_blinking;
 580         int                      sc_led_ticks;
 581         struct bwi_led          *sc_blink_led;
 582         struct callout           sc_led_blink_ch;
 583         int                      sc_led_blink_offdur;
 584         struct bwi_led           sc_leds[BWI_LED_MAX];
 585
 586         enum bwi_bus_space       sc_bus_space;
 587
 588         struct bwi_txbuf_data    sc_tx_bdata[BWI_TX_NRING];
 589         struct bwi_rxbuf_data    sc_rx_bdata;
 590
 591         struct bwi_ring_data     sc_tx_rdata[BWI_TX_NRING];
 592         struct bwi_ring_data     sc_rx_rdata;
 593
 594         struct bwi_txstats_data *sc_txstats;
 595
 596         int                      sc_tx_timer;
 597
 598         int                      (*sc_newstate)
 599                                  (struct ieee80211com *,
 600                                      enum ieee80211_state, int);
 601
 602         int                      (*sc_init_tx_ring)(struct bwi_softc *, int);
 603         void                     (*sc_free_tx_ring)(struct bwi_softc *, int);
 604
 605         int                      (*sc_init_rx_ring)(struct bwi_softc *);
 606         void                     (*sc_free_rx_ring)(struct bwi_softc *);
 607
 608         int                      (*sc_init_txstats)(struct bwi_softc *);
 609         void                     (*sc_free_txstats)(struct bwi_softc *);
 610
 611         void                     (*sc_setup_rxdesc)
 612                                  (struct bwi_softc *, int, bus_addr_t, int);
 613         int                      (*sc_rxeof)(struct bwi_softc *);
 614
 615         void                     (*sc_setup_txdesc)
 616                                  (struct bwi_softc *, struct bwi_ring_data *,
 617                                      int, bus_addr_t, int);
 618         void                     (*sc_start_tx)
 619                                  (struct bwi_softc *, uint32_t, int);
 620
 621         void                     (*sc_txeof_status)(struct bwi_softc *);
 622
 623         int                      (*sc_enable)(struct bwi_softc *);
 624         void                     (*sc_disable)(struct bwi_softc *);
 625
 626         void                     (*sc_conf_write)(void *, uint32_t, uint32_t);
 627         uint32_t                 (*sc_conf_read)(void *, uint32_t);
 628
 629         struct sysctllog        *sc_sysctllog;
 630
 631         /* Sysctl variables */
 632         int                      sc_fw_version; /* BWI_FW_VERSION[34] */
 633         int                      sc_dwell_time; /* milliseconds */
 634         int                      sc_led_idle;
 635         int                      sc_led_blink;
 636         int                      sc_txpwr_calib;
 637         int                      sc_debug;      /* BWI_DBG_ */
 638
 639 #if NBPFILTER > 0
 640         struct bpf_if           *sc_drvbpf;
 641
 642         union {
 643                 struct bwi_rx_radiotap_hdr th;
 644                 uint8_t pad[64];
 645         }                        sc_rxtapu;
 646 #define sc_rxtap                 sc_rxtapu.th
 647         int                      sc_rxtap_len;
 648
 649         union {
 650                 struct bwi_tx_radiotap_hdr th;
 651                 uint8_t pad[64];
 652         }                        sc_txtapu;
 653 #define sc_txtap                 sc_txtapu.th
 654         int                      sc_txtap_len;
 655 #endif
 656 };
 657
 658 #define BWI_F_BUS_INITED        0x1
 659 #define BWI_F_PROMISC           0x2
 660
 661 #define BWI_DBG_MAC             0x00000001
 662 #define BWI_DBG_RF              0x00000002
 663 #define BWI_DBG_PHY             0x00000004
 664 #define BWI_DBG_MISC            0x00000008
 665
 666 #define BWI_DBG_ATTACH          0x00000010
 667 #define BWI_DBG_INIT            0x00000020
 668 #define BWI_DBG_FIRMWARE        0x00000040
 669 #define BWI_DBG_80211           0x00000080
 670 #define BWI_DBG_TXPOWER         0x00000100
 671 #define BWI_DBG_INTR            0x00000200
 672 #define BWI_DBG_RX              0x00000400
 673 #define BWI_DBG_TX              0x00000800
 674 #define BWI_DBG_TXEOF           0x00001000
 675 #define BWI_DBG_LED             0x00002000
 676 #define BWI_DBG_STATION         0x00004000
 677
 678 #define abs(a)  __builtin_abs(a)
 679
 680 #define MOBJ_WRITE_2(mac, objid, ofs, val)                      \
 681         bwi_memobj_write_2((mac), (objid), (ofs), (val))
 682 #define MOBJ_WRITE_4(mac, objid, ofs, val)                      \
 683         bwi_memobj_write_4((mac), (objid), (ofs), (val))
 684 #define MOBJ_READ_2(mac, objid, ofs)                            \
 685         bwi_memobj_read_2((mac), (objid), (ofs))
 686 #define MOBJ_READ_4(mac, objid, ofs)                            \
 687         bwi_memobj_read_4((mac), (objid), (ofs))
 688
 689 #define MOBJ_SETBITS_4(mac, objid, ofs, bits)                   \
 690         MOBJ_WRITE_4((mac), (objid), (ofs),                     \
 691         MOBJ_READ_4((mac), (objid), (ofs)) | (bits))
 692 #define MOBJ_CLRBITS_4(mac, objid, ofs, bits)                   \
 693         MOBJ_WRITE_4((mac), (objid), (ofs),                     \
 694         MOBJ_READ_4((mac), (objid), (ofs)) & ~(bits))
 695
 696 #define MOBJ_FILT_SETBITS_2(mac, objid, ofs, filt, bits)        \
 697         MOBJ_WRITE_2((mac), (objid), (ofs),                     \
 698         (MOBJ_READ_2((mac), (objid), (ofs)) & (filt)) | (bits))
 699
 700 #define TMPLT_WRITE_4(mac, ofs, val)    bwi_tmplt_write_4((mac), (ofs), (val))
 701
 702 #define HFLAGS_WRITE(mac, flags)        bwi_hostflags_write((mac), (flags))
 703 #define HFLAGS_READ(mac)                bwi_hostflags_read((mac))
 704 #define HFLAGS_CLRBITS(mac, bits)                               \
 705         HFLAGS_WRITE((mac), HFLAGS_READ((mac)) | (bits))
 706 #define HFLAGS_SETBITS(mac, bits)                               \
 707         HFLAGS_WRITE((mac), HFLAGS_READ((mac)) & ~(bits))
 708
 709 /* PHY */
 710
 711 struct bwi_gains {
 712         int16_t tbl_gain1;
 713         int16_t tbl_gain2;
 714         int16_t phy_gain;
 715 };
 716
 717 static __inline void
 718 bwi_phy_init(struct bwi_mac *_mac)
 719 {
 720         _mac->mac_phy.phy_init(_mac);
 721 }
 722
 723 #define PHY_WRITE(mac, ctrl, val)       bwi_phy_write((mac), (ctrl), (val))
 724 #define PHY_READ(mac, ctrl)             bwi_phy_read((mac), (ctrl))
 725
 726 #define PHY_SETBITS(mac, ctrl, bits)            \
 727         PHY_WRITE((mac), (ctrl), PHY_READ((mac), (ctrl)) | (bits))
 728 #define PHY_CLRBITS(mac, ctrl, bits)            \
 729         PHY_WRITE((mac), (ctrl), PHY_READ((mac), (ctrl)) & ~(bits))
 730 #define PHY_FILT_SETBITS(mac, ctrl, filt, bits) \
 731         PHY_WRITE((mac), (ctrl), (PHY_READ((mac), (ctrl)) & (filt)) | (bits))
 732
 733 static __inline void
 734 bwi_rf_off(struct bwi_mac *_mac)
 735 {
 736         _mac->mac_rf.rf_off(_mac);
 737         /* TODO: LED */
 738
 739         _mac->mac_rf.rf_flags &= ~BWI_RF_F_ON;
 740 }
 741
 742 static __inline void
 743 bwi_rf_on(struct bwi_mac *_mac)
 744 {
 745         if (_mac->mac_rf.rf_flags & BWI_RF_F_ON)
 746                 return;
 747
 748         _mac->mac_rf.rf_on(_mac);
 749         /* TODO: LED */
 750
 751         _mac->mac_rf.rf_flags |= BWI_RF_F_ON;
 752 }
 753
 754 static __inline void
 755 bwi_rf_calc_nrssi_slope(struct bwi_mac *_mac)
 756 {
 757         _mac->mac_rf.rf_calc_nrssi_slope(_mac);
 758 }
 759
 760 static __inline void
 761 bwi_rf_set_nrssi_thr(struct bwi_mac *_mac)
 762 {
 763         _mac->mac_rf.rf_set_nrssi_thr(_mac);
 764 }
 765
 766 static __inline int
 767 bwi_rf_calc_rssi(struct bwi_mac *_mac, const struct bwi_rxbuf_hdr *_hdr)
 768 {
 769         return (_mac->mac_rf.rf_calc_rssi(_mac, _hdr));
 770 }
 771
 772 static __inline void
 773 bwi_rf_lo_update(struct bwi_mac *_mac)
 774 {
 775         return (_mac->mac_rf.rf_lo_update(_mac));
 776 }
 777
 778 #define RF_WRITE(mac, ofs, val)         bwi_rf_write((mac), (ofs), (val))
 779 #define RF_READ(mac, ofs)               bwi_rf_read((mac), (ofs))
 780
 781 #define RF_SETBITS(mac, ofs, bits)              \
 782         RF_WRITE((mac), (ofs), RF_READ((mac), (ofs)) | (bits))
 783 #define RF_CLRBITS(mac, ofs, bits)              \
 784         RF_WRITE((mac), (ofs), RF_READ((mac), (ofs)) & ~(bits))
 785 #define RF_FILT_SETBITS(mac, ofs, filt, bits)   \
 786         RF_WRITE((mac), (ofs), (RF_READ((mac), (ofs)) & (filt)) | (bits))
 787
 788 /* [TRC: XXX Why are these visible at all externally?] */
 789
 790 int             bwi_intr(void *);
 791 int             bwi_attach(struct bwi_softc *);
 792 void            bwi_detach(struct bwi_softc *);
 793
 794 /* Power Management Framework */
 795 bool            bwi_suspend(device_t, pmf_qual_t);
 796 bool            bwi_resume(device_t, pmf_qual_t);
 797
 798 #endif  /* !_DEV_IC_BWIVAR_H */