1 /* $NetBSD: com.c,v 1.292 2009/12/06 23:15:59 dyoung Exp $ */
4 * Copyright (c) 1998, 1999, 2004, 2008 The NetBSD Foundation, Inc.
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Charles M. Hannum.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
33 * Copyright (c) 1991 The Regents of the University of California.
34 * All rights reserved.
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce the above copyright
42 * notice, this list of conditions and the following disclaimer in the
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45 * may be used to endorse or promote products derived from this software
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52 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
53 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
54 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
55 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
56 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
57 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
60 * @(#)com.c 7.5 (Berkeley) 5/16/91
64 * COM driver, uses National Semiconductor NS16450/NS16550AF UART
65 * Supports automatic hardware flow control on StarTech ST16C650A UART
68 #include <sys/cdefs.h>
69 __KERNEL_RCSID(0, "$NetBSD: com.c,v 1.292 2009/12/06 23:15:59 dyoung Exp $");
74 #include "opt_lockdebug.h"
75 #include "opt_multiprocessor.h"
79 #if NRND > 0 && defined(RND_COM)
83 /* The COM16650 option was renamed to COM_16650. */
85 #error Obsolete COM16650 option; use COM_16650 instead.
89 * Override cnmagic(9) macro before including <sys/systm.h>.
90 * We need to know if cn_check_magic triggered debugger, so set a flag.
91 * Callers of cn_check_magic must declare int cn_trapped = 0;
92 * XXX: this is *ugly*!
98 } while (/* CONSTCOND */ 0)
100 #include <sys/param.h>
101 #include <sys/systm.h>
102 #include <sys/ioctl.h>
103 #include <sys/select.h>
104 #include <sys/poll.h>
106 #include <sys/proc.h>
107 #include <sys/conf.h>
108 #include <sys/file.h>
110 #include <sys/kernel.h>
111 #include <sys/syslog.h>
112 #include <sys/device.h>
113 #include <sys/malloc.h>
114 #include <sys/timepps.h>
115 #include <sys/vnode.h>
116 #include <sys/kauth.h>
117 #include <sys/intr.h>
121 #include <dev/ic/comreg.h>
122 #include <dev/ic/comvar.h>
123 #include <dev/ic/ns16550reg.h>
124 #include <dev/ic/st16650reg.h>
126 #include <dev/ic/hayespreg.h>
128 #define com_lcr com_cfcr
129 #include <dev/cons.h>
132 #define CSR_WRITE_1(r, o, v) \
133 bus_space_write_1((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o], v)
134 #define CSR_READ_1(r, o) \
135 bus_space_read_1((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o])
136 #define CSR_WRITE_2(r, o, v) \
137 bus_space_write_2((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o], v)
138 #define CSR_READ_2(r, o) \
139 bus_space_read_2((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o])
140 #define CSR_WRITE_MULTI(r, o, p, n) \
141 bus_space_write_multi_1((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o], p, n)
143 #define CSR_WRITE_1(r, o, v) \
144 bus_space_write_1((r)->cr_iot, (r)->cr_ioh, o, v)
145 #define CSR_READ_1(r, o) \
146 bus_space_read_1((r)->cr_iot, (r)->cr_ioh, o)
147 #define CSR_WRITE_2(r, o, v) \
148 bus_space_write_2((r)->cr_iot, (r)->cr_ioh, o, v)
149 #define CSR_READ_2(r, o) \
150 bus_space_read_2((r)->cr_iot, (r)->cr_ioh, o)
151 #define CSR_WRITE_MULTI(r, o, p, n) \
152 bus_space_write_multi_1((r)->cr_iot, (r)->cr_ioh, o, p, n)
156 static void com_enable_debugport(struct com_softc
*);
158 void com_config(struct com_softc
*);
159 void com_shutdown(struct com_softc
*);
160 int comspeed(long, long, int);
161 static u_char
cflag2lcr(tcflag_t
);
162 int comparam(struct tty
*, struct termios
*);
163 void comstart(struct tty
*);
164 int comhwiflow(struct tty
*, int);
166 void com_loadchannelregs(struct com_softc
*);
167 void com_hwiflow(struct com_softc
*);
168 void com_break(struct com_softc
*, int);
169 void com_modem(struct com_softc
*, int);
170 void tiocm_to_com(struct com_softc
*, u_long
, int);
171 int com_to_tiocm(struct com_softc
*);
172 void com_iflush(struct com_softc
*);
174 int com_common_getc(dev_t
, struct com_regs
*);
175 static void com_common_putc(dev_t
, struct com_regs
*, int);
177 int cominit(struct com_regs
*, int, int, int, tcflag_t
);
179 static int comcnreattach(void);
181 int comcngetc(dev_t
);
182 void comcnputc(dev_t
, int);
183 void comcnpollc(dev_t
, int);
185 #define integrate static inline
186 void comsoft(void *);
187 integrate
void com_rxsoft(struct com_softc
*, struct tty
*);
188 integrate
void com_txsoft(struct com_softc
*, struct tty
*);
189 integrate
void com_stsoft(struct com_softc
*, struct tty
*);
190 integrate
void com_schedrx(struct com_softc
*);
191 void comdiag(void *);
193 extern struct cfdriver com_cd
;
195 dev_type_open(comopen
);
196 dev_type_close(comclose
);
197 dev_type_read(comread
);
198 dev_type_write(comwrite
);
199 dev_type_ioctl(comioctl
);
200 dev_type_stop(comstop
);
201 dev_type_tty(comtty
);
202 dev_type_poll(compoll
);
204 static struct comcons_info comcons_info
;
207 * Following are all routines needed for COM to act as console
209 static struct consdev comcons
= {
210 NULL
, NULL
, comcngetc
, comcnputc
, comcnpollc
, NULL
, NULL
, NULL
,
215 const struct cdevsw com_cdevsw
= {
216 comopen
, comclose
, comread
, comwrite
, comioctl
,
217 comstop
, comtty
, compoll
, nommap
, ttykqfilter
, D_TTY
221 * Make this an option variable one can patch.
222 * But be warned: this must be a power of 2!
224 u_int com_rbuf_size
= COM_RING_SIZE
;
226 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */
227 u_int com_rbuf_hiwat
= (COM_RING_SIZE
* 1) / 4;
228 u_int com_rbuf_lowat
= (COM_RING_SIZE
* 3) / 4;
230 static int comconsattached
;
231 static struct cnm_state com_cnm_state
;
234 #include <sys/kgdb.h>
236 static struct com_regs comkgdbregs
;
237 static int com_kgdb_attached
;
239 int com_kgdb_getc(void *);
240 void com_kgdb_putc(void *, int);
244 /* initializer for typical 16550-ish hardware */
245 #define COM_REG_16550 { \
246 com_data, com_data, com_dlbl, com_dlbh, com_ier, com_iir, com_fifo, \
247 com_efr, com_lcr, com_mcr, com_lsr, com_msr }
249 const bus_size_t com_std_map
[16] = COM_REG_16550
;
250 #endif /* COM_REGMAP */
252 #define COMUNIT_MASK 0x7ffff
253 #define COMDIALOUT_MASK 0x80000
255 #define COMUNIT(x) (minor(x) & COMUNIT_MASK)
256 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK)
258 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \
259 device_is_active((sc)->sc_dev))
261 #define BR BUS_SPACE_BARRIER_READ
262 #define BW BUS_SPACE_BARRIER_WRITE
263 #define COM_BARRIER(r, f) \
264 bus_space_barrier((r)->cr_iot, (r)->cr_ioh, 0, (r)->cr_nports, (f))
268 comspeed(long speed
, long frequency
, int type
)
270 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */
275 if ((type
== COM_TYPE_OMAP
) && (speed
> 230400)) {
285 x
= divrnd(frequency
/ divisor
, speed
);
288 err
= divrnd(((quad_t
)frequency
) * 1000 / divisor
, speed
* x
) - 1000;
291 if (err
> COM_TOLERANCE
)
301 void comstatus(struct com_softc
*, const char *);
303 comstatus(struct com_softc
*sc
, const char *str
)
305 struct tty
*tp
= sc
->sc_tty
;
307 aprint_normal_dev(sc
->sc_dev
,
308 "%s %cclocal %cdcd %cts_carr_on %cdtr %ctx_stopped\n",
310 ISSET(tp
->t_cflag
, CLOCAL
) ? '+' : '-',
311 ISSET(sc
->sc_msr
, MSR_DCD
) ? '+' : '-',
312 ISSET(tp
->t_state
, TS_CARR_ON
) ? '+' : '-',
313 ISSET(sc
->sc_mcr
, MCR_DTR
) ? '+' : '-',
314 sc
->sc_tx_stopped
? '+' : '-');
316 aprint_normal_dev(sc
->sc_dev
,
317 "%s %ccrtscts %ccts %cts_ttstop %crts rx_flags=0x%x\n",
319 ISSET(tp
->t_cflag
, CRTSCTS
) ? '+' : '-',
320 ISSET(sc
->sc_msr
, MSR_CTS
) ? '+' : '-',
321 ISSET(tp
->t_state
, TS_TTSTOP
) ? '+' : '-',
322 ISSET(sc
->sc_mcr
, MCR_RTS
) ? '+' : '-',
328 com_probe_subr(struct com_regs
*regs
)
331 /* force access to id reg */
332 CSR_WRITE_1(regs
, COM_REG_LCR
, LCR_8BITS
);
333 CSR_WRITE_1(regs
, COM_REG_IIR
, 0);
334 if ((CSR_READ_1(regs
, COM_REG_LCR
) != LCR_8BITS
) ||
335 (CSR_READ_1(regs
, COM_REG_IIR
) & 0x38))
342 comprobe1(bus_space_tag_t iot
, bus_space_handle_t ioh
)
344 struct com_regs regs
;
349 memcpy(regs
.cr_map
, com_std_map
, sizeof (regs
.cr_map
));
352 return com_probe_subr(®s
);
356 * No locking in this routine; it is only called during attach,
357 * or with the port already locked.
360 com_enable_debugport(struct com_softc
*sc
)
363 /* Turn on line break interrupt, set carrier. */
364 sc
->sc_ier
= IER_ERXRDY
;
365 if (sc
->sc_type
== COM_TYPE_PXA2x0
)
366 sc
->sc_ier
|= IER_EUART
| IER_ERXTOUT
;
367 CSR_WRITE_1(&sc
->sc_regs
, COM_REG_IER
, sc
->sc_ier
);
368 SET(sc
->sc_mcr
, MCR_DTR
| MCR_RTS
);
369 CSR_WRITE_1(&sc
->sc_regs
, COM_REG_MCR
, sc
->sc_mcr
);
373 com_attach_subr(struct com_softc
*sc
)
375 struct com_regs
*regsp
= &sc
->sc_regs
;
380 const char *fifo_msg
= NULL
;
384 callout_init(&sc
->sc_diag_callout
, 0);
385 mutex_init(&sc
->sc_lock
, MUTEX_DEFAULT
, IPL_HIGH
);
387 /* Disable interrupts before configuring the device. */
388 if (sc
->sc_type
== COM_TYPE_PXA2x0
)
389 sc
->sc_ier
= IER_EUART
;
393 CSR_WRITE_1(regsp
, COM_REG_IER
, sc
->sc_ier
);
395 if (regsp
->cr_iot
== comcons_info
.regs
.cr_iot
&&
396 regsp
->cr_iobase
== comcons_info
.regs
.cr_iobase
) {
399 if (cn_tab
== NULL
&& comcnreattach() != 0) {
400 printf("can't re-init serial console @%zx\n",
401 (size_t)comcons_info
.regs
.cr_iobase
);
404 /* Make sure the console is always "hardwired". */
405 delay(10000); /* wait for output to finish */
406 SET(sc
->sc_hwflags
, COM_HW_CONSOLE
);
407 SET(sc
->sc_swflags
, TIOCFLAG_SOFTCAR
);
411 switch (sc
->sc_type
) {
412 case COM_TYPE_HAYESP
:
415 case COM_TYPE_AU1x00
:
417 fifo_msg
= "Au1X00 UART, working fifo";
418 SET(sc
->sc_hwflags
, COM_HW_FIFO
);
421 case COM_TYPE_16550_NOERS
:
423 fifo_msg
= "ns16650, no ERS, working fifo";
424 SET(sc
->sc_hwflags
, COM_HW_FIFO
);
429 fifo_msg
= "OMAP UART, working fifo";
430 SET(sc
->sc_hwflags
, COM_HW_FIFO
);
435 /* look for a NS 16550AF UART with FIFOs */
436 CSR_WRITE_1(regsp
, COM_REG_FIFO
,
437 FIFO_ENABLE
| FIFO_RCV_RST
| FIFO_XMT_RST
| FIFO_TRIGGER_14
);
439 if (ISSET(CSR_READ_1(regsp
, COM_REG_IIR
), IIR_FIFO_MASK
)
441 if (ISSET(CSR_READ_1(regsp
, COM_REG_FIFO
), FIFO_TRIGGER_14
)
442 == FIFO_TRIGGER_14
) {
443 SET(sc
->sc_hwflags
, COM_HW_FIFO
);
447 * IIR changes into the EFR if LCR is set to LCR_EERS
448 * on 16650s. We also know IIR != 0 at this point.
449 * Write 0 into the EFR, and read it. If the result
450 * is 0, we have a 16650.
452 * Older 16650s were broken; the test to detect them
453 * is taken from the Linux driver. Apparently
454 * setting DLAB enable gives access to the EFR on
457 lcr
= CSR_READ_1(regsp
, COM_REG_LCR
);
458 CSR_WRITE_1(regsp
, COM_REG_LCR
, LCR_EERS
);
459 CSR_WRITE_1(regsp
, COM_REG_EFR
, 0);
460 if (CSR_READ_1(regsp
, COM_REG_EFR
) == 0) {
461 CSR_WRITE_1(regsp
, COM_REG_LCR
,
463 if (CSR_READ_1(regsp
, COM_REG_EFR
) == 0) {
464 CLR(sc
->sc_hwflags
, COM_HW_FIFO
);
467 SET(sc
->sc_hwflags
, COM_HW_FLOW
);
475 CSR_WRITE_1(regsp
, COM_REG_LCR
, lcr
);
476 if (sc
->sc_fifolen
== 0)
477 fifo_msg
= "st16650, broken fifo";
478 else if (sc
->sc_fifolen
== 32)
479 fifo_msg
= "st16650a, working fifo";
482 fifo_msg
= "ns16550a, working fifo";
484 fifo_msg
= "ns16550, broken fifo";
486 fifo_msg
= "ns8250 or ns16450, no fifo";
487 CSR_WRITE_1(regsp
, COM_REG_FIFO
, 0);
490 * Some chips will clear down both Tx and Rx FIFOs when zero is
491 * written to com_fifo. If this chip is the console, writing zero
492 * results in some of the chip/FIFO description being lost, so delay
493 * printing it until now.
496 aprint_normal(": %s\n", fifo_msg
);
497 if (ISSET(sc
->sc_hwflags
, COM_HW_TXFIFO_DISABLE
)) {
499 aprint_normal_dev(sc
->sc_dev
, "txfifo disabled\n");
505 tp
->t_oproc
= comstart
;
506 tp
->t_param
= comparam
;
507 tp
->t_hwiflow
= comhwiflow
;
510 sc
->sc_rbuf
= malloc(com_rbuf_size
<< 1, M_DEVBUF
, M_NOWAIT
);
511 sc
->sc_rbput
= sc
->sc_rbget
= sc
->sc_rbuf
;
512 sc
->sc_rbavail
= com_rbuf_size
;
513 if (sc
->sc_rbuf
== NULL
) {
514 aprint_error_dev(sc
->sc_dev
,
515 "unable to allocate ring buffer\n");
518 sc
->sc_ebuf
= sc
->sc_rbuf
+ (com_rbuf_size
<< 1);
522 if (!ISSET(sc
->sc_hwflags
, COM_HW_NOIEN
))
523 SET(sc
->sc_mcr
, MCR_IENABLE
);
525 if (ISSET(sc
->sc_hwflags
, COM_HW_CONSOLE
)) {
528 /* locate the major number */
529 maj
= cdevsw_lookup_major(&com_cdevsw
);
531 tp
->t_dev
= cn_tab
->cn_dev
= makedev(maj
,
532 device_unit(sc
->sc_dev
));
534 aprint_normal_dev(sc
->sc_dev
, "console\n");
539 * Allow kgdb to "take over" this port. If this is
540 * not the console and is the kgdb device, it has
541 * exclusive use. If it's the console _and_ the
542 * kgdb device, it doesn't.
544 if (regsp
->cr_iot
== comkgdbregs
.cr_iot
&&
545 regsp
->cr_iobase
== comkgdbregs
.cr_iobase
) {
546 if (!ISSET(sc
->sc_hwflags
, COM_HW_CONSOLE
)) {
547 com_kgdb_attached
= 1;
549 SET(sc
->sc_hwflags
, COM_HW_KGDB
);
551 aprint_normal_dev(sc
->sc_dev
, "kgdb\n");
555 sc
->sc_si
= softint_establish(SOFTINT_SERIAL
, comsoft
, sc
);
557 #if NRND > 0 && defined(RND_COM)
558 rnd_attach_source(&sc
->rnd_source
, device_xname(sc
->sc_dev
),
562 /* if there are no enable/disable functions, assume the device
569 SET(sc
->sc_hwflags
, COM_HW_DEV_OK
);
573 com_config(struct com_softc
*sc
)
575 struct com_regs
*regsp
= &sc
->sc_regs
;
577 /* Disable interrupts before configuring the device. */
578 if (sc
->sc_type
== COM_TYPE_PXA2x0
)
579 sc
->sc_ier
= IER_EUART
;
582 CSR_WRITE_1(regsp
, COM_REG_IER
, sc
->sc_ier
);
583 (void) CSR_READ_1(regsp
, COM_REG_IIR
);
586 /* Look for a Hayes ESP board. */
587 if (sc
->sc_type
== COM_TYPE_HAYESP
) {
589 /* Set 16550 compatibility mode */
590 bus_space_write_1(regsp
->cr_iot
, sc
->sc_hayespioh
, HAYESP_CMD1
,
592 bus_space_write_1(regsp
->cr_iot
, sc
->sc_hayespioh
, HAYESP_CMD2
,
593 HAYESP_MODE_FIFO
|HAYESP_MODE_RTS
|
596 /* Set RTS/CTS flow control */
597 bus_space_write_1(regsp
->cr_iot
, sc
->sc_hayespioh
, HAYESP_CMD1
,
599 bus_space_write_1(regsp
->cr_iot
, sc
->sc_hayespioh
, HAYESP_CMD2
,
601 bus_space_write_1(regsp
->cr_iot
, sc
->sc_hayespioh
, HAYESP_CMD2
,
604 /* Set flow control levels */
605 bus_space_write_1(regsp
->cr_iot
, sc
->sc_hayespioh
, HAYESP_CMD1
,
607 bus_space_write_1(regsp
->cr_iot
, sc
->sc_hayespioh
, HAYESP_CMD2
,
608 HAYESP_HIBYTE(HAYESP_RXHIWMARK
));
609 bus_space_write_1(regsp
->cr_iot
, sc
->sc_hayespioh
, HAYESP_CMD2
,
610 HAYESP_LOBYTE(HAYESP_RXHIWMARK
));
611 bus_space_write_1(regsp
->cr_iot
, sc
->sc_hayespioh
, HAYESP_CMD2
,
612 HAYESP_HIBYTE(HAYESP_RXLOWMARK
));
613 bus_space_write_1(regsp
->cr_iot
, sc
->sc_hayespioh
, HAYESP_CMD2
,
614 HAYESP_LOBYTE(HAYESP_RXLOWMARK
));
618 if (ISSET(sc
->sc_hwflags
, COM_HW_CONSOLE
|COM_HW_KGDB
))
619 com_enable_debugport(sc
);
624 comcngetc_detached(dev_t dev
)
630 comcnputc_detached(dev_t dev
, int c
)
636 com_detach(device_t self
, int flags
)
638 struct com_softc
*sc
= device_private(self
);
641 if (ISSET(sc
->sc_hwflags
, COM_HW_KGDB
))
644 if (ISSET(sc
->sc_hwflags
, COM_HW_CONSOLE
) &&
645 (flags
& DETACH_SHUTDOWN
) != 0)
648 if (sc
->disable
!= NULL
&& sc
->enabled
!= 0) {
653 if (ISSET(sc
->sc_hwflags
, COM_HW_CONSOLE
)) {
658 /* locate the major number */
659 maj
= cdevsw_lookup_major(&com_cdevsw
);
661 /* Nuke the vnodes for any open instances. */
662 mn
= device_unit(self
);
663 vdevgone(maj
, mn
, mn
, VCHR
);
665 mn
|= COMDIALOUT_MASK
;
666 vdevgone(maj
, mn
, mn
, VCHR
);
668 if (sc
->sc_rbuf
== NULL
) {
670 * Ring buffer allocation failed in the com_attach_subr,
671 * only the tty is allocated, and nothing else.
677 /* Free the receive buffer. */
678 free(sc
->sc_rbuf
, M_DEVBUF
);
680 /* Detach and free the tty. */
681 tty_detach(sc
->sc_tty
);
684 /* Unhook the soft interrupt handler. */
685 softint_disestablish(sc
->sc_si
);
687 #if NRND > 0 && defined(RND_COM)
688 /* Unhook the entropy source. */
689 rnd_detach_source(&sc
->rnd_source
);
691 callout_destroy(&sc
->sc_diag_callout
);
693 /* Destroy the lock. */
694 mutex_destroy(&sc
->sc_lock
);
700 com_shutdown(struct com_softc
*sc
)
702 struct tty
*tp
= sc
->sc_tty
;
704 mutex_spin_enter(&sc
->sc_lock
);
706 /* If we were asserting flow control, then deassert it. */
707 SET(sc
->sc_rx_flags
, RX_IBUF_BLOCKED
);
710 /* Clear any break condition set with TIOCSBRK. */
714 * Hang up if necessary. Wait a bit, so the other side has time to
715 * notice even if we immediately open the port again.
716 * Avoid tsleeping above splhigh().
718 if (ISSET(tp
->t_cflag
, HUPCL
)) {
720 mutex_spin_exit(&sc
->sc_lock
);
721 /* XXX will only timeout */
722 (void) kpause(ttclos
, false, hz
, NULL
);
723 mutex_spin_enter(&sc
->sc_lock
);
726 /* Turn off interrupts. */
727 if (ISSET(sc
->sc_hwflags
, COM_HW_CONSOLE
)) {
728 sc
->sc_ier
= IER_ERXRDY
; /* interrupt on break */
729 if (sc
->sc_type
== COM_TYPE_PXA2x0
)
730 sc
->sc_ier
|= IER_ERXTOUT
;
734 if (sc
->sc_type
== COM_TYPE_PXA2x0
)
735 sc
->sc_ier
|= IER_EUART
;
737 CSR_WRITE_1(&sc
->sc_regs
, COM_REG_IER
, sc
->sc_ier
);
739 mutex_spin_exit(&sc
->sc_lock
);
744 panic("com_shutdown: not enabled?");
752 comopen(dev_t dev
, int flag
, int mode
, struct lwp
*l
)
754 struct com_softc
*sc
;
759 sc
= device_lookup_private(&com_cd
, COMUNIT(dev
));
760 if (sc
== NULL
|| !ISSET(sc
->sc_hwflags
, COM_HW_DEV_OK
) ||
764 if (!device_is_active(sc
->sc_dev
))
769 * If this is the kgdb port, no other use is permitted.
771 if (ISSET(sc
->sc_hwflags
, COM_HW_KGDB
))
777 if (kauth_authorize_device_tty(l
->l_cred
, KAUTH_DEVICE_TTY_OPEN
, tp
))
783 * Do the following iff this is a first open.
785 if (!ISSET(tp
->t_state
, TS_ISOPEN
) && tp
->t_wopen
== 0) {
792 if ((*sc
->enable
)(sc
)) {
794 aprint_error_dev(sc
->sc_dev
,
795 "device enable failed\n");
798 mutex_spin_enter(&sc
->sc_lock
);
802 mutex_spin_enter(&sc
->sc_lock
);
805 /* Turn on interrupts. */
806 sc
->sc_ier
= IER_ERXRDY
| IER_ERLS
| IER_EMSC
;
807 if (sc
->sc_type
== COM_TYPE_PXA2x0
)
808 sc
->sc_ier
|= IER_EUART
| IER_ERXTOUT
;
809 CSR_WRITE_1(&sc
->sc_regs
, COM_REG_IER
, sc
->sc_ier
);
811 /* Fetch the current modem control status, needed later. */
812 sc
->sc_msr
= CSR_READ_1(&sc
->sc_regs
, COM_REG_MSR
);
814 /* Clear PPS capture state on first open. */
815 mutex_spin_enter(&timecounter_lock
);
816 memset(&sc
->sc_pps_state
, 0, sizeof(sc
->sc_pps_state
));
817 sc
->sc_pps_state
.ppscap
= PPS_CAPTUREASSERT
| PPS_CAPTURECLEAR
;
818 pps_init(&sc
->sc_pps_state
);
819 mutex_spin_exit(&timecounter_lock
);
821 mutex_spin_exit(&sc
->sc_lock
);
824 * Initialize the termios status to the defaults. Add in the
825 * sticky bits from TIOCSFLAGS.
827 if (ISSET(sc
->sc_hwflags
, COM_HW_CONSOLE
)) {
828 t
.c_ospeed
= comcons_info
.rate
;
829 t
.c_cflag
= comcons_info
.cflag
;
831 t
.c_ospeed
= TTYDEF_SPEED
;
832 t
.c_cflag
= TTYDEF_CFLAG
;
834 t
.c_ispeed
= t
.c_ospeed
;
835 if (ISSET(sc
->sc_swflags
, TIOCFLAG_CLOCAL
))
836 SET(t
.c_cflag
, CLOCAL
);
837 if (ISSET(sc
->sc_swflags
, TIOCFLAG_CRTSCTS
))
838 SET(t
.c_cflag
, CRTSCTS
);
839 if (ISSET(sc
->sc_swflags
, TIOCFLAG_MDMBUF
))
840 SET(t
.c_cflag
, MDMBUF
);
841 /* Make sure comparam() will do something. */
843 (void) comparam(tp
, &t
);
844 tp
->t_iflag
= TTYDEF_IFLAG
;
845 tp
->t_oflag
= TTYDEF_OFLAG
;
846 tp
->t_lflag
= TTYDEF_LFLAG
;
850 mutex_spin_enter(&sc
->sc_lock
);
853 * Turn on DTR. We must always do this, even if carrier is not
854 * present, because otherwise we'd have to use TIOCSDTR
855 * immediately after setting CLOCAL, which applications do not
856 * expect. We always assert DTR while the device is open
857 * unless explicitly requested to deassert it.
861 /* Clear the input ring, and unblock. */
862 sc
->sc_rbput
= sc
->sc_rbget
= sc
->sc_rbuf
;
863 sc
->sc_rbavail
= com_rbuf_size
;
865 CLR(sc
->sc_rx_flags
, RX_ANY_BLOCK
);
870 comstatus(sc
, "comopen ");
873 mutex_spin_exit(&sc
->sc_lock
);
878 error
= ttyopen(tp
, COMDIALOUT(dev
), ISSET(flag
, O_NONBLOCK
));
882 error
= (*tp
->t_linesw
->l_open
)(dev
, tp
);
889 if (!ISSET(tp
->t_state
, TS_ISOPEN
) && tp
->t_wopen
== 0) {
891 * We failed to open the device, and nobody else had it opened.
892 * Clean up the state as appropriate.
901 comclose(dev_t dev
, int flag
, int mode
, struct lwp
*l
)
903 struct com_softc
*sc
=
904 device_lookup_private(&com_cd
, COMUNIT(dev
));
905 struct tty
*tp
= sc
->sc_tty
;
907 /* XXX This is for cons.c. */
908 if (!ISSET(tp
->t_state
, TS_ISOPEN
))
911 (*tp
->t_linesw
->l_close
)(tp
, flag
);
914 if (COM_ISALIVE(sc
) == 0)
917 if (!ISSET(tp
->t_state
, TS_ISOPEN
) && tp
->t_wopen
== 0) {
919 * Although we got a last close, the device may still be in
920 * use; e.g. if this was the dialout node, and there are still
921 * processes waiting for carrier on the non-dialout node.
930 comread(dev_t dev
, struct uio
*uio
, int flag
)
932 struct com_softc
*sc
=
933 device_lookup_private(&com_cd
, COMUNIT(dev
));
934 struct tty
*tp
= sc
->sc_tty
;
936 if (COM_ISALIVE(sc
) == 0)
939 return ((*tp
->t_linesw
->l_read
)(tp
, uio
, flag
));
943 comwrite(dev_t dev
, struct uio
*uio
, int flag
)
945 struct com_softc
*sc
=
946 device_lookup_private(&com_cd
, COMUNIT(dev
));
947 struct tty
*tp
= sc
->sc_tty
;
949 if (COM_ISALIVE(sc
) == 0)
952 return ((*tp
->t_linesw
->l_write
)(tp
, uio
, flag
));
956 compoll(dev_t dev
, int events
, struct lwp
*l
)
958 struct com_softc
*sc
=
959 device_lookup_private(&com_cd
, COMUNIT(dev
));
960 struct tty
*tp
= sc
->sc_tty
;
962 if (COM_ISALIVE(sc
) == 0)
965 return ((*tp
->t_linesw
->l_poll
)(tp
, events
, l
));
971 struct com_softc
*sc
=
972 device_lookup_private(&com_cd
, COMUNIT(dev
));
973 struct tty
*tp
= sc
->sc_tty
;
979 comioctl(dev_t dev
, u_long cmd
, void *data
, int flag
, struct lwp
*l
)
981 struct com_softc
*sc
;
985 sc
= device_lookup_private(&com_cd
, COMUNIT(dev
));
988 if (COM_ISALIVE(sc
) == 0)
993 error
= (*tp
->t_linesw
->l_ioctl
)(tp
, cmd
, data
, flag
, l
);
994 if (error
!= EPASSTHROUGH
)
997 error
= ttioctl(tp
, cmd
, data
, flag
, l
);
998 if (error
!= EPASSTHROUGH
)
1004 error
= kauth_authorize_device_tty(l
->l_cred
,
1005 KAUTH_DEVICE_TTY_PRIVSET
, tp
);
1015 mutex_spin_enter(&sc
->sc_lock
);
1035 *(int *)data
= sc
->sc_swflags
;
1039 sc
->sc_swflags
= *(int *)data
;
1045 tiocm_to_com(sc
, cmd
, *(int *)data
);
1049 *(int *)data
= com_to_tiocm(sc
);
1052 case PPS_IOC_CREATE
:
1053 case PPS_IOC_DESTROY
:
1054 case PPS_IOC_GETPARAMS
:
1055 case PPS_IOC_SETPARAMS
:
1056 case PPS_IOC_GETCAP
:
1059 case PPS_IOC_KCBIND
:
1061 mutex_spin_enter(&timecounter_lock
);
1062 error
= pps_ioctl(cmd
, data
, &sc
->sc_pps_state
);
1063 mutex_spin_exit(&timecounter_lock
);
1066 case TIOCDCDTIMESTAMP
: /* XXX old, overloaded API used by xntpd v3 */
1067 mutex_spin_enter(&timecounter_lock
);
1068 #ifndef PPS_TRAILING_EDGE
1069 TIMESPEC_TO_TIMEVAL((struct timeval
*)data
,
1070 &sc
->sc_pps_state
.ppsinfo
.assert_timestamp
);
1072 TIMESPEC_TO_TIMEVAL((struct timeval
*)data
,
1073 &sc
->sc_pps_state
.ppsinfo
.clear_timestamp
);
1075 mutex_spin_exit(&timecounter_lock
);
1079 error
= EPASSTHROUGH
;
1083 mutex_spin_exit(&sc
->sc_lock
);
1087 comstatus(sc
, "comioctl ");
1094 com_schedrx(struct com_softc
*sc
)
1097 sc
->sc_rx_ready
= 1;
1099 /* Wake up the poller. */
1100 softint_schedule(sc
->sc_si
);
1104 com_break(struct com_softc
*sc
, int onoff
)
1108 SET(sc
->sc_lcr
, LCR_SBREAK
);
1110 CLR(sc
->sc_lcr
, LCR_SBREAK
);
1112 if (!sc
->sc_heldchange
) {
1113 if (sc
->sc_tx_busy
) {
1114 sc
->sc_heldtbc
= sc
->sc_tbc
;
1116 sc
->sc_heldchange
= 1;
1118 com_loadchannelregs(sc
);
1123 com_modem(struct com_softc
*sc
, int onoff
)
1126 if (sc
->sc_mcr_dtr
== 0)
1130 SET(sc
->sc_mcr
, sc
->sc_mcr_dtr
);
1132 CLR(sc
->sc_mcr
, sc
->sc_mcr_dtr
);
1134 if (!sc
->sc_heldchange
) {
1135 if (sc
->sc_tx_busy
) {
1136 sc
->sc_heldtbc
= sc
->sc_tbc
;
1138 sc
->sc_heldchange
= 1;
1140 com_loadchannelregs(sc
);
1145 tiocm_to_com(struct com_softc
*sc
, u_long how
, int ttybits
)
1150 if (ISSET(ttybits
, TIOCM_DTR
))
1151 SET(combits
, MCR_DTR
);
1152 if (ISSET(ttybits
, TIOCM_RTS
))
1153 SET(combits
, MCR_RTS
);
1157 CLR(sc
->sc_mcr
, combits
);
1161 SET(sc
->sc_mcr
, combits
);
1165 CLR(sc
->sc_mcr
, MCR_DTR
| MCR_RTS
);
1166 SET(sc
->sc_mcr
, combits
);
1170 if (!sc
->sc_heldchange
) {
1171 if (sc
->sc_tx_busy
) {
1172 sc
->sc_heldtbc
= sc
->sc_tbc
;
1174 sc
->sc_heldchange
= 1;
1176 com_loadchannelregs(sc
);
1181 com_to_tiocm(struct com_softc
*sc
)
1186 combits
= sc
->sc_mcr
;
1187 if (ISSET(combits
, MCR_DTR
))
1188 SET(ttybits
, TIOCM_DTR
);
1189 if (ISSET(combits
, MCR_RTS
))
1190 SET(ttybits
, TIOCM_RTS
);
1192 combits
= sc
->sc_msr
;
1193 if (ISSET(combits
, MSR_DCD
))
1194 SET(ttybits
, TIOCM_CD
);
1195 if (ISSET(combits
, MSR_CTS
))
1196 SET(ttybits
, TIOCM_CTS
);
1197 if (ISSET(combits
, MSR_DSR
))
1198 SET(ttybits
, TIOCM_DSR
);
1199 if (ISSET(combits
, MSR_RI
| MSR_TERI
))
1200 SET(ttybits
, TIOCM_RI
);
1202 if (ISSET(sc
->sc_ier
, IER_ERXRDY
| IER_ETXRDY
| IER_ERLS
| IER_EMSC
))
1203 SET(ttybits
, TIOCM_LE
);
1209 cflag2lcr(tcflag_t cflag
)
1213 switch (ISSET(cflag
, CSIZE
)) {
1215 SET(lcr
, LCR_5BITS
);
1218 SET(lcr
, LCR_6BITS
);
1221 SET(lcr
, LCR_7BITS
);
1224 SET(lcr
, LCR_8BITS
);
1227 if (ISSET(cflag
, PARENB
)) {
1228 SET(lcr
, LCR_PENAB
);
1229 if (!ISSET(cflag
, PARODD
))
1230 SET(lcr
, LCR_PEVEN
);
1232 if (ISSET(cflag
, CSTOPB
))
1233 SET(lcr
, LCR_STOPB
);
1239 comparam(struct tty
*tp
, struct termios
*t
)
1241 struct com_softc
*sc
=
1242 device_lookup_private(&com_cd
, COMUNIT(tp
->t_dev
));
1246 if (COM_ISALIVE(sc
) == 0)
1250 if (sc
->sc_type
== COM_TYPE_HAYESP
) {
1251 int prescaler
, speed
;
1254 * Calculate UART clock prescaler. It should be in
1257 for (prescaler
= 0, speed
= t
->c_ospeed
; prescaler
< 4;
1258 prescaler
++, speed
/= 2)
1259 if ((ospeed
= comspeed(speed
, sc
->sc_frequency
,
1265 sc
->sc_prescaler
= prescaler
;
1268 ospeed
= comspeed(t
->c_ospeed
, sc
->sc_frequency
, sc
->sc_type
);
1270 /* Check requested parameters. */
1273 if (t
->c_ispeed
&& t
->c_ispeed
!= t
->c_ospeed
)
1277 * For the console, always force CLOCAL and !HUPCL, so that the port
1280 if (ISSET(sc
->sc_swflags
, TIOCFLAG_SOFTCAR
) ||
1281 ISSET(sc
->sc_hwflags
, COM_HW_CONSOLE
)) {
1282 SET(t
->c_cflag
, CLOCAL
);
1283 CLR(t
->c_cflag
, HUPCL
);
1287 * If there were no changes, don't do anything. This avoids dropping
1288 * input and improves performance when all we did was frob things like
1291 if (tp
->t_ospeed
== t
->c_ospeed
&&
1292 tp
->t_cflag
== t
->c_cflag
)
1295 lcr
= ISSET(sc
->sc_lcr
, LCR_SBREAK
) | cflag2lcr(t
->c_cflag
);
1297 mutex_spin_enter(&sc
->sc_lock
);
1302 * If we're not in a mode that assumes a connection is present, then
1303 * ignore carrier changes.
1305 if (ISSET(t
->c_cflag
, CLOCAL
| MDMBUF
))
1308 sc
->sc_msr_dcd
= MSR_DCD
;
1310 * Set the flow control pins depending on the current flow control
1313 if (ISSET(t
->c_cflag
, CRTSCTS
)) {
1314 sc
->sc_mcr_dtr
= MCR_DTR
;
1315 sc
->sc_mcr_rts
= MCR_RTS
;
1316 sc
->sc_msr_cts
= MSR_CTS
;
1317 sc
->sc_efr
= EFR_AUTORTS
| EFR_AUTOCTS
;
1318 } else if (ISSET(t
->c_cflag
, MDMBUF
)) {
1320 * For DTR/DCD flow control, make sure we don't toggle DTR for
1321 * carrier detection.
1324 sc
->sc_mcr_rts
= MCR_DTR
;
1325 sc
->sc_msr_cts
= MSR_DCD
;
1329 * If no flow control, then always set RTS. This will make
1330 * the other side happy if it mistakenly thinks we're doing
1331 * RTS/CTS flow control.
1333 sc
->sc_mcr_dtr
= MCR_DTR
| MCR_RTS
;
1337 if (ISSET(sc
->sc_mcr
, MCR_DTR
))
1338 SET(sc
->sc_mcr
, MCR_RTS
);
1340 CLR(sc
->sc_mcr
, MCR_RTS
);
1342 sc
->sc_msr_mask
= sc
->sc_msr_cts
| sc
->sc_msr_dcd
;
1346 CLR(sc
->sc_mcr
, sc
->sc_mcr_dtr
);
1348 SET(sc
->sc_mcr
, sc
->sc_mcr_dtr
);
1351 sc
->sc_dlbl
= ospeed
;
1352 sc
->sc_dlbh
= ospeed
>> 8;
1355 * Set the FIFO threshold based on the receive speed.
1357 * * If it's a low speed, it's probably a mouse or some other
1358 * interactive device, so set the threshold low.
1359 * * If it's a high speed, trim the trigger level down to prevent
1361 * * Otherwise set it a bit higher.
1363 if (sc
->sc_type
== COM_TYPE_HAYESP
)
1364 sc
->sc_fifo
= FIFO_DMA_MODE
| FIFO_ENABLE
| FIFO_TRIGGER_8
;
1365 else if (ISSET(sc
->sc_hwflags
, COM_HW_FIFO
)) {
1366 if (t
->c_ospeed
<= 1200)
1367 sc
->sc_fifo
= FIFO_ENABLE
| FIFO_TRIGGER_1
;
1368 else if (t
->c_ospeed
<= 38400)
1369 sc
->sc_fifo
= FIFO_ENABLE
| FIFO_TRIGGER_8
;
1371 sc
->sc_fifo
= FIFO_ENABLE
| FIFO_TRIGGER_4
;
1375 /* And copy to tty. */
1376 tp
->t_ispeed
= t
->c_ospeed
;
1377 tp
->t_ospeed
= t
->c_ospeed
;
1378 tp
->t_cflag
= t
->c_cflag
;
1380 if (!sc
->sc_heldchange
) {
1381 if (sc
->sc_tx_busy
) {
1382 sc
->sc_heldtbc
= sc
->sc_tbc
;
1384 sc
->sc_heldchange
= 1;
1386 com_loadchannelregs(sc
);
1389 if (!ISSET(t
->c_cflag
, CHWFLOW
)) {
1390 /* Disable the high water mark. */
1393 if (ISSET(sc
->sc_rx_flags
, RX_TTY_OVERFLOWED
)) {
1394 CLR(sc
->sc_rx_flags
, RX_TTY_OVERFLOWED
);
1397 if (ISSET(sc
->sc_rx_flags
, RX_TTY_BLOCKED
|RX_IBUF_BLOCKED
)) {
1398 CLR(sc
->sc_rx_flags
, RX_TTY_BLOCKED
|RX_IBUF_BLOCKED
);
1402 sc
->sc_r_hiwat
= com_rbuf_hiwat
;
1403 sc
->sc_r_lowat
= com_rbuf_lowat
;
1406 mutex_spin_exit(&sc
->sc_lock
);
1409 * Update the tty layer's idea of the carrier bit, in case we changed
1410 * CLOCAL or MDMBUF. We don't hang up here; we only do that by
1413 (void) (*tp
->t_linesw
->l_modem
)(tp
, ISSET(sc
->sc_msr
, MSR_DCD
));
1417 comstatus(sc
, "comparam ");
1420 if (!ISSET(t
->c_cflag
, CHWFLOW
)) {
1421 if (sc
->sc_tx_stopped
) {
1422 sc
->sc_tx_stopped
= 0;
1431 com_iflush(struct com_softc
*sc
)
1433 struct com_regs
*regsp
= &sc
->sc_regs
;
1443 /* flush any pending I/O */
1444 while (ISSET(CSR_READ_1(regsp
, COM_REG_LSR
), LSR_RXRDY
)
1451 CSR_READ_1(regsp
, COM_REG_RXDATA
);
1454 aprint_error_dev(sc
->sc_dev
, "com_iflush timeout %02x\n", reg
);
1459 com_loadchannelregs(struct com_softc
*sc
)
1461 struct com_regs
*regsp
= &sc
->sc_regs
;
1463 /* XXXXX necessary? */
1466 if (sc
->sc_type
== COM_TYPE_PXA2x0
)
1467 CSR_WRITE_1(regsp
, COM_REG_IER
, IER_EUART
);
1469 CSR_WRITE_1(regsp
, COM_REG_IER
, 0);
1471 if (sc
->sc_type
== COM_TYPE_OMAP
) {
1472 /* disable before changing settings */
1473 CSR_WRITE_1(regsp
, COM_REG_MDR1
, MDR1_MODE_DISABLE
);
1476 if (ISSET(sc
->sc_hwflags
, COM_HW_FLOW
)) {
1477 KASSERT(sc
->sc_type
!= COM_TYPE_AU1x00
);
1478 KASSERT(sc
->sc_type
!= COM_TYPE_16550_NOERS
);
1479 /* no EFR on alchemy */
1480 CSR_WRITE_1(regsp
, COM_REG_EFR
, sc
->sc_efr
);
1481 CSR_WRITE_1(regsp
, COM_REG_LCR
, LCR_EERS
);
1483 if (sc
->sc_type
== COM_TYPE_AU1x00
) {
1484 /* alchemy has single separate 16-bit clock divisor register */
1485 CSR_WRITE_2(regsp
, COM_REG_DLBL
, sc
->sc_dlbl
+
1486 (sc
->sc_dlbh
<< 8));
1488 CSR_WRITE_1(regsp
, COM_REG_LCR
, sc
->sc_lcr
| LCR_DLAB
);
1489 CSR_WRITE_1(regsp
, COM_REG_DLBL
, sc
->sc_dlbl
);
1490 CSR_WRITE_1(regsp
, COM_REG_DLBH
, sc
->sc_dlbh
);
1492 CSR_WRITE_1(regsp
, COM_REG_LCR
, sc
->sc_lcr
);
1493 CSR_WRITE_1(regsp
, COM_REG_MCR
, sc
->sc_mcr_active
= sc
->sc_mcr
);
1494 CSR_WRITE_1(regsp
, COM_REG_FIFO
, sc
->sc_fifo
);
1496 if (sc
->sc_type
== COM_TYPE_HAYESP
) {
1497 bus_space_write_1(regsp
->cr_iot
, sc
->sc_hayespioh
, HAYESP_CMD1
,
1498 HAYESP_SETPRESCALER
);
1499 bus_space_write_1(regsp
->cr_iot
, sc
->sc_hayespioh
, HAYESP_CMD2
,
1503 if (sc
->sc_type
== COM_TYPE_OMAP
) {
1504 /* setup the fifos. the FCR value is not used as long
1505 as SCR[6] and SCR[7] are 0, which they are at reset
1506 and we never touch the SCR register */
1507 uint8_t rx_fifo_trig
= 40;
1508 uint8_t tx_fifo_trig
= 60;
1509 uint8_t rx_start
= 8;
1510 uint8_t rx_halt
= 60;
1511 uint8_t tlr_value
= ((rx_fifo_trig
>>2) << 4) | (tx_fifo_trig
>>2);
1512 uint8_t tcr_value
= ((rx_start
>>2) << 4) | (rx_halt
>>2);
1514 /* enable access to TCR & TLR */
1515 CSR_WRITE_1(regsp
, COM_REG_MCR
, sc
->sc_mcr
| MCR_TCR_TLR
);
1517 /* write tcr and tlr values */
1518 CSR_WRITE_1(regsp
, COM_REG_TLR
, tlr_value
);
1519 CSR_WRITE_1(regsp
, COM_REG_TCR
, tcr_value
);
1521 /* disable access to TCR & TLR */
1522 CSR_WRITE_1(regsp
, COM_REG_MCR
, sc
->sc_mcr
);
1524 /* enable again, but mode is based on speed */
1525 if (sc
->sc_tty
->t_termios
.c_ospeed
> 230400) {
1526 CSR_WRITE_1(regsp
, COM_REG_MDR1
, MDR1_MODE_UART_13X
);
1528 CSR_WRITE_1(regsp
, COM_REG_MDR1
, MDR1_MODE_UART_16X
);
1532 CSR_WRITE_1(regsp
, COM_REG_IER
, sc
->sc_ier
);
1536 comhwiflow(struct tty
*tp
, int block
)
1538 struct com_softc
*sc
=
1539 device_lookup_private(&com_cd
, COMUNIT(tp
->t_dev
));
1541 if (COM_ISALIVE(sc
) == 0)
1544 if (sc
->sc_mcr_rts
== 0)
1547 mutex_spin_enter(&sc
->sc_lock
);
1550 if (!ISSET(sc
->sc_rx_flags
, RX_TTY_BLOCKED
)) {
1551 SET(sc
->sc_rx_flags
, RX_TTY_BLOCKED
);
1555 if (ISSET(sc
->sc_rx_flags
, RX_TTY_OVERFLOWED
)) {
1556 CLR(sc
->sc_rx_flags
, RX_TTY_OVERFLOWED
);
1559 if (ISSET(sc
->sc_rx_flags
, RX_TTY_BLOCKED
)) {
1560 CLR(sc
->sc_rx_flags
, RX_TTY_BLOCKED
);
1565 mutex_spin_exit(&sc
->sc_lock
);
1570 * (un)block input via hw flowcontrol
1573 com_hwiflow(struct com_softc
*sc
)
1575 struct com_regs
*regsp
= &sc
->sc_regs
;
1577 if (sc
->sc_mcr_rts
== 0)
1580 if (ISSET(sc
->sc_rx_flags
, RX_ANY_BLOCK
)) {
1581 CLR(sc
->sc_mcr
, sc
->sc_mcr_rts
);
1582 CLR(sc
->sc_mcr_active
, sc
->sc_mcr_rts
);
1584 SET(sc
->sc_mcr
, sc
->sc_mcr_rts
);
1585 SET(sc
->sc_mcr_active
, sc
->sc_mcr_rts
);
1587 CSR_WRITE_1(regsp
, COM_REG_MCR
, sc
->sc_mcr_active
);
1592 comstart(struct tty
*tp
)
1594 struct com_softc
*sc
=
1595 device_lookup_private(&com_cd
, COMUNIT(tp
->t_dev
));
1596 struct com_regs
*regsp
= &sc
->sc_regs
;
1599 if (COM_ISALIVE(sc
) == 0)
1603 if (ISSET(tp
->t_state
, TS_BUSY
| TS_TIMEOUT
| TS_TTSTOP
))
1605 if (sc
->sc_tx_stopped
)
1610 /* Grab the first contiguous region of buffer space. */
1615 tba
= tp
->t_outq
.c_cf
;
1616 tbc
= ndqb(&tp
->t_outq
, 0);
1618 mutex_spin_enter(&sc
->sc_lock
);
1624 SET(tp
->t_state
, TS_BUSY
);
1627 /* Enable transmit completion interrupts if necessary. */
1628 if (!ISSET(sc
->sc_ier
, IER_ETXRDY
)) {
1629 SET(sc
->sc_ier
, IER_ETXRDY
);
1630 CSR_WRITE_1(regsp
, COM_REG_IER
, sc
->sc_ier
);
1633 /* Output the first chunk of the contiguous buffer. */
1634 if (!ISSET(sc
->sc_hwflags
, COM_HW_NO_TXPRELOAD
)) {
1638 if (n
> sc
->sc_fifolen
)
1640 CSR_WRITE_MULTI(regsp
, COM_REG_TXDATA
, sc
->sc_tba
, n
);
1645 mutex_spin_exit(&sc
->sc_lock
);
1652 * Stop output on a line.
1655 comstop(struct tty
*tp
, int flag
)
1657 struct com_softc
*sc
=
1658 device_lookup_private(&com_cd
, COMUNIT(tp
->t_dev
));
1660 mutex_spin_enter(&sc
->sc_lock
);
1661 if (ISSET(tp
->t_state
, TS_BUSY
)) {
1662 /* Stop transmitting at the next chunk. */
1665 if (!ISSET(tp
->t_state
, TS_TTSTOP
))
1666 SET(tp
->t_state
, TS_FLUSH
);
1668 mutex_spin_exit(&sc
->sc_lock
);
1674 struct com_softc
*sc
= arg
;
1675 int overflows
, floods
;
1677 mutex_spin_enter(&sc
->sc_lock
);
1678 overflows
= sc
->sc_overflows
;
1679 sc
->sc_overflows
= 0;
1680 floods
= sc
->sc_floods
;
1683 mutex_spin_exit(&sc
->sc_lock
);
1685 log(LOG_WARNING
, "%s: %d silo overflow%s, %d ibuf flood%s\n",
1686 device_xname(sc
->sc_dev
),
1687 overflows
, overflows
== 1 ? "" : "s",
1688 floods
, floods
== 1 ? "" : "s");
1692 com_rxsoft(struct com_softc
*sc
, struct tty
*tp
)
1694 int (*rint
)(int, struct tty
*) = tp
->t_linesw
->l_rint
;
1702 scc
= cc
= com_rbuf_size
- sc
->sc_rbavail
;
1704 if (cc
== com_rbuf_size
) {
1706 if (sc
->sc_errors
++ == 0)
1707 callout_reset(&sc
->sc_diag_callout
, 60 * hz
,
1711 /* If not yet open, drop the entire buffer content here */
1712 if (!ISSET(tp
->t_state
, TS_ISOPEN
)) {
1715 get
-= com_rbuf_size
<< 1;
1721 if (ISSET(lsr
, LSR_OE
| LSR_BI
| LSR_FE
| LSR_PE
)) {
1722 if (ISSET(lsr
, LSR_OE
)) {
1724 if (sc
->sc_errors
++ == 0)
1725 callout_reset(&sc
->sc_diag_callout
,
1726 60 * hz
, comdiag
, sc
);
1728 if (ISSET(lsr
, LSR_BI
| LSR_FE
))
1730 if (ISSET(lsr
, LSR_PE
))
1733 if ((*rint
)(code
, tp
) == -1) {
1735 * The line discipline's buffer is out of space.
1737 if (!ISSET(sc
->sc_rx_flags
, RX_TTY_BLOCKED
)) {
1739 * We're either not using flow control, or the
1740 * line discipline didn't tell us to block for
1741 * some reason. Either way, we have no way to
1742 * know when there's more space available, so
1743 * just drop the rest of the data.
1747 get
-= com_rbuf_size
<< 1;
1751 * Don't schedule any more receive processing
1752 * until the line discipline tells us there's
1753 * space available (through comhwiflow()).
1754 * Leave the rest of the data in the input
1757 SET(sc
->sc_rx_flags
, RX_TTY_OVERFLOWED
);
1769 mutex_spin_enter(&sc
->sc_lock
);
1771 cc
= sc
->sc_rbavail
+= scc
- cc
;
1772 /* Buffers should be ok again, release possible block. */
1773 if (cc
>= sc
->sc_r_lowat
) {
1774 if (ISSET(sc
->sc_rx_flags
, RX_IBUF_OVERFLOWED
)) {
1775 CLR(sc
->sc_rx_flags
, RX_IBUF_OVERFLOWED
);
1776 SET(sc
->sc_ier
, IER_ERXRDY
);
1778 if (sc
->sc_type
== COM_TYPE_PXA2x0
)
1779 SET(sc
->sc_ier
, IER_ERXTOUT
);
1781 CSR_WRITE_1(&sc
->sc_regs
, COM_REG_IER
, sc
->sc_ier
);
1783 if (ISSET(sc
->sc_rx_flags
, RX_IBUF_BLOCKED
)) {
1784 CLR(sc
->sc_rx_flags
, RX_IBUF_BLOCKED
);
1788 mutex_spin_exit(&sc
->sc_lock
);
1793 com_txsoft(struct com_softc
*sc
, struct tty
*tp
)
1796 CLR(tp
->t_state
, TS_BUSY
);
1797 if (ISSET(tp
->t_state
, TS_FLUSH
))
1798 CLR(tp
->t_state
, TS_FLUSH
);
1800 ndflush(&tp
->t_outq
, (int)(sc
->sc_tba
- tp
->t_outq
.c_cf
));
1801 (*tp
->t_linesw
->l_start
)(tp
);
1805 com_stsoft(struct com_softc
*sc
, struct tty
*tp
)
1809 mutex_spin_enter(&sc
->sc_lock
);
1811 delta
= sc
->sc_msr_delta
;
1812 sc
->sc_msr_delta
= 0;
1813 mutex_spin_exit(&sc
->sc_lock
);
1815 if (ISSET(delta
, sc
->sc_msr_dcd
)) {
1817 * Inform the tty layer that carrier detect changed.
1819 (void) (*tp
->t_linesw
->l_modem
)(tp
, ISSET(msr
, MSR_DCD
));
1822 if (ISSET(delta
, sc
->sc_msr_cts
)) {
1823 /* Block or unblock output according to flow control. */
1824 if (ISSET(msr
, sc
->sc_msr_cts
)) {
1825 sc
->sc_tx_stopped
= 0;
1826 (*tp
->t_linesw
->l_start
)(tp
);
1828 sc
->sc_tx_stopped
= 1;
1834 comstatus(sc
, "com_stsoft");
1841 struct com_softc
*sc
= arg
;
1844 if (COM_ISALIVE(sc
) == 0)
1849 if (sc
->sc_rx_ready
) {
1850 sc
->sc_rx_ready
= 0;
1854 if (sc
->sc_st_check
) {
1855 sc
->sc_st_check
= 0;
1859 if (sc
->sc_tx_done
) {
1868 struct com_softc
*sc
= arg
;
1869 struct com_regs
*regsp
= &sc
->sc_regs
;
1875 if (COM_ISALIVE(sc
) == 0)
1878 KASSERT(regsp
!= NULL
);
1880 mutex_spin_enter(&sc
->sc_lock
);
1881 iir
= CSR_READ_1(regsp
, COM_REG_IIR
);
1882 if (ISSET(iir
, IIR_NOPEND
)) {
1883 mutex_spin_exit(&sc
->sc_lock
);
1889 cc
= sc
->sc_rbavail
;
1894 lsr
= CSR_READ_1(regsp
, COM_REG_LSR
);
1895 if (ISSET(lsr
, LSR_BI
)) {
1898 cn_check_magic(sc
->sc_tty
->t_dev
,
1899 CNC_BREAK
, com_cnm_state
);
1902 #if defined(KGDB) && !defined(DDB)
1903 if (ISSET(sc
->sc_hwflags
, COM_HW_KGDB
)) {
1910 if (ISSET(lsr
, LSR_RCV_MASK
) &&
1911 !ISSET(sc
->sc_rx_flags
, RX_IBUF_OVERFLOWED
)) {
1914 put
[0] = CSR_READ_1(regsp
, COM_REG_RXDATA
);
1916 cn_check_magic(sc
->sc_tty
->t_dev
,
1917 put
[0], com_cnm_state
);
1925 lsr
= CSR_READ_1(regsp
, COM_REG_LSR
);
1926 if (!ISSET(lsr
, LSR_RCV_MASK
))
1931 * Current string of incoming characters ended because
1932 * no more data was available or we ran out of space.
1933 * Schedule a receive event if any data was received.
1934 * If we're out of space, turn off receive interrupts.
1937 sc
->sc_rbavail
= cc
;
1938 if (!ISSET(sc
->sc_rx_flags
, RX_TTY_OVERFLOWED
))
1939 sc
->sc_rx_ready
= 1;
1942 * See if we are in danger of overflowing a buffer. If
1943 * so, use hardware flow control to ease the pressure.
1945 if (!ISSET(sc
->sc_rx_flags
, RX_IBUF_BLOCKED
) &&
1946 cc
< sc
->sc_r_hiwat
) {
1947 SET(sc
->sc_rx_flags
, RX_IBUF_BLOCKED
);
1952 * If we're out of space, disable receive interrupts
1953 * until the queue has drained a bit.
1956 SET(sc
->sc_rx_flags
, RX_IBUF_OVERFLOWED
);
1958 if (sc
->sc_type
== COM_TYPE_PXA2x0
)
1959 CLR(sc
->sc_ier
, IER_ERXRDY
|IER_ERXTOUT
);
1962 CLR(sc
->sc_ier
, IER_ERXRDY
);
1963 CSR_WRITE_1(regsp
, COM_REG_IER
, sc
->sc_ier
);
1966 if ((iir
& (IIR_RXRDY
|IIR_TXRDY
)) == IIR_RXRDY
) {
1967 (void) CSR_READ_1(regsp
, COM_REG_RXDATA
);
1972 msr
= CSR_READ_1(regsp
, COM_REG_MSR
);
1973 delta
= msr
^ sc
->sc_msr
;
1975 if ((sc
->sc_pps_state
.ppsparam
.mode
& PPS_CAPTUREBOTH
) &&
1976 (delta
& MSR_DCD
)) {
1977 mutex_spin_enter(&timecounter_lock
);
1978 pps_capture(&sc
->sc_pps_state
);
1979 pps_event(&sc
->sc_pps_state
,
1983 mutex_spin_exit(&timecounter_lock
);
1987 * Process normal status changes
1989 if (ISSET(delta
, sc
->sc_msr_mask
)) {
1990 SET(sc
->sc_msr_delta
, delta
);
1993 * Stop output immediately if we lose the output
1994 * flow control signal or carrier detect.
1996 if (ISSET(~msr
, sc
->sc_msr_mask
)) {
2001 comstatus(sc
, "comintr ");
2005 sc
->sc_st_check
= 1;
2007 } while (!ISSET((iir
=
2008 CSR_READ_1(regsp
, COM_REG_IIR
)), IIR_NOPEND
) &&
2010 * Since some device (e.g., ST16C1550) doesn't clear IIR_TXRDY
2011 * by IIR read, so we can't do this way: `process all interrupts,
2012 * then do TX if possble'.
2014 (iir
& IIR_IMASK
) != IIR_TXRDY
);
2017 * Read LSR again, since there may be an interrupt between
2018 * the last LSR read and IIR read above.
2020 lsr
= CSR_READ_1(regsp
, COM_REG_LSR
);
2023 * See if data can be transmitted as well.
2024 * Schedule tx done event if no data left
2025 * and tty was marked busy.
2027 if (ISSET(lsr
, LSR_TXRDY
)) {
2029 * If we've delayed a parameter change, do it now, and restart
2032 if (sc
->sc_heldchange
) {
2033 com_loadchannelregs(sc
);
2034 sc
->sc_heldchange
= 0;
2035 sc
->sc_tbc
= sc
->sc_heldtbc
;
2039 /* Output the next chunk of the contiguous buffer, if any. */
2040 if (sc
->sc_tbc
> 0) {
2044 if (n
> sc
->sc_fifolen
)
2046 CSR_WRITE_MULTI(regsp
, COM_REG_TXDATA
, sc
->sc_tba
, n
);
2050 /* Disable transmit completion interrupts if necessary. */
2051 if (ISSET(sc
->sc_ier
, IER_ETXRDY
)) {
2052 CLR(sc
->sc_ier
, IER_ETXRDY
);
2053 CSR_WRITE_1(regsp
, COM_REG_IER
, sc
->sc_ier
);
2055 if (sc
->sc_tx_busy
) {
2062 if (!ISSET((iir
= CSR_READ_1(regsp
, COM_REG_IIR
)), IIR_NOPEND
))
2065 mutex_spin_exit(&sc
->sc_lock
);
2067 /* Wake up the poller. */
2068 softint_schedule(sc
->sc_si
);
2070 #if NRND > 0 && defined(RND_COM)
2071 rnd_add_uint32(&sc
->rnd_source
, iir
| lsr
);
2078 * The following functions are polled getc and putc routines, shared
2079 * by the console and kgdb glue.
2081 * The read-ahead code is so that you can detect pending in-band
2082 * cn_magic in polled mode while doing output rather than having to
2083 * wait until the kernel decides it needs input.
2086 #define MAX_READAHEAD 20
2087 static int com_readahead
[MAX_READAHEAD
];
2088 static int com_readaheadcount
= 0;
2091 com_common_getc(dev_t dev
, struct com_regs
*regsp
)
2093 int s
= splserial();
2096 /* got a character from reading things earlier */
2097 if (com_readaheadcount
> 0) {
2100 c
= com_readahead
[0];
2101 for (i
= 1; i
< com_readaheadcount
; i
++) {
2102 com_readahead
[i
-1] = com_readahead
[i
];
2104 com_readaheadcount
--;
2109 /* block until a character becomes available */
2110 while (!ISSET(stat
= CSR_READ_1(regsp
, COM_REG_LSR
), LSR_RXRDY
))
2113 c
= CSR_READ_1(regsp
, COM_REG_RXDATA
);
2114 stat
= CSR_READ_1(regsp
, COM_REG_IIR
);
2116 int cn_trapped
= 0; /* unused */
2118 extern int db_active
;
2121 cn_check_magic(dev
, c
, com_cnm_state
);
2128 com_common_putc(dev_t dev
, struct com_regs
*regsp
, int c
)
2130 int s
= splserial();
2131 int cin
, stat
, timo
;
2133 if (com_readaheadcount
< MAX_READAHEAD
2134 && ISSET(stat
= CSR_READ_1(regsp
, COM_REG_LSR
), LSR_RXRDY
)) {
2136 cin
= CSR_READ_1(regsp
, COM_REG_RXDATA
);
2137 stat
= CSR_READ_1(regsp
, COM_REG_IIR
);
2138 cn_check_magic(dev
, cin
, com_cnm_state
);
2139 com_readahead
[com_readaheadcount
++] = cin
;
2142 /* wait for any pending transmission to finish */
2144 while (!ISSET(CSR_READ_1(regsp
, COM_REG_LSR
), LSR_TXRDY
) && --timo
)
2147 CSR_WRITE_1(regsp
, COM_REG_TXDATA
, c
);
2148 COM_BARRIER(regsp
, BR
| BW
);
2154 * Initialize UART for use as console or KGDB line.
2157 cominit(struct com_regs
*regsp
, int rate
, int frequency
, int type
,
2161 if (bus_space_map(regsp
->cr_iot
, regsp
->cr_iobase
, regsp
->cr_nports
, 0,
2163 return (ENOMEM
); /* ??? */
2165 if (type
== COM_TYPE_OMAP
) {
2166 /* disable before changing settings */
2167 CSR_WRITE_1(regsp
, COM_REG_MDR1
, MDR1_MODE_DISABLE
);
2170 rate
= comspeed(rate
, frequency
, type
);
2171 if (type
!= COM_TYPE_AU1x00
) {
2172 /* no EFR on alchemy */
2173 if (type
!= COM_TYPE_16550_NOERS
) {
2174 CSR_WRITE_1(regsp
, COM_REG_LCR
, LCR_EERS
);
2175 CSR_WRITE_1(regsp
, COM_REG_EFR
, 0);
2177 CSR_WRITE_1(regsp
, COM_REG_LCR
, LCR_DLAB
);
2178 CSR_WRITE_1(regsp
, COM_REG_DLBL
, rate
& 0xff);
2179 CSR_WRITE_1(regsp
, COM_REG_DLBH
, rate
>> 8);
2181 CSR_WRITE_1(regsp
, COM_REG_DLBL
, rate
);
2183 CSR_WRITE_1(regsp
, COM_REG_LCR
, cflag2lcr(cflag
));
2184 CSR_WRITE_1(regsp
, COM_REG_MCR
, MCR_DTR
| MCR_RTS
);
2185 CSR_WRITE_1(regsp
, COM_REG_FIFO
,
2186 FIFO_ENABLE
| FIFO_RCV_RST
| FIFO_XMT_RST
| FIFO_TRIGGER_1
);
2188 if (type
== COM_TYPE_OMAP
) {
2189 /* setup the fifos. the FCR value is not used as long
2190 as SCR[6] and SCR[7] are 0, which they are at reset
2191 and we never touch the SCR register */
2192 uint8_t rx_fifo_trig
= 40;
2193 uint8_t tx_fifo_trig
= 60;
2194 uint8_t rx_start
= 8;
2195 uint8_t rx_halt
= 60;
2196 uint8_t tlr_value
= ((rx_fifo_trig
>>2) << 4) | (tx_fifo_trig
>>2);
2197 uint8_t tcr_value
= ((rx_start
>>2) << 4) | (rx_halt
>>2);
2199 /* enable access to TCR & TLR */
2200 CSR_WRITE_1(regsp
, COM_REG_MCR
, MCR_DTR
| MCR_RTS
| MCR_TCR_TLR
);
2202 /* write tcr and tlr values */
2203 CSR_WRITE_1(regsp
, COM_REG_TLR
, tlr_value
);
2204 CSR_WRITE_1(regsp
, COM_REG_TCR
, tcr_value
);
2206 /* disable access to TCR & TLR */
2207 CSR_WRITE_1(regsp
, COM_REG_MCR
, MCR_DTR
| MCR_RTS
);
2209 /* enable again, but mode is based on speed */
2210 if (rate
> 230400) {
2211 CSR_WRITE_1(regsp
, COM_REG_MDR1
, MDR1_MODE_UART_13X
);
2213 CSR_WRITE_1(regsp
, COM_REG_MDR1
, MDR1_MODE_UART_16X
);
2218 if (type
== COM_TYPE_PXA2x0
)
2219 CSR_WRITE_1(regsp
, COM_REG_IER
, IER_EUART
);
2222 CSR_WRITE_1(regsp
, COM_REG_IER
, 0);
2228 comcnattach1(struct com_regs
*regsp
, int rate
, int frequency
, int type
,
2233 comcons_info
.regs
= *regsp
;
2235 res
= cominit(&comcons_info
.regs
, rate
, frequency
, type
, cflag
);
2240 cn_init_magic(&com_cnm_state
);
2241 cn_set_magic("\047\001"); /* default magic is BREAK */
2243 comcons_info
.frequency
= frequency
;
2244 comcons_info
.type
= type
;
2245 comcons_info
.rate
= rate
;
2246 comcons_info
.cflag
= cflag
;
2252 comcnattach(bus_space_tag_t iot
, bus_addr_t iobase
, int rate
, int frequency
,
2253 int type
, tcflag_t cflag
)
2255 struct com_regs regs
;
2257 memset(®s
, 0, sizeof regs
);
2259 regs
.cr_iobase
= iobase
;
2260 regs
.cr_nports
= COM_NPORTS
;
2262 memcpy(regs
.cr_map
, com_std_map
, sizeof (regs
.cr_map
));
2265 return comcnattach1(®s
, rate
, frequency
, type
, cflag
);
2271 return comcnattach1(&comcons_info
.regs
, comcons_info
.rate
,
2272 comcons_info
.frequency
, comcons_info
.type
, comcons_info
.cflag
);
2276 comcngetc(dev_t dev
)
2279 return (com_common_getc(dev
, &comcons_info
.regs
));
2283 * Console kernel output character routine.
2286 comcnputc(dev_t dev
, int c
)
2289 com_common_putc(dev
, &comcons_info
.regs
, c
);
2293 comcnpollc(dev_t dev
, int on
)
2300 com_kgdb_attach1(struct com_regs
*regsp
, int rate
, int frequency
, int type
,
2305 if (regsp
->cr_iot
== comcons_info
.regs
.cr_iot
&&
2306 regsp
->cr_iobase
== comcons_info
.regs
.cr_iobase
) {
2308 return (EBUSY
); /* cannot share with console */
2310 comkgdbregs
= *regsp
;
2311 comkgdbregs
.cr_ioh
= comcons_info
.regs
.cr_ioh
;
2314 comkgdbregs
= *regsp
;
2315 res
= cominit(&comkgdbregs
, rate
, frequency
, type
, cflag
);
2320 * XXXfvdl this shouldn't be needed, but the cn_magic goo
2321 * expects this to be initialized
2323 cn_init_magic(&com_cnm_state
);
2324 cn_set_magic("\047\001");
2327 kgdb_attach(com_kgdb_getc
, com_kgdb_putc
, NULL
);
2328 kgdb_dev
= 123; /* unneeded, only to satisfy some tests */
2334 com_kgdb_attach(bus_space_tag_t iot
, bus_addr_t iobase
, int rate
,
2335 int frequency
, int type
, tcflag_t cflag
)
2337 struct com_regs regs
;
2340 regs
.cr_nports
= COM_NPORTS
;
2341 regs
.cr_iobase
= iobase
;
2343 memcpy(regs
.cr_map
, com_std_map
, sizeof (regs
.cr_map
));
2346 return com_kgdb_attach1(®s
, rate
, frequency
, type
, cflag
);
2351 com_kgdb_getc(void *arg
)
2354 return (com_common_getc(NODEV
, &comkgdbregs
));
2359 com_kgdb_putc(void *arg
, int c
)
2362 com_common_putc(NODEV
, &comkgdbregs
, c
);
2366 /* helper function to identify the com ports used by
2367 console or KGDB (and not yet autoconf attached) */
2369 com_is_console(bus_space_tag_t iot
, bus_addr_t iobase
, bus_space_handle_t
*ioh
)
2371 bus_space_handle_t help
;
2373 if (!comconsattached
&&
2374 iot
== comcons_info
.regs
.cr_iot
&&
2375 iobase
== comcons_info
.regs
.cr_iobase
)
2376 help
= comcons_info
.regs
.cr_ioh
;
2378 else if (!com_kgdb_attached
&&
2379 iot
== comkgdbregs
.cr_iot
&& iobase
== comkgdbregs
.cr_iobase
)
2380 help
= comkgdbregs
.cr_ioh
;
2391 * this routine exists to serve as a shutdown hook for systems that
2392 * have firmware which doesn't interact properly with a com device in
2396 com_cleanup(device_t self
, int how
)
2398 struct com_softc
*sc
= device_private(self
);
2400 if (ISSET(sc
->sc_hwflags
, COM_HW_FIFO
))
2401 CSR_WRITE_1(&sc
->sc_regs
, COM_REG_FIFO
, 0);
2407 com_suspend(device_t self
, pmf_qual_t qual
)
2409 struct com_softc
*sc
= device_private(self
);
2412 if (ISSET(sc
->sc_hwflags
, COM_HW_CONSOLE
) && cn_tab
== &comcons
)
2413 cn_tab
= &comcons_suspend
;
2416 CSR_WRITE_1(&sc
->sc_regs
, COM_REG_IER
, 0);
2417 (void)CSR_READ_1(&sc
->sc_regs
, COM_REG_IIR
);
2423 com_resume(device_t self
, pmf_qual_t qual
)
2425 struct com_softc
*sc
= device_private(self
);
2427 mutex_spin_enter(&sc
->sc_lock
);
2428 com_loadchannelregs(sc
);
2429 mutex_spin_exit(&sc
->sc_lock
);