sys/dev/mca/3c523reg.h

   1 /*      $NetBSD: 3c523reg.h,v 1.1 2001/03/16 23:03:15 jdolecek Exp $    */
   2
   3 /*-
   4  * Copyright (c) 2001 The NetBSD Foundation, Inc.
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  17  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  18  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  19  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  20  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  21  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  22  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  23  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  24  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  26  * POSSIBILITY OF SUCH DAMAGE.
  27  */
  28
  29 /*
  30  * The 3c523 i/o space is 8 bytes long. The first 6 bytes is the ethernet
  31  * address, followed by control & status register and card's revision number.
  32  */
  33 #define ELMC_IOADDR_BASE        0x300
  34 #define ELMC_IOADDR_SIZE        8
  35 #define ELMC_CTRL               6       /* control & status register */
  36 #define ELMC_REVISION           7       /* revision, first 4 bits only */
  37 #define ELMC_REVISION_MASK      0xf
  38
  39 /*
  40  * The following define the bits for the control & status register.
  41  *
  42  * The bank select registers can be used if there is more than 16KB
  43  * of memory on the card. Bank 3 is the one for the bottom 16KB
  44  * (i.e. the common size), but the card defaults to bank 0. Hence we
  45  * need to set the bank to 3 to make the card operate at all.
  46  */
  47 #define ELMC_CTRL_BS0           0x01    /* RW bank select */
  48 #define ELMC_CTRL_BS1           0x02    /* RW bank select */
  49 #define ELMC_CTRL_BS3           (ELMC_CTRL_BS0|ELMC_CTRL_BS1)   /* shortcut */
  50 #define ELMC_CTRL_INT           0x04    /* RW interrupt enable, assert high */
  51 #define ELMC_CTRL_LOOP          0x20    /* RW loopback enable, assert high */
  52 #define ELMC_CTRL_CHA           0x40    /* RW channel attention, assert high */
  53 #define ELMC_CTRL_RST           0x80    /* RW 82586 reset, assert low */
  54
  55 /*
  56  * The base memory space address is 0xc0000 (see 3c523 docs). The card
  57  * has actually 24KB of memory, but we only use first 16KB -
  58  * the upper 8KB is card's BIOS.
  59  */
  60 #define ELMC_MADDR_BASE         0x0c0000
  61 #define ELMC_MADDR_SIZE         0x4000          /* use only 16K of shared mem */
  62