sys/dev/mca/if_tr_mca.c

   1 /* $NetBSD: if_tr_mca.c,v 1.20 2009/05/12 13:15:24 cegger Exp $ */
   2
   3 /*_
   4  * Copyright (c) 2000 The NetBSD Foundation, Inc.
   5  * All rights reserved.
   6  *
   7  * This code is derived from software contributed to The NetBSD Foundation
   8  * by Gregory McGarry <g.mcgarry@ieee.org>.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions
  12  * are met:
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  29  * POSSIBILITY OF SUCH DAMAGE.
  30  */
  31
  32 #include <sys/cdefs.h>
  33 __KERNEL_RCSID(0, "$NetBSD: if_tr_mca.c,v 1.20 2009/05/12 13:15:24 cegger Exp $");
  34
  35 #include <sys/param.h>
  36 #include <sys/systm.h>
  37 #include <sys/socket.h>
  38 #include <sys/device.h>
  39
  40 #include <dev/mca/mcareg.h>
  41 #include <dev/mca/mcavar.h>
  42 #include <dev/mca/mcadevs.h>
  43
  44 #include <net/if.h>
  45 #include <net/if_media.h>
  46 #include <net/if_ether.h>
  47
  48 #include <dev/ic/tropicreg.h>
  49 #include <dev/ic/tropicvar.h>
  50
  51 #ifdef DEBUG
  52 #define DPRINTF(x) printf x
  53 #else
  54 #define DPRINTF(x)
  55 #endif
  56
  57 #define TR_PRI_IOADDR 0x0a20
  58 #define TR_ALT_IOADDR 0x0a24
  59 #define TR_PIOSIZE 4
  60 #define TR_MMIOSIZE 8192
  61 #define TR_MBPS_4 0
  62 #define TR_MBPS_16 1
  63
  64 int     tr_mca_probe(device_t, cfdata_t, void *);
  65 void    tr_mca_attach(device_t, device_t, void *);
  66
  67 CFATTACH_DECL(tr_mca, sizeof(struct tr_softc),
  68     tr_mca_probe, tr_mca_attach, NULL, NULL);
  69
  70 /* supported products */
  71 static const struct tr_mca_product {
  72         u_int32_t tr_id;
  73         const char *tr_name;
  74 } tr_mca_products[] = {
  75         { MCA_PRODUCT_ITR, "IBM Token Ring 16/4 Adapter/A" },
  76         { 0, NULL },
  77 };
  78
  79 static const struct tr_mca_product *tr_mca_lookup(int);
  80
  81 static const struct tr_mca_product *
  82 tr_mca_lookup(int id)
  83 {
  84         const struct tr_mca_product *trp;
  85
  86         for(trp = tr_mca_products; trp->tr_name; trp++)
  87                 if (trp->tr_id == id)
  88                         return (trp);
  89
  90         return (NULL);
  91 }
  92
  93 int
  94 tr_mca_probe(device_t parent, cfdata_t match,
  95     void *aux)
  96 {
  97         struct mca_attach_args *ma = aux;
  98
  99         if (tr_mca_lookup(ma->ma_id) != NULL)
 100                 return (1);
 101
 102         return (0);
 103 }
 104
 105
 106 void
 107 tr_mca_attach(device_t parent, device_t self, void *aux)
 108 {
 109         struct tr_softc *sc = device_private(self);
 110         struct mca_attach_args *ma = aux;
 111         bus_space_handle_t pioh, mmioh, sramh;
 112         int iobase, irq, sram_size, sram_addr, rom_addr;
 113         int pos2, pos3, pos4, pos5;
 114         const struct tr_mca_product *tp;
 115
 116         pos2 = mca_conf_read(ma->ma_mc, ma->ma_slot, 2);
 117         pos3 = mca_conf_read(ma->ma_mc, ma->ma_slot, 3);
 118         pos4 = mca_conf_read(ma->ma_mc, ma->ma_slot, 4);
 119         pos5 = mca_conf_read(ma->ma_mc, ma->ma_slot, 5);
 120
 121         /*
 122          * POS register 2: (adf pos0)
 123          *
 124          * 7 6 5 4 3 2 1 0
 125          * \___________/ \__ enable: 0=adapter disabled, 1=adapter enabled
 126          *       \__________ RAM addr: pos2&0xfe
 127          *
 128          * POS register 3: (adf pos1)
 129          *
 130          * 7 6 5 4 3 2 1 0
 131          * | \___/ | | | \__ port address: 1=0x0a24-0x0a27, 0=0x0a20-0x0a23
 132          * |   |   \ / \____ speed: 0=4Mbps, 1=16Mbps
 133          * |   |    \_______ RAM size: 00=8kb, 01=16kb, 10=32kb, 11=64kb
 134          * |   \____________ reserved: 010
 135          * \________________ irq component: 0=2, 1=3 (see also pos4)
 136          *
 137          * POS register 4: (adf pos2)
 138          *
 139          * 7 6 5 4 3 2 1 0
 140          * \___________/ \__ interrupt controller: 0=1st, 1=2nd
 141          *       \__________ ROM address: pos4&0xfe
 142          *
 143          * POS register 5: (adf pos3)
 144          *
 145          * 7 6 5 4 3 2 1 0
 146          * | | \_____/
 147          * | |    \_____ reserved: 0x0
 148          * | \__________ autosense: 0=off, 1=on
 149          * \____________ boot rom: 0=enabled, 1=disabled
 150          */
 151
 152         if (pos3 & 0x01)
 153                 iobase = TR_ALT_IOADDR;
 154         else
 155                 iobase = TR_PRI_IOADDR;
 156
 157         irq = 2 + (pos3 >> 7) + ((pos4 & 0x01) << 3);
 158         if (irq == 2)
 159                 irq = 9;
 160
 161         tp = tr_mca_lookup(ma->ma_id);
 162
 163         printf(" slot %d irq %d: %s\n", ma->ma_slot + 1, irq, tp->tr_name);
 164
 165         sram_size = 8 << (((pos3 & 0x0c) >> 2) + 10);
 166         sram_addr = (pos2 & 0xfe) << 12;
 167
 168         rom_addr = (pos4 & 0xfe) << 12;
 169
 170         /* map the pio registers */
 171         if (bus_space_map(ma->ma_iot, iobase, TR_PIOSIZE, 0, &pioh)) {
 172                 aprint_error_dev(&sc->sc_dev, "unable to map PIO space\n");
 173                 return;
 174         }
 175
 176         /* map the mmio registers */
 177         if (bus_space_map(ma->ma_memt, rom_addr, TR_MMIOSIZE, 0, &mmioh)) {
 178                 aprint_error_dev(&sc->sc_dev, "unable to map MMIO space\n");
 179                 return;
 180         }
 181
 182         /* map the sram space */
 183         if (bus_space_map(ma->ma_memt, sram_addr, sram_size, 0, &sramh)) {
 184                 aprint_error_dev(&sc->sc_dev, "unable to map SRAM space\n");
 185                 return;
 186         }
 187
 188         sc->sc_piot = ma->ma_iot;
 189         sc->sc_pioh = pioh;
 190         sc->sc_memt = ma->ma_memt;
 191         sc->sc_mmioh = mmioh;
 192         sc->sc_sramh = sramh;
 193
 194         /* set ACA offset */
 195         sc->sc_aca = TR_ACA_OFFSET;
 196         sc->sc_memwinsz = sram_size;
 197         sc->sc_maddr = sram_addr;
 198
 199         /*
 200          * Determine total RAM on adapter and decide how much to use.
 201          * XXX Since we don't use RAM paging, use sc_memwinsz for now.
 202          */
 203         sc->sc_memsize = sc->sc_memwinsz;
 204         sc->sc_memreserved = 0;
 205
 206         if (tr_reset(sc) != 0)
 207                 return;
 208
 209         /* XXX not implemented (yet) */
 210         sc->sc_mediastatus = NULL;
 211         sc->sc_mediachange = NULL;
 212
 213         /* do generic attach */
 214         if (tr_attach(sc) != 0)
 215                 return;
 216
 217         /* establish interrupt handler */
 218         sc->sc_ih = mca_intr_establish(ma->ma_mc, irq, IPL_NET, tr_intr, sc);
 219         if (sc->sc_ih == NULL) {
 220                 aprint_error_dev(&sc->sc_dev, "couldn't establish interrupt handler\n");
 221                 return;
 222         }
 223
 224 }