sys/dev/pci/btvmeivar.h

   1 /* $NetBSD: btvmeivar.h,v 1.1.38.4 2005/02/04 11:46:37 skrll Exp $ */
   2
   3 /*
   4  * Copyright (c) 1999
   5  *      Matthias Drochner.  All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  21  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  22  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  23  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  25  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  26  *
  27  */
  28
  29 struct b3_617_vmeintrhand {
  30         TAILQ_ENTRY(b3_617_vmeintrhand) ih_next;
  31         int (*ih_fun)(void*);
  32         void *ih_arg;
  33         int ih_level;
  34         int ih_vector;
  35         int ih_prior;
  36         u_long ih_count;
  37 };
  38
  39 struct b3_617_softc {
  40         struct device sc_dev;
  41
  42         /* tags passed in from PCI */
  43         pci_chipset_tag_t sc_pc;
  44         bus_space_tag_t csrt, mapt;
  45         bus_space_handle_t csrh, maph;
  46         bus_addr_t vmepbase; /* physical PCI address */
  47         bus_dma_tag_t sc_dmat;
  48         void *sc_ih;
  49
  50         bus_space_tag_t sc_vmet;
  51
  52         struct vme_range csrwindow, dmawindow24, dmawindow32;
  53
  54         /* tags passed to VME devices */
  55         struct vme_chipset_tag sc_vct;
  56
  57         /* list of VME interrupt handlers */
  58         TAILQ_HEAD(, b3_617_vmeintrhand) intrhdls;
  59         int strayintrs;
  60
  61         /*
  62          * management of adapter mapping tables
  63          */
  64         /* max fragmentation of scatter tables */
  65 #define NVMEMAP 20
  66
  67         struct extent *vmeext;
  68         char vmemap[EXTENT_FIXED_STORAGE_SIZE(NVMEMAP)];
  69 };
  70
  71 #define read_csr_byte(sc, reg) \
  72   bus_space_read_1(sc->csrt, sc->csrh, reg)
  73 #define write_csr_byte(sc, reg, val) \
  74   bus_space_write_1(sc->csrt, sc->csrh, reg, val)
  75 #define read_csr_word(sc, reg) \
  76   bus_space_read_2(sc->csrt, sc->csrh, reg)
  77 #define write_csr_word(sc, reg, val) \
  78   bus_space_write_2(sc->csrt, sc->csrh, reg, val)
  79
  80 #define write_mapmem(sc, ofs, val) \
  81   bus_space_write_4(sc->mapt, sc->maph, ofs, val)
  82 #define read_mapmem(sc, ofs) \
  83   bus_space_read_4(sc->mapt, sc->maph, ofs)
  84
  85 #define VME_PAGESIZE 0x1000
  86 #define PCI_PAGESIZE 0x1000
  87 #define DMA_PAGESIZE 0x1000
  88
  89 /* shared between driver parts */
  90 int b3_617_reset(struct b3_617_softc*);
  91 int b3_617_init(struct b3_617_softc*);
  92 #ifdef notyet /* for detach */
  93 void b3_617_halt(struct b3_617_softc*);
  94 #endif
  95 int b3_617_intr(void*);
  96 #if 0
  97 void b3_617_cntlrdma_done(struct b3_617_softc*);
  98 #endif
  99
 100 /* exported via tag structs */
 101 int b3_617_map_vme(void *, vme_addr_t, vme_size_t,
 102                         vme_am_t, vme_datasize_t, vme_swap_t,
 103                         bus_space_tag_t *, bus_space_handle_t *,
 104                         vme_mapresc_t*);
 105 void b3_617_unmap_vme(void *, vme_mapresc_t);
 106
 107 int b3_617_vme_probe(void *, vme_addr_t, vme_size_t, vme_am_t,
 108                           vme_datasize_t,
 109                           int (*)(void *, bus_space_tag_t, bus_space_handle_t),
 110                           void *);
 111
 112 int b3_617_map_vmeint(void *, int, int, vme_intr_handle_t *);
 113 void *b3_617_establish_vmeint(void *, vme_intr_handle_t, int,
 114                                    int (*)(void *), void *);
 115 void b3_617_disestablish_vmeint(void *, void *);
 116
 117 int b3_617_dmamap_create(void *, vme_size_t,
 118                               vme_am_t, vme_datasize_t, vme_swap_t,
 119                               int, vme_size_t, vme_addr_t,
 120                               int, bus_dmamap_t *);
 121 void b3_617_dmamap_destroy(void *, bus_dmamap_t);
 122
 123 int b3_617_dmamem_alloc(void *, vme_size_t,
 124                              vme_am_t, vme_datasize_t, vme_swap_t,
 125                              bus_dma_segment_t *, int, int *, int);
 126 void b3_617_dmamem_free(void *, bus_dma_segment_t *, int);