sys/dev/pci/cmpcivar.h

   1 /*      $NetBSD: cmpcivar.h,v 1.9 2005/12/11 12:22:48 christos Exp $    */
   2
   3 /*
   4  * Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
   5  * All rights reserved.
   6  *
   7  * This code is derived from software contributed to The NetBSD Foundation
   8  * by Takuya SHIOZAKI <tshiozak@NetBSD.org> .
   9  *
  10  * This code is derived from software contributed to The NetBSD Foundation
  11  * by ITOH Yasufumi.
  12  *
  13  * Redistribution and use in source and binary forms, with or without
  14  * modification, are permitted provided that the following conditions
  15  * are met:
  16  * 1. Redistributions of source code must retain the above copyright
  17  *    notice, this list of conditions and the following disclaimer.
  18  * 2. Redistributions in binary form must reproduce the above copyright
  19  *    notice, this list of conditions and the following disclaimer in the
  20  *    documentation and/or other materials provided with the distribution.
  21  *
  22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  32  * SUCH DAMAGE.
  33  *
  34  */
  35
  36 /* C-Media CMI8x38 Audio Chip Support */
  37
  38 #ifndef _DEV_PCI_CMPCIVAR_H_
  39 #define _DEV_PCI_CMPCIVAR_H_ (1)
  40
  41
  42 /*
  43  * DMA pool
  44  */
  45 struct cmpci_dmanode {
  46         bus_dma_tag_t           cd_tag;
  47         int                     cd_nsegs;
  48         bus_dma_segment_t       cd_segs[1];
  49         bus_dmamap_t            cd_map;
  50         void *                  cd_addr;
  51         size_t                  cd_size;
  52         struct cmpci_dmanode    *cd_next;
  53 };
  54
  55 typedef struct cmpci_dmanode *cmpci_dmapool_t;
  56 #define KVADDR(dma)  ((void *)(dma)->cd_addr)
  57 #define DMAADDR(dma) ((dma)->cd_map->dm_segs[0].ds_addr)
  58
  59
  60 /*
  61  * Mixer device
  62  *
  63  * Note that cmpci_query_devinfo() is optimized depending on
  64  * the order of this.  Be careful if you change the values.
  65  */
  66 #define CMPCI_DAC_VOL                   0       /* inputs.dac */
  67 #define CMPCI_FM_VOL                    1       /* inputs.fmsynth */
  68 #define CMPCI_CD_VOL                    2       /* inputs.cd */
  69 #define CMPCI_LINE_IN_VOL               3       /* inputs.line */
  70 #define CMPCI_AUX_IN_VOL                4       /* inputs.aux */
  71 #define CMPCI_MIC_VOL                   5       /* inputs.mic */
  72
  73 #define CMPCI_DAC_MUTE                  6       /* inputs.dac.mute */
  74 #define CMPCI_FM_MUTE                   7       /* inputs.fmsynth.mute */
  75 #define CMPCI_CD_MUTE                   8       /* inputs.cd.mute */
  76 #define CMPCI_LINE_IN_MUTE              9       /* inputs.line.mute */
  77 #define CMPCI_AUX_IN_MUTE               10      /* inputs.aux.mute */
  78 #define CMPCI_MIC_MUTE                  11      /* inputs.mic.mute */
  79
  80 #define CMPCI_MIC_PREAMP                12      /* inputs.mic.preamp */
  81 #define CMPCI_PCSPEAKER                 13      /* inputs.speaker */
  82
  83 #define CMPCI_RECORD_SOURCE             14      /* record.source */
  84 #define CMPCI_MIC_RECVOL                15      /* record.mic */
  85
  86 #define CMPCI_PLAYBACK_MODE             16      /* playback.mode */
  87 #define CMPCI_SPDIF_IN_SELECT           17      /* spdif.input */
  88 #define CMPCI_SPDIF_IN_PHASE            18      /* spdif.input.phase */
  89 #define CMPCI_SPDIF_LOOP                19      /* spdif.output */
  90 #define CMPCI_SPDIF_OUT_PLAYBACK        20      /* spdif.output.playback */
  91 #define CMPCI_SPDIF_OUT_VOLTAGE         21      /* spdif.output.voltage */
  92 #define CMPCI_MONITOR_DAC               22      /* spdif.monitor */
  93
  94 #define CMPCI_MASTER_VOL                23      /* outputs.master */
  95 #define CMPCI_REAR                      24      /* outputs.rear */
  96 #define CMPCI_INDIVIDUAL                25      /* outputs.rear.individual */
  97 #define CMPCI_REVERSE                   26      /* outputs.rear.reverse */
  98 #define CMPCI_SURROUND                  27      /* outputs.surround */
  99
 100 #define CMPCI_NDEVS                     28
 101
 102 #define CMPCI_INPUT_CLASS               28
 103 #define CMPCI_OUTPUT_CLASS              29
 104 #define CMPCI_RECORD_CLASS              30
 105 #define CMPCI_PLAYBACK_CLASS            31
 106 #define CMPCI_SPDIF_CLASS               32
 107
 108 #define CmpciNspdif                     "spdif"
 109 #define CmpciCspdif                     "spdif"
 110 #define CmpciNspdin                     "spdin"
 111 #define CmpciNspdin1                    "spdin1"
 112 #define CmpciNspdin2                    "spdin2"
 113 #define CmpciNspdout                    "spdout"
 114 #define CmpciNplayback                  "playback"
 115 #define CmpciCplayback                  "playback"
 116 #define CmpciNlegacy                    "legacy"
 117 #define CmpciNvoltage                   "voltage"
 118 #define CmpciNphase                     "phase"
 119 #define CmpciNpositive                  "positive"
 120 #define CmpciNnegative                  "negative"
 121 #define CmpciNrear                      "rear"
 122 #define CmpciNindividual                "individual"
 123 #define CmpciNreverse                   "reverse"
 124 #define CmpciNhigh_v                    "5V"
 125 #define CmpciNlow_v                     "0.5V"
 126 #define CmpciNsurround                  "surround"
 127
 128 /* record.source bitmap (see cmpci_set_in_ports()) */
 129 #define CMPCI_RECORD_SOURCE_MIC         CMPCI_SB16_MIXER_MIC_SRC    /* mic */
 130 #define CMPCI_RECORD_SOURCE_CD          CMPCI_SB16_MIXER_CD_SRC_R   /* cd */
 131 #define CMPCI_RECORD_SOURCE_LINE_IN     CMPCI_SB16_MIXER_LINE_SRC_R /* line */
 132 #define CMPCI_RECORD_SOURCE_AUX_IN      (1 << 8)                    /* aux */
 133 #define CMPCI_RECORD_SOURCE_WAVE        (1 << 9)                    /* wave */
 134 #define CMPCI_RECORD_SOURCE_FM          CMPCI_SB16_MIXER_FM_SRC_R   /* fmsynth*/
 135 #define CMPCI_RECORD_SOURCE_SPDIF       (1 << 10)                   /* spdif */
 136
 137 /* playback.mode */
 138 #define CMPCI_PLAYBACK_MODE_WAVE        0               /* dac */
 139 #define CMPCI_PLAYBACK_MODE_SPDIF       1               /* spdif */
 140
 141 /* spdif.input */
 142 #define CMPCI_SPDIFIN_SPDIFIN2  0x01
 143 #define CMPCI_SPDIFIN_SPDIFOUT  0x02
 144 #define CMPCI_SPDIF_IN_SPDIN1   0                       /* spdin1 */
 145 #define CMPCI_SPDIF_IN_SPDIN2   CMPCI_SPDIFIN_SPDIFIN2  /* spdin2 */
 146 #define CMPCI_SPDIF_IN_SPDOUT   (CMPCI_SPDIFIN_SPDIFIN2|CMPCI_SPDIFIN_SPDIFOUT)
 147                                                         /* spdout */
 148 /* spdif.input.phase */
 149 #define CMPCI_SPDIF_IN_PHASE_POSITIVE   0               /* positive */
 150 #define CMPCI_SPDIF_IN_PHASE_NEGATIVE   1               /* negative */
 151
 152 /* spdif.output */
 153 #define CMPCI_SPDIF_LOOP_OFF            0               /* playback */
 154 #define CMPCI_SPDIF_LOOP_ON             1               /* spdin */
 155
 156 /* spdif.output.playback */
 157 #define CMPCI_SPDIF_OUT_PLAYBACK_WAVE   0               /* wave */
 158 #define CMPCI_SPDIF_OUT_PLAYBACK_LEGACY 1               /* legacy */
 159
 160 /* spdif.output.voltage */
 161 #define CMPCI_SPDIF_OUT_VOLTAGE_HIGH    0               /* 5V */
 162 #define CMPCI_SPDIF_OUT_VOLTAGE_LOW     1               /* 0.5V */
 163
 164 /* spdif.monitor */
 165 #define CMPCI_MONDAC_ENABLE     0x01
 166 #define CMPCI_MONDAC_SPDOUT     0x02
 167 #define CMPCI_MONITOR_DAC_OFF    0                      /* off */
 168 #define CMPCI_MONITOR_DAC_SPDIN  CMPCI_MONDAC_ENABLE    /* spdin */
 169 #define CMPCI_MONITOR_DAC_SPDOUT (CMPCI_MONDAC_ENABLE | CMPCI_MONDAC_SPDOUT)
 170                                                         /* spdout */
 171
 172 /*
 173  * softc
 174  */
 175 struct cmpci_softc {
 176         struct device           sc_dev;
 177
 178         /* model/rev */
 179         uint32_t                sc_id;
 180         uint32_t                sc_class;
 181         uint32_t                sc_capable;
 182 #define CMPCI_CAP_SPDIN                 0x00000001
 183 #define CMPCI_CAP_SPDOUT                0x00000002
 184 #define CMPCI_CAP_SPDLOOP               0x00000004
 185 #define CMPCI_CAP_SPDLEGACY             0x00000008
 186 #define CMPCI_CAP_SPDIN_MONITOR         0x00000010
 187 #define CMPCI_CAP_XSPDOUT               0x00000020
 188 #define CMPCI_CAP_SPDOUT_VOLTAGE        0x00000040
 189 #define CMPCI_CAP_SPDOUT_48K            0x00000080
 190 #define CMPCI_CAP_SURROUND              0x00000100
 191 #define CMPCI_CAP_REAR                  0x00000200
 192 #define CMPCI_CAP_INDIVIDUAL_REAR       0x00000400
 193 #define CMPCI_CAP_REVERSE_FR            0x00000800
 194 #define CMPCI_CAP_SPDIN_PHASE           0x00001000
 195 #define CMPCI_CAP_2ND_SPDIN             0x00002000
 196
 197 #define CMPCI_CAP_CMI8338       (CMPCI_CAP_SPDIN | CMPCI_CAP_SPDOUT | \
 198                                 CMPCI_CAP_SPDLOOP | CMPCI_CAP_SPDLEGACY)
 199
 200 #define CMPCI_CAP_CMI8738       (CMPCI_CAP_CMI8338 | \
 201                                 CMPCI_CAP_SPDIN_MONITOR | \
 202                                 CMPCI_CAP_XSPDOUT | \
 203                                 CMPCI_CAP_SPDOUT_VOLTAGE | \
 204                                 CMPCI_CAP_SPDOUT_48K | CMPCI_CAP_SURROUND |\
 205                                 CMPCI_CAP_REAR | \
 206                                 CMPCI_CAP_INDIVIDUAL_REAR | \
 207                                 CMPCI_CAP_REVERSE_FR | \
 208                                 CMPCI_CAP_SPDIN_PHASE | \
 209                                 CMPCI_CAP_2ND_SPDIN /* XXX 6ch only */)
 210 #define CMPCI_ISCAP(sc, name)   (sc->sc_capable & CMPCI_CAP_ ## name)
 211
 212         /* I/O Base device */
 213         bus_space_tag_t         sc_iot;
 214         bus_space_handle_t      sc_ioh;
 215
 216         bus_space_handle_t      sc_mpu_ioh;
 217         struct device           *sc_mpudev;
 218
 219         /* intr handle */
 220         pci_intr_handle_t       *sc_ih;
 221
 222         /* DMA */
 223         bus_dma_tag_t           sc_dmat;
 224         cmpci_dmapool_t         sc_dmap;
 225
 226         /* each channel */
 227         struct {
 228                 void            (*intr)(void *);
 229                 void            *intr_arg;
 230                 int             md_divide;
 231         } sc_play, sc_rec;
 232
 233         /* value of CMPCI_REG_MISC register */
 234         uint32_t                sc_reg_misc;
 235
 236         /* mixer */
 237         uint8_t                 sc_gain[CMPCI_NDEVS][2];
 238 #define CMPCI_LEFT      0
 239 #define CMPCI_RIGHT     1
 240 #define CMPCI_LR        0
 241         uint16_t                sc_in_mask;
 242 };
 243
 244
 245 #endif /* _DEV_PCI_CMPCIVAR_H_ */
 246
 247 /* end of file */