1 /**************************************************************************
3 Copyright (c) 2007, Chelsio Inc.
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
12 2. Neither the name of the Chelsio Corporation nor the names of its
13 contributors may be used to endorse or promote products derived from
14 this software without specific prior written permission.
16 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
20 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 POSSIBILITY OF SUCH DAMAGE.
28 ***************************************************************************/
30 #include <sys/cdefs.h>
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/kernel.h>
36 #include <machine/bus.h>
37 #include <sys/ioccom.h>
39 #include <sys/socket.h>
40 #include <sys/sockio.h>
41 #include <sys/sysctl.h>
42 #include <sys/queue.h>
46 #include <net/if_arp.h>
47 #include <net/if_dl.h>
48 #include <net/if_media.h>
49 #include <net/if_types.h>
51 #include <netinet/in_systm.h>
52 #include <netinet/in.h>
53 #include <netinet/ip.h>
54 #include <netinet/tcp.h>
55 #include <netinet/udp.h>
57 #include <dev/pci/pcireg.h>
58 #include <dev/pci/pcivar.h>
60 #include <dev/pci/cxgb_include.h>
61 #include <altq/altq_conf.h>
63 int cxgb_initialized
= FALSE
;
65 int atomic_fetchadd_int(volatile int *p
, int v
)
73 int atomic_add_int(volatile int *p
, int v
)
79 int atomic_load_acq_int(volatile int *p
)
84 void atomic_store_rel_int(volatile int *p
, int v
)
89 u_short
in_cksum_hdr(struct ip
*ih
)
92 u_short
*p
= (u_short
*)ih
;
105 void m_cljset(struct mbuf
*m
, void *cl
, int type
)
107 MEXTADD(m
, cl
, m
->m_len
, M_DEVBUF
, NULL
, NULL
);
111 _m_explode(struct mbuf
*m
)
113 int i
, offset
, type
, first
, len
;
115 struct mbuf
*m0
, *head
= NULL
;
122 KASSERT((m0
->m_flags
& M_PKTHDR
) == 0,
123 ("pkthdr set on intermediate mbuf - pre"));
128 if (len
!= m
->m_pkthdr
.len
)
129 panic("at start len=%d pktlen=%d", len
, m
->m_pkthdr
.len
);
131 mv
= (struct mbuf_vec
*)((m
)->m_pktdat
);
132 first
= mv
->mv_first
;
133 for (i
= mv
->mv_count
+ first
- 1; i
> first
; i
--) {
134 type
= mbuf_vec_get_type(mv
, i
);
135 cl
= mv
->mv_vec
[i
].mi_base
;
136 offset
= mv
->mv_vec
[i
].mi_offset
;
137 len
= mv
->mv_vec
[i
].mi_len
;
139 if (__predict_false(type
== EXT_MBUF
)) {
140 m0
= (struct mbuf
*)cl
;
141 KASSERT((m0
->m_flags
& M_EXT
) == 0);
143 m0
->m_data
= cl
+ offset
;
148 if ((m0
= m_get(M_NOWAIT
, MT_DATA
)) == NULL
) {
150 * Check for extra memory leaks
157 m0
->m_len
= mv
->mv_vec
[i
].mi_len
;
158 m_cljset(m0
, (uint8_t *)cl
, type
);
163 m
->m_len
-= m0
->m_len
;
166 offset
= mv
->mv_vec
[first
].mi_offset
;
167 cl
= mv
->mv_vec
[first
].mi_base
;
168 type
= mbuf_vec_get_type(mv
, first
);
169 m
->m_flags
&= ~(M_IOVEC
);
170 m_cljset(m
, cl
, type
);
181 * Allocate a chunk of memory using kmalloc or, if that fails, vmalloc.
182 * The allocated memory is cleared.
185 cxgb_alloc_mem(unsigned long size
)
187 return malloc(size
, M_DEVBUF
, M_ZERO
);
191 * Free memory allocated through t3_alloc_mem().
194 cxgb_free_mem(void *addr
)
196 free(addr
, M_DEVBUF
);
199 void pci_enable_busmaster(device_t dev
)
201 adapter_t
*sc
= (adapter_t
*)dev
;
204 t3_os_pci_read_config_4(sc
, PCI_COMMAND_STATUS_REG
, ®
);
205 reg
|= PCI_COMMAND_MASTER_ENABLE
;
206 t3_os_pci_write_config_4(sc
, PCI_COMMAND_STATUS_REG
, reg
);