sys/dev/pci/ichsmb.c

   1 /*      $NetBSD: ichsmb.c,v 1.20 2009/03/18 16:00:19 cegger Exp $       */
   2 /*      $OpenBSD: ichiic.c,v 1.18 2007/05/03 09:36:26 dlg Exp $ */
   3
   4 /*
   5  * Copyright (c) 2005, 2006 Alexander Yurchenko <grange@openbsd.org>
   6  *
   7  * Permission to use, copy, modify, and distribute this software for any
   8  * purpose with or without fee is hereby granted, provided that the above
   9  * copyright notice and this permission notice appear in all copies.
  10  *
  11  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  12  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  13  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  14  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  15  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  16  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  17  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  18  */
  19
  20 /*
  21  * Intel ICH SMBus controller driver.
  22  */
  23
  24 #include <sys/cdefs.h>
  25 __KERNEL_RCSID(0, "$NetBSD: ichsmb.c,v 1.20 2009/03/18 16:00:19 cegger Exp $");
  26
  27 #include <sys/param.h>
  28 #include <sys/device.h>
  29 #include <sys/errno.h>
  30 #include <sys/kernel.h>
  31 #include <sys/rwlock.h>
  32 #include <sys/proc.h>
  33
  34 #include <sys/bus.h>
  35
  36 #include <dev/pci/pcidevs.h>
  37 #include <dev/pci/pcireg.h>
  38 #include <dev/pci/pcivar.h>
  39
  40 #include <dev/ic/i82801lpcreg.h>
  41
  42 #include <dev/i2c/i2cvar.h>
  43
  44 #ifdef ICHIIC_DEBUG
  45 #define DPRINTF(x) printf x
  46 #else
  47 #define DPRINTF(x)
  48 #endif
  49
  50 #define ICHIIC_DELAY    100
  51 #define ICHIIC_TIMEOUT  1
  52
  53 struct ichsmb_softc {
  54         device_t                sc_dev;
  55
  56         bus_space_tag_t         sc_iot;
  57         bus_space_handle_t      sc_ioh;
  58         void *                  sc_ih;
  59         int                     sc_poll;
  60
  61         struct i2c_controller   sc_i2c_tag;
  62         krwlock_t               sc_i2c_rwlock;
  63         struct {
  64                 i2c_op_t     op;
  65                 void *       buf;
  66                 size_t       len;
  67                 int          flags;
  68                 volatile int error;
  69         }                       sc_i2c_xfer;
  70 };
  71
  72 static int      ichsmb_match(device_t, cfdata_t, void *);
  73 static void     ichsmb_attach(device_t, device_t, void *);
  74
  75 static int      ichsmb_i2c_acquire_bus(void *, int);
  76 static void     ichsmb_i2c_release_bus(void *, int);
  77 static int      ichsmb_i2c_exec(void *, i2c_op_t, i2c_addr_t, const void *,
  78                     size_t, void *, size_t, int);
  79
  80 static int      ichsmb_intr(void *);
  81
  82
  83 CFATTACH_DECL_NEW(ichsmb, sizeof(struct ichsmb_softc),
  84     ichsmb_match, ichsmb_attach, NULL, NULL);
  85
  86
  87 static int
  88 ichsmb_match(device_t parent, cfdata_t match, void *aux)
  89 {
  90         struct pci_attach_args *pa = aux;
  91
  92         if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_INTEL) {
  93                 switch (PCI_PRODUCT(pa->pa_id)) {
  94                 case PCI_PRODUCT_INTEL_6300ESB_SMB:
  95                 case PCI_PRODUCT_INTEL_63XXESB_SMB:
  96                 case PCI_PRODUCT_INTEL_82801AA_SMB:
  97                 case PCI_PRODUCT_INTEL_82801AB_SMB:
  98                 case PCI_PRODUCT_INTEL_82801BA_SMB:
  99                 case PCI_PRODUCT_INTEL_82801CA_SMB:
 100                 case PCI_PRODUCT_INTEL_82801DB_SMB:
 101                 case PCI_PRODUCT_INTEL_82801E_SMB:
 102                 case PCI_PRODUCT_INTEL_82801EB_SMB:
 103                 case PCI_PRODUCT_INTEL_82801FB_SMB:
 104                 case PCI_PRODUCT_INTEL_82801G_SMB:
 105                 case PCI_PRODUCT_INTEL_82801H_SMB:
 106                 case PCI_PRODUCT_INTEL_82801I_SMB:
 107                 case PCI_PRODUCT_INTEL_ICH10_SMB1:
 108                 case PCI_PRODUCT_INTEL_ICH10_SMB2:
 109                         return 1;
 110                 }
 111         }
 112         return 0;
 113 }
 114
 115 static void
 116 ichsmb_attach(device_t parent, device_t self, void *aux)
 117 {
 118         struct ichsmb_softc *sc = device_private(self);
 119         struct pci_attach_args *pa = aux;
 120         struct i2cbus_attach_args iba;
 121         pcireg_t conf;
 122         bus_size_t iosize;
 123         pci_intr_handle_t ih;
 124         const char *intrstr = NULL;
 125         char devinfo[256];
 126
 127         sc->sc_dev = self;
 128
 129         aprint_naive("\n");
 130         pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
 131         aprint_normal(": %s (rev. 0x%02x)\n", devinfo,
 132             PCI_REVISION(pa->pa_class));
 133
 134         /* Read configuration */
 135         conf = pci_conf_read(pa->pa_pc, pa->pa_tag, LPCIB_SMB_HOSTC);
 136         DPRINTF(("%s: conf 0x%08x\n", device_xname(sc->sc_dev), conf));
 137
 138         if ((conf & LPCIB_SMB_HOSTC_HSTEN) == 0) {
 139                 aprint_error_dev(self, "SMBus disabled\n");
 140                 return;
 141         }
 142
 143         /* Map I/O space */
 144         if (pci_mapreg_map(pa, LPCIB_SMB_BASE, PCI_MAPREG_TYPE_IO, 0,
 145             &sc->sc_iot, &sc->sc_ioh, NULL, &iosize)) {
 146                 aprint_error_dev(self, "can't map I/O space\n");
 147                 return;
 148         }
 149
 150         sc->sc_poll = 1;
 151         if (conf & LPCIB_SMB_HOSTC_SMIEN) {
 152                 /* No PCI IRQ */
 153                 aprint_normal_dev(self, "interrupting at SMI\n");
 154         } else {
 155                 /* Install interrupt handler */
 156                 if (pci_intr_map(pa, &ih) == 0) {
 157                         intrstr = pci_intr_string(pa->pa_pc, ih);
 158                         sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO,
 159                             ichsmb_intr, sc);
 160                         if (sc->sc_ih != NULL) {
 161                                 aprint_normal_dev(self, "interrupting at %s\n",
 162                                     intrstr);
 163                                 sc->sc_poll = 0;
 164                         }
 165                 }
 166                 if (sc->sc_poll)
 167                         aprint_normal_dev(self, "polling\n");
 168         }
 169
 170         /* Attach I2C bus */
 171         rw_init(&sc->sc_i2c_rwlock);
 172         sc->sc_i2c_tag.ic_cookie = sc;
 173         sc->sc_i2c_tag.ic_acquire_bus = ichsmb_i2c_acquire_bus;
 174         sc->sc_i2c_tag.ic_release_bus = ichsmb_i2c_release_bus;
 175         sc->sc_i2c_tag.ic_exec = ichsmb_i2c_exec;
 176
 177         memset(&iba, 0, sizeof(iba));
 178         iba.iba_type = I2C_TYPE_SMBUS;
 179         iba.iba_tag = &sc->sc_i2c_tag;
 180         config_found(self, &iba, iicbus_print);
 181
 182         if (!pmf_device_register(self, NULL, NULL))
 183                 aprint_error_dev(self, "couldn't establish power handler\n");
 184 }
 185
 186 static int
 187 ichsmb_i2c_acquire_bus(void *cookie, int flags)
 188 {
 189         struct ichsmb_softc *sc = cookie;
 190
 191         if (cold || sc->sc_poll || (flags & I2C_F_POLL))
 192                 return 0;
 193
 194         rw_enter(&sc->sc_i2c_rwlock, RW_WRITER);
 195         return 0;
 196 }
 197
 198 static void
 199 ichsmb_i2c_release_bus(void *cookie, int flags)
 200 {
 201         struct ichsmb_softc *sc = cookie;
 202
 203         if (cold || sc->sc_poll || (flags & I2C_F_POLL))
 204                 return;
 205
 206         rw_exit(&sc->sc_i2c_rwlock);
 207 }
 208
 209 static int
 210 ichsmb_i2c_exec(void *cookie, i2c_op_t op, i2c_addr_t addr,
 211     const void *cmdbuf, size_t cmdlen, void *buf, size_t len, int flags)
 212 {
 213         struct ichsmb_softc *sc = cookie;
 214         const uint8_t *b;
 215         uint8_t ctl = 0, st;
 216         int retries;
 217         char fbuf[64];
 218
 219         DPRINTF(("%s: exec: op %d, addr 0x%02x, cmdlen %zu, len %zu, "
 220             "flags 0x%02x\n", device_xname(sc->sc_dev), op, addr, cmdlen,
 221             len, flags));
 222
 223         /* Wait for bus to be idle */
 224         for (retries = 100; retries > 0; retries--) {
 225                 st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS);
 226                 if (!(st & LPCIB_SMB_HS_BUSY))
 227                         break;
 228                 DELAY(ICHIIC_DELAY);
 229         }
 230 #ifdef ICHIIC_DEBUG
 231         snprintb(fbuf, sizeof(fbuf), LPCIB_SMB_HS_BITS, st);
 232         printf("%s: exec: st 0x%s\n", device_xname(sc->sc_dev), fbuf);
 233 #endif
 234         if (st & LPCIB_SMB_HS_BUSY)
 235                 return (1);
 236
 237         if (cold || sc->sc_poll)
 238                 flags |= I2C_F_POLL;
 239
 240         if (!I2C_OP_STOP_P(op) || cmdlen > 1 || len > 2)
 241                 return (1);
 242
 243         /* Setup transfer */
 244         sc->sc_i2c_xfer.op = op;
 245         sc->sc_i2c_xfer.buf = buf;
 246         sc->sc_i2c_xfer.len = len;
 247         sc->sc_i2c_xfer.flags = flags;
 248         sc->sc_i2c_xfer.error = 0;
 249
 250         /* Set slave address and transfer direction */
 251         bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_TXSLVA,
 252             LPCIB_SMB_TXSLVA_ADDR(addr) |
 253             (I2C_OP_READ_P(op) ? LPCIB_SMB_TXSLVA_READ : 0));
 254
 255         b = (const uint8_t *)cmdbuf;
 256         if (cmdlen > 0)
 257                 /* Set command byte */
 258                 bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HCMD, b[0]);
 259
 260         if (I2C_OP_WRITE_P(op)) {
 261                 /* Write data */
 262                 b = buf;
 263                 if (len > 0)
 264                         bus_space_write_1(sc->sc_iot, sc->sc_ioh,
 265                             LPCIB_SMB_HD0, b[0]);
 266                 if (len > 1)
 267                         bus_space_write_1(sc->sc_iot, sc->sc_ioh,
 268                             LPCIB_SMB_HD1, b[1]);
 269         }
 270
 271         /* Set SMBus command */
 272         if (len == 0) {
 273                 if (cmdlen == 0)
 274                         ctl = LPCIB_SMB_HC_CMD_QUICK;
 275                 else
 276                         ctl = LPCIB_SMB_HC_CMD_BYTE;
 277         } else if (len == 1)
 278                 ctl = LPCIB_SMB_HC_CMD_BDATA;
 279         else if (len == 2)
 280                 ctl = LPCIB_SMB_HC_CMD_WDATA;
 281
 282         if ((flags & I2C_F_POLL) == 0)
 283                 ctl |= LPCIB_SMB_HC_INTREN;
 284
 285         /* Start transaction */
 286         ctl |= LPCIB_SMB_HC_START;
 287         bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HC, ctl);
 288
 289         if (flags & I2C_F_POLL) {
 290                 /* Poll for completion */
 291                 DELAY(ICHIIC_DELAY);
 292                 for (retries = 1000; retries > 0; retries--) {
 293                         st = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
 294                             LPCIB_SMB_HS);
 295                         if ((st & LPCIB_SMB_HS_BUSY) == 0)
 296                                 break;
 297                         DELAY(ICHIIC_DELAY);
 298                 }
 299                 if (st & LPCIB_SMB_HS_BUSY)
 300                         goto timeout;
 301                 ichsmb_intr(sc);
 302         } else {
 303                 /* Wait for interrupt */
 304                 if (tsleep(sc, PRIBIO, "iicexec", ICHIIC_TIMEOUT * hz))
 305                         goto timeout;
 306         }
 307
 308         if (sc->sc_i2c_xfer.error)
 309                 return (1);
 310
 311         return (0);
 312
 313 timeout:
 314         /*
 315          * Transfer timeout. Kill the transaction and clear status bits.
 316          */
 317         snprintb(fbuf, sizeof(fbuf), LPCIB_SMB_HS_BITS, st);
 318         aprint_error_dev(sc->sc_dev,
 319             "exec: op %d, addr 0x%02x, cmdlen %zd, len %zd, "
 320             "flags 0x%02x: timeout, status 0x%s\n",
 321             op, addr, cmdlen, len, flags, fbuf);
 322         bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HC,
 323             LPCIB_SMB_HC_KILL);
 324         DELAY(ICHIIC_DELAY);
 325         st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS);
 326         if ((st & LPCIB_SMB_HS_FAILED) == 0) {
 327                 snprintb(fbuf, sizeof(fbuf), LPCIB_SMB_HS_BITS, st);
 328                 aprint_error_dev(sc->sc_dev, "abort failed, status 0x%s\n",
 329                     fbuf);
 330         }
 331         bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS, st);
 332         return (1);
 333 }
 334
 335 static int
 336 ichsmb_intr(void *arg)
 337 {
 338         struct ichsmb_softc *sc = arg;
 339         uint8_t st;
 340         uint8_t *b;
 341         size_t len;
 342 #ifdef ICHIIC_DEBUG
 343         char fbuf[64];
 344 #endif
 345
 346         /* Read status */
 347         st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS);
 348         if ((st & LPCIB_SMB_HS_BUSY) != 0 || (st & (LPCIB_SMB_HS_INTR |
 349             LPCIB_SMB_HS_DEVERR | LPCIB_SMB_HS_BUSERR | LPCIB_SMB_HS_FAILED |
 350             LPCIB_SMB_HS_SMBAL | LPCIB_SMB_HS_BDONE)) == 0)
 351                 /* Interrupt was not for us */
 352                 return (0);
 353
 354 #ifdef ICHIIC_DEBUG
 355         snprintb(fbuf, sizeof(fbuf), LPCIB_SMB_HS_BITS, st);
 356         printf("%s: intr st 0x%s\n", device_xname(sc->sc_dev), fbuf);
 357 #endif
 358
 359         /* Clear status bits */
 360         bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS, st);
 361
 362         /* Check for errors */
 363         if (st & (LPCIB_SMB_HS_DEVERR | LPCIB_SMB_HS_BUSERR | LPCIB_SMB_HS_FAILED)) {
 364                 sc->sc_i2c_xfer.error = 1;
 365                 goto done;
 366         }
 367
 368         if (st & LPCIB_SMB_HS_INTR) {
 369                 if (I2C_OP_WRITE_P(sc->sc_i2c_xfer.op))
 370                         goto done;
 371
 372                 /* Read data */
 373                 b = sc->sc_i2c_xfer.buf;
 374                 len = sc->sc_i2c_xfer.len;
 375                 if (len > 0)
 376                         b[0] = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
 377                             LPCIB_SMB_HD0);
 378                 if (len > 1)
 379                         b[1] = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
 380                             LPCIB_SMB_HD1);
 381         }
 382
 383 done:
 384         if ((sc->sc_i2c_xfer.flags & I2C_F_POLL) == 0)
 385                 wakeup(sc);
 386         return (1);
 387 }