sys/dev/pci/if_esh_pci.c

   1 /*      $NetBSD: if_esh_pci.c,v 1.27 2009/05/12 08:23:00 cegger Exp $   */
   2
   3 /*
   4  * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
   5  * All rights reserved.
   6  *
   7  * This code contributed to The NetBSD Foundation by Kevin M. Lahey
   8  * of the Numerical Aerospace Simulation Facility, NASA Ames Research
   9  * Center.
  10  *
  11  * Partially based on a HIPPI driver written by Essential Communications
  12  * Corporation.
  13  *
  14  * Redistribution and use in source and binary forms, with or without
  15  * modification, are permitted provided that the following conditions
  16  * are met:
  17  * 1. Redistributions of source code must retain the above copyright
  18  *    notice, this list of conditions and the following disclaimer.
  19  * 2. Redistributions in binary form must reproduce the above copyright
  20  *    notice, this list of conditions and the following disclaimer in the
  21  *    documentation and/or other materials provided with the distribution.
  22  *
  23  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  24  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  25  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  26  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  27  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  28  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  29  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  30  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  31  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  32  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  33  * POSSIBILITY OF SUCH DAMAGE.
  34  */
  35
  36 #include <sys/cdefs.h>
  37 __KERNEL_RCSID(0, "$NetBSD: if_esh_pci.c,v 1.27 2009/05/12 08:23:00 cegger Exp $");
  38
  39 #include <sys/param.h>
  40 #include <sys/systm.h>
  41 #include <sys/mbuf.h>
  42 #include <sys/socket.h>
  43 #include <sys/ioctl.h>
  44 #include <sys/errno.h>
  45 #include <sys/syslog.h>
  46 #include <sys/select.h>
  47 #include <sys/device.h>
  48 #include <sys/buf.h>
  49 #include <sys/bufq.h>
  50
  51 #include <net/if.h>
  52 #include <net/if_dl.h>
  53 #include <net/if_hippi.h>
  54 #include <net/if_media.h>
  55
  56 #include <sys/cpu.h>
  57 #include <sys/bus.h>
  58 #include <sys/intr.h>
  59
  60 #include <dev/ic/rrunnerreg.h>
  61 #include <dev/ic/rrunnervar.h>
  62
  63 #include <dev/pci/pcivar.h>
  64 #include <dev/pci/pcireg.h>
  65 #include <dev/pci/pcidevs.h>
  66
  67 /*
  68  * PCI constants.
  69  * XXX These should be in a common file!
  70  */
  71 #define PCI_CONN                0x48    /* Connector type */
  72 #define PCI_CBIO                0x10    /* Configuration Base IO Address */
  73
  74 #define MEM_MAP_REG     0x10
  75
  76 static int      esh_pci_match(device_t, cfdata_t, void *);
  77 static void     esh_pci_attach(device_t, device_t, void *);
  78 static u_int8_t esh_pci_bist_read(struct esh_softc *);
  79 static void     esh_pci_bist_write(struct esh_softc *, u_int8_t);
  80
  81
  82 CFATTACH_DECL(esh_pci, sizeof(struct esh_softc),
  83     esh_pci_match, esh_pci_attach, NULL, NULL);
  84
  85 static int
  86 esh_pci_match(device_t parent, cfdata_t match, void *aux)
  87 {
  88         struct pci_attach_args *pa = (struct pci_attach_args *) aux;
  89
  90         if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_ESSENTIAL)
  91                 return 0;
  92
  93         switch (PCI_PRODUCT(pa->pa_id)) {
  94         case PCI_PRODUCT_ESSENTIAL_RR_HIPPI:
  95         case PCI_PRODUCT_ESSENTIAL_RR_GIGE:
  96                 break;
  97         default:
  98                 return 0;
  99         }
 100         return 1;
 101 }
 102
 103 static void
 104 esh_pci_attach(device_t parent, device_t self, void *aux)
 105 {
 106         struct esh_softc *sc = device_private(self);
 107         struct pci_attach_args *pa = aux;
 108         pci_chipset_tag_t pc = pa->pa_pc;
 109         pci_intr_handle_t ih;
 110         const char *model;
 111         const char *intrstr = NULL;
 112
 113         aprint_naive(": HIPPI controller\n");
 114
 115         if (pci_mapreg_map(pa, MEM_MAP_REG,
 116                            PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0,
 117                            &sc->sc_iot, &sc->sc_ioh, NULL, NULL) != 0) {
 118             aprint_error(": unable to map memory device registers\n");
 119             return;
 120         }
 121
 122         sc->sc_dmat = pa->pa_dmat;
 123
 124         switch (PCI_PRODUCT(pa->pa_id)) {
 125         case PCI_PRODUCT_ESSENTIAL_RR_HIPPI:
 126                 model = "RoadRunner HIPPI";
 127                 break;
 128         case PCI_PRODUCT_ESSENTIAL_RR_GIGE:
 129                 model = "RoadRunner Gig-E";
 130                 break;
 131         default:
 132                 model = "unknown model";
 133                 break;
 134         }
 135
 136         aprint_normal(": %s\n", model);
 137
 138         sc->sc_bist_read = esh_pci_bist_read;
 139         sc->sc_bist_write = esh_pci_bist_write;
 140
 141         eshconfig(sc);
 142
 143         /* Enable the card. */
 144         pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
 145             pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) |
 146             PCI_COMMAND_MASTER_ENABLE);
 147
 148         /* Map and establish the interrupt. */
 149         if (pci_intr_map(pa, &ih)) {
 150                 aprint_error_dev(&sc->sc_dev, "couldn't map interrupt\n");
 151                 return;
 152         }
 153         intrstr = pci_intr_string(pc, ih);
 154         sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, eshintr, sc);
 155         if (sc->sc_ih == NULL) {
 156                 aprint_error_dev(&sc->sc_dev, "couldn't establish interrupt");
 157                 if (intrstr != NULL)
 158                         aprint_error(" at %s", intrstr);
 159                 aprint_error("\n");
 160                 return;
 161         }
 162         aprint_normal_dev(&sc->sc_dev, "interrupting at %s\n", intrstr);
 163 }
 164
 165 static u_int8_t
 166 esh_pci_bist_read(struct esh_softc *sc)
 167 {
 168         bus_space_tag_t iot = sc->sc_iot;
 169         bus_space_handle_t ioh = sc->sc_ioh;
 170         u_int32_t pci_bist;
 171
 172         pci_bist = bus_space_read_4(iot, ioh, RR_PCI_BIST);
 173
 174         return ((u_int8_t) (pci_bist >> 24));
 175 }
 176
 177 static void
 178 esh_pci_bist_write(struct esh_softc *sc, u_int8_t value)
 179 {
 180         bus_space_tag_t iot = sc->sc_iot;
 181         bus_space_handle_t ioh = sc->sc_ioh;
 182         u_int32_t pci_bist;
 183         u_int32_t new_bist;
 184
 185         pci_bist = bus_space_read_4(iot, ioh, RR_PCI_BIST);
 186         new_bist = ((u_int32_t) value << 24) | (pci_bist & 0x00ffffff);
 187
 188         bus_space_write_4(iot, ioh, RR_PCI_BIST, new_bist);
 189 }