1 /* $NetBSD: if_rtw_pci.c,v 1.15 2009/09/16 16:34:50 dyoung Exp $ */
4 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc.
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center; Charles M. Hannum; and David Young.
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
34 * PCI bus front-end for the Realtek RTL8180 802.11 MAC/BBP chip.
36 * Derived from the ADMtek ADM8211 PCI bus front-end.
38 * Derived from the ``Tulip'' PCI bus front-end.
41 #include <sys/cdefs.h>
42 __KERNEL_RCSID(0, "$NetBSD: if_rtw_pci.c,v 1.15 2009/09/16 16:34:50 dyoung Exp $");
44 #include <sys/param.h>
45 #include <sys/systm.h>
47 #include <sys/malloc.h>
48 #include <sys/kernel.h>
49 #include <sys/socket.h>
50 #include <sys/ioctl.h>
51 #include <sys/errno.h>
52 #include <sys/device.h>
54 #include <machine/endian.h>
57 #include <net/if_dl.h>
58 #include <net/if_media.h>
59 #include <net/if_ether.h>
61 #include <net80211/ieee80211_netbsd.h>
62 #include <net80211/ieee80211_radiotap.h>
63 #include <net80211/ieee80211_var.h>
68 #include <dev/ic/rtwreg.h>
69 #include <dev/ic/sa2400reg.h>
70 #include <dev/ic/rtwvar.h>
72 #include <dev/pci/pcivar.h>
73 #include <dev/pci/pcireg.h>
74 #include <dev/pci/pcidevs.h>
77 * PCI configuration space registers used by the ADM8211.
79 #define RTW_PCI_IOBA 0x10 /* i/o mapped base */
80 #define RTW_PCI_MMBA 0x14 /* memory mapped base */
82 struct rtw_pci_softc
{
83 struct rtw_softc psc_rtw
; /* real ADM8211 softc */
85 pci_intr_handle_t psc_ih
; /* interrupt handle */
88 pci_chipset_tag_t psc_pc
; /* our PCI chipset */
89 pcitag_t psc_pcitag
; /* our PCI tag */
92 static int rtw_pci_match(device_t
, cfdata_t
, void *);
93 static void rtw_pci_attach(device_t
, device_t
, void *);
94 static int rtw_pci_detach(device_t
, int);
96 CFATTACH_DECL_NEW(rtw_pci
, sizeof(struct rtw_pci_softc
),
97 rtw_pci_match
, rtw_pci_attach
, rtw_pci_detach
, NULL
);
99 static const struct rtw_pci_product
{
100 u_int32_t app_vendor
; /* PCI vendor ID */
101 u_int32_t app_product
; /* PCI product ID */
102 const char *app_product_name
;
103 } rtw_pci_products
[] = {
104 { PCI_VENDOR_REALTEK
, PCI_PRODUCT_REALTEK_RT8180
,
105 "Realtek RTL8180 802.11 MAC/BBP" },
106 { PCI_VENDOR_BELKIN
, PCI_PRODUCT_BELKIN_F5D6001
,
112 static const struct rtw_pci_product
*
113 rtw_pci_lookup(const struct pci_attach_args
*pa
)
115 const struct rtw_pci_product
*app
;
117 for (app
= rtw_pci_products
;
118 app
->app_product_name
!= NULL
;
120 if (PCI_VENDOR(pa
->pa_id
) == app
->app_vendor
&&
121 PCI_PRODUCT(pa
->pa_id
) == app
->app_product
)
128 rtw_pci_match(device_t parent
, cfdata_t match
, void *aux
)
130 struct pci_attach_args
*pa
= aux
;
132 if (rtw_pci_lookup(pa
) != NULL
)
139 rtw_pci_resume(device_t self
, pmf_qual_t qual
)
141 struct rtw_pci_softc
*psc
= device_private(self
);
142 struct rtw_softc
*sc
= &psc
->psc_rtw
;
144 /* Establish the interrupt. */
145 psc
->psc_intrcookie
= pci_intr_establish(psc
->psc_pc
, psc
->psc_ih
,
146 IPL_NET
, rtw_intr
, sc
);
147 if (psc
->psc_intrcookie
== NULL
) {
148 aprint_error_dev(sc
->sc_dev
, "unable to establish interrupt\n");
152 return rtw_resume(self
, qual
);
156 rtw_pci_suspend(device_t self
, pmf_qual_t qual
)
158 struct rtw_pci_softc
*psc
= device_private(self
);
160 if (!rtw_suspend(self
, qual
))
163 /* Unhook the interrupt handler. */
164 pci_intr_disestablish(psc
->psc_pc
, psc
->psc_intrcookie
);
165 psc
->psc_intrcookie
= NULL
;
170 rtw_pci_attach(device_t parent
, device_t self
, void *aux
)
172 struct rtw_pci_softc
*psc
= device_private(self
);
173 struct rtw_softc
*sc
= &psc
->psc_rtw
;
174 struct rtw_regs
*regs
= &sc
->sc_regs
;
175 struct pci_attach_args
*pa
= aux
;
176 pci_chipset_tag_t pc
= pa
->pa_pc
;
177 const char *intrstr
= NULL
;
178 const struct rtw_pci_product
*app
;
182 psc
->psc_pc
= pa
->pa_pc
;
183 psc
->psc_pcitag
= pa
->pa_tag
;
185 app
= rtw_pci_lookup(pa
);
188 panic("rtw_pci_attach: impossible");
192 * Get revision info, and set some chip-specific variables.
194 sc
->sc_rev
= PCI_REVISION(pa
->pa_class
);
195 aprint_normal(": %s, revision %d.%d\n", app
->app_product_name
,
196 (sc
->sc_rev
>> 4) & 0xf, sc
->sc_rev
& 0xf);
199 if ((error
= pci_activate(pa
->pa_pc
, pa
->pa_tag
, self
, NULL
)) != 0 &&
200 error
!= EOPNOTSUPP
) {
201 aprint_error_dev(self
, "cannot activate %d\n", error
);
208 if (pci_mapreg_map(pa
, RTW_PCI_MMBA
,
209 PCI_MAPREG_TYPE_MEM
|PCI_MAPREG_MEM_TYPE_32BIT
, 0,
210 ®s
->r_bt
, ®s
->r_bh
, NULL
, ®s
->r_sz
) == 0)
212 else if (pci_mapreg_map(pa
, RTW_PCI_IOBA
, PCI_MAPREG_TYPE_IO
, 0,
213 ®s
->r_bt
, ®s
->r_bh
, NULL
, ®s
->r_sz
) == 0)
216 aprint_error_dev(self
, "unable to map device registers\n");
220 sc
->sc_dmat
= pa
->pa_dmat
;
223 * Make sure bus mastering is enabled.
225 pci_conf_write(pc
, pa
->pa_tag
, PCI_COMMAND_STATUS_REG
,
226 pci_conf_read(pc
, pa
->pa_tag
, PCI_COMMAND_STATUS_REG
) |
227 PCI_COMMAND_MASTER_ENABLE
);
230 * Map and establish our interrupt.
232 if (pci_intr_map(pa
, &psc
->psc_ih
)) {
233 aprint_error_dev(self
, "unable to map interrupt\n");
236 intrstr
= pci_intr_string(pc
, psc
->psc_ih
);
237 psc
->psc_intrcookie
= pci_intr_establish(pc
, psc
->psc_ih
, IPL_NET
,
239 if (psc
->psc_intrcookie
== NULL
) {
240 aprint_error_dev(self
, "unable to establish interrupt");
242 aprint_error(" at %s", intrstr
);
247 aprint_normal_dev(self
, "interrupting at %s\n", intrstr
);
250 * Finish off the attach.
254 if (pmf_device_register(sc
->sc_dev
, rtw_pci_suspend
, rtw_pci_resume
)) {
255 pmf_class_network_register(self
, &sc
->sc_if
);
257 * Power down the socket.
259 pmf_device_suspend(sc
->sc_dev
, &sc
->sc_qual
);
261 aprint_error_dev(sc
->sc_dev
,
262 "couldn't establish power handler\n");
266 rtw_pci_detach(device_t self
, int flags
)
268 struct rtw_pci_softc
*psc
= device_private(self
);
269 struct rtw_softc
*sc
= &psc
->psc_rtw
;
270 struct rtw_regs
*regs
= &sc
->sc_regs
;
273 if ((rc
= rtw_detach(sc
)) != 0)
275 if (psc
->psc_intrcookie
!= NULL
)
276 pci_intr_disestablish(psc
->psc_pc
, psc
->psc_intrcookie
);
277 bus_space_unmap(regs
->r_bt
, regs
->r_bh
, regs
->r_sz
);