sys/dev/pci/neoreg.h

   1 /*      $NetBSD$        */
   2
   3 /*
   4  * Copyright (c) 1999 Cameron Grant <gandalf@vilnya.demon.co.uk>
   5  * All rights reserved.
   6  *
   7  * Derived from the public domain Linux driver
   8  *
   9  * Redistribution and use in source and binary forms, with or without
  10  * modification, are permitted provided that the following conditions
  11  * are met:
  12  * 1. Redistributions of source code must retain the above copyright
  13  *    notice, this list of conditions and the following disclaimer.
  14  * 2. Redistributions in binary form must reproduce the above copyright
  15  *    notice, this list of conditions and the following disclaimer in the
  16  *    documentation and/or other materials provided with the distribution.
  17  *
  18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT
  26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THEPOSSIBILITY OF
  28  * SUCH DAMAGE.
  29  *
  30  * OpenBSD: neoreg.h,v 1.1 2000/04/13 00:10:52 csapuntz Exp
  31  */
  32
  33 #ifndef _DEV_PCI_NEOREG_H_
  34 #define _DEV_PCI_NEOREG_H_
  35
  36 /* The BIOS signature. */
  37 #define NM_SIGNATURE 0x4e4d0000
  38 /* Signature mask. */
  39 #define NM_SIG_MASK 0xffff0000
  40
  41 /* Size of the second memory area. */
  42 #define NM_PORT2_SIZE 4096
  43
  44 /* The base offset of the mixer in the second memory area. */
  45 #define NM_MIXER_OFFSET 0x600
  46
  47 /* The maximum size of a coefficient entry. */
  48 #define NM_MAX_COEFFICIENT 0x5000
  49
  50 /* The interrupt register. */
  51 #define NM_INT_REG 0xa04
  52 /* And its bits. */
  53 #define NM_PLAYBACK_INT 0x40
  54 #define NM_RECORD_INT 0x100
  55 #define NM_MISC_INT_1 0x4000
  56 #define NM_MISC_INT_2 0x1
  57
  58 /* The AV's "mixer ready" status bit and location. */
  59 #define NM_MIXER_STATUS_OFFSET 0xa04
  60 #define NM_MIXER_READY_MASK 0x0800
  61
  62 /*
  63  * For the ZX.  It uses the same interrupt register, but it holds 32
  64  * bits instead of 16.
  65  */
  66 #define NM2_PLAYBACK_INT 0x10000
  67 #define NM2_RECORD_INT 0x80000
  68 #define NM2_MISC_INT_1 0x8
  69 #define NM2_MISC_INT_2 0x2
  70
  71 /* The ZX's "mixer ready" status bit and location. */
  72 #define NM2_MIXER_STATUS_OFFSET 0xa06
  73 #define NM2_MIXER_READY_MASK 0x0800
  74
  75 /* The playback registers start from here. */
  76 #define NM_PLAYBACK_REG_OFFSET 0x0
  77 /* The record registers start from here. */
  78 #define NM_RECORD_REG_OFFSET 0x200
  79
  80 /* The rate register is located 2 bytes from the start of the register area. */
  81 #define NM_RATE_REG_OFFSET 2
  82
  83 /* Mono/stereo flag, number of bits on playback, and rate mask. */
  84 #define NM_RATE_STEREO 1
  85 #define NM_RATE_BITS_16 2
  86 #define NM_RATE_MASK 0xf0
  87
  88 /* Playback enable register. */
  89 #define NM_PLAYBACK_ENABLE_REG (NM_PLAYBACK_REG_OFFSET + 0x1)
  90 #define NM_PLAYBACK_ENABLE_FLAG 1
  91 #define NM_PLAYBACK_ONESHOT 2
  92 #define NM_PLAYBACK_FREERUN 4
  93
  94 /* Mutes the audio output. */
  95 #define NM_AUDIO_MUTE_REG (NM_PLAYBACK_REG_OFFSET + 0x18)
  96 #define NM_AUDIO_MUTE_LEFT 0x8000
  97 #define NM_AUDIO_MUTE_RIGHT 0x0080
  98 #define NM_AUDIO_MUTE_BOTH 0x8080
  99
 100 /* Recording enable register. */
 101 #define NM_RECORD_ENABLE_REG (NM_RECORD_REG_OFFSET + 0)
 102 #define NM_RECORD_ENABLE_FLAG 1
 103 #define NM_RECORD_FREERUN 2
 104
 105 #define NM_RBUFFER_START (NM_RECORD_REG_OFFSET + 0x4)
 106 #define NM_RBUFFER_END   (NM_RECORD_REG_OFFSET + 0x10)
 107 #define NM_RBUFFER_WMARK (NM_RECORD_REG_OFFSET + 0xc)
 108 #define NM_RBUFFER_CURRP (NM_RECORD_REG_OFFSET + 0x8)
 109
 110 #define NM_PBUFFER_START (NM_PLAYBACK_REG_OFFSET + 0x4)
 111 #define NM_PBUFFER_END   (NM_PLAYBACK_REG_OFFSET + 0x14)
 112 #define NM_PBUFFER_WMARK (NM_PLAYBACK_REG_OFFSET + 0xc)
 113 #define NM_PBUFFER_CURRP (NM_PLAYBACK_REG_OFFSET + 0x8)
 114
 115 #endif /* _DEV_PCI_NEOREG_H_ */