sys/dev/tc/asc_tcds.c

   1 /* $NetBSD: asc_tcds.c,v 1.23 2008/04/13 04:55:54 tsutsui Exp $ */
   2
   3 /*-
   4  * Copyright (c) 1998 The NetBSD Foundation, Inc.
   5  * All rights reserved.
   6  *
   7  * This code is derived from software contributed to The NetBSD Foundation
   8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
   9  * NASA Ames Research Center.
  10  *
  11  * Redistribution and use in source and binary forms, with or without
  12  * modification, are permitted provided that the following conditions
  13  * are met:
  14  * 1. Redistributions of source code must retain the above copyright
  15  *    notice, this list of conditions and the following disclaimer.
  16  * 2. Redistributions in binary form must reproduce the above copyright
  17  *    notice, this list of conditions and the following disclaimer in the
  18  *    documentation and/or other materials provided with the distribution.
  19  *
  20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  30  * POSSIBILITY OF SUCH DAMAGE.
  31  */
  32
  33 /*
  34  * Copyright (c) 1994 Peter Galbavy.  All rights reserved.
  35  *
  36  * Redistribution and use in source and binary forms, with or without
  37  * modification, are permitted provided that the following conditions
  38  * are met:
  39  * 1. Redistributions of source code must retain the above copyright
  40  *    notice, this list of conditions and the following disclaimer.
  41  * 2. Redistributions in binary form must reproduce the above copyright
  42  *    notice, this list of conditions and the following disclaimer in the
  43  *    documentation and/or other materials provided with the distribution.
  44  * 3. All advertising materials mentioning features or use of this software
  45  *    must display the following acknowledgement:
  46  *      This product includes software developed by Peter Galbavy.
  47  * 4. The name of the author may not be used to endorse or promote products
  48  *    derived from this software without specific prior written permission.
  49  *
  50  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  51  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  52  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  53  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  54  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  55  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  56  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  57  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  58  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  59  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  60  */
  61
  62 #include <sys/cdefs.h>
  63 __KERNEL_RCSID(0, "$NetBSD: asc_tcds.c,v 1.23 2008/04/13 04:55:54 tsutsui Exp $");
  64
  65 #include <sys/param.h>
  66 #include <sys/systm.h>
  67 #include <sys/device.h>
  68 #include <sys/buf.h>
  69
  70 #include <uvm/uvm_extern.h>
  71
  72 #include <dev/scsipi/scsi_all.h>
  73 #include <dev/scsipi/scsipi_all.h>
  74 #include <dev/scsipi/scsiconf.h>
  75
  76 #include <dev/ic/ncr53c9xreg.h>
  77 #include <dev/ic/ncr53c9xvar.h>
  78
  79 #include <sys/bus.h>
  80
  81 #include <dev/tc/tcvar.h>
  82 #include <dev/tc/tcdsreg.h>
  83 #include <dev/tc/tcdsvar.h>
  84
  85 struct asc_softc {
  86         struct ncr53c9x_softc sc_ncr53c9x;      /* glue to MI code */
  87         bus_space_tag_t sc_bst;                 /* bus space tag */
  88         bus_space_handle_t sc_scsi_bsh;         /* ASC register handle */
  89         bus_dma_tag_t sc_dmat;                  /* bus DMA tag */
  90         bus_dmamap_t sc_dmamap;                 /* bus dmamap */
  91         uint8_t **sc_dmaaddr;
  92         size_t *sc_dmalen;
  93         size_t sc_dmasize;
  94         unsigned sc_flags;
  95 #define ASC_ISPULLUP            0x01
  96 #define ASC_DMAACTIVE           0x02
  97 #define ASC_MAPLOADED           0x04
  98         struct tcds_slotconfig *sc_tcds;        /* DMA/slot info lives here */
  99 };
 100
 101 static int  asc_tcds_match(device_t, cfdata_t, void *);
 102 static void asc_tcds_attach(device_t, device_t, void *);
 103
 104 CFATTACH_DECL_NEW(asc_tcds, sizeof(struct asc_softc),
 105     asc_tcds_match, asc_tcds_attach, NULL, NULL);
 106
 107 /*
 108  * Functions and the switch for the MI code.
 109  */
 110 static uint8_t  asc_read_reg(struct ncr53c9x_softc *, int);
 111 static void     asc_write_reg(struct ncr53c9x_softc *, int, uint8_t);
 112 static int      tcds_dma_isintr(struct ncr53c9x_softc *);
 113 static void     tcds_dma_reset(struct ncr53c9x_softc *);
 114 static int      tcds_dma_intr(struct ncr53c9x_softc *);
 115 static int      tcds_dma_setup(struct ncr53c9x_softc *, uint8_t **,
 116                     size_t *, int, size_t *);
 117 static void     tcds_dma_go(struct ncr53c9x_softc *);
 118 static void     tcds_dma_stop(struct ncr53c9x_softc *);
 119 static int      tcds_dma_isactive(struct ncr53c9x_softc *);
 120 static void     tcds_clear_latched_intr(struct ncr53c9x_softc *);
 121
 122 static struct ncr53c9x_glue asc_tcds_glue = {
 123         asc_read_reg,
 124         asc_write_reg,
 125         tcds_dma_isintr,
 126         tcds_dma_reset,
 127         tcds_dma_intr,
 128         tcds_dma_setup,
 129         tcds_dma_go,
 130         tcds_dma_stop,
 131         tcds_dma_isactive,
 132         tcds_clear_latched_intr,
 133 };
 134
 135 static int
 136 asc_tcds_match(device_t parent, cfdata_t cf, void *aux)
 137 {
 138
 139         /* We always exist. */
 140         return 1;
 141 }
 142
 143 #define DMAMAX(a)       (PAGE_SIZE - ((a) & (PAGE_SIZE - 1)))
 144
 145 /*
 146  * Attach this instance, and then all the sub-devices
 147  */
 148 static void
 149 asc_tcds_attach(device_t parent, device_t self, void *aux)
 150 {
 151         struct asc_softc *asc = device_private(self);
 152         struct ncr53c9x_softc *sc = &asc->sc_ncr53c9x;
 153         struct tcdsdev_attach_args *tcdsdev = aux;
 154         int error;
 155
 156         /*
 157          * Set up glue for MI code early; we use some of it here.
 158          */
 159         sc->sc_dev = self;
 160         sc->sc_glue = &asc_tcds_glue;
 161
 162         asc->sc_bst = tcdsdev->tcdsda_bst;
 163         asc->sc_scsi_bsh = tcdsdev->tcdsda_bsh;
 164         asc->sc_tcds = tcdsdev->tcdsda_sc;
 165
 166         /*
 167          * The TCDS ASIC cannot DMA across 8k boundaries, and this
 168          * driver is written such that each DMA segment gets a new
 169          * call to tcds_dma_setup().  Thus, the DMA map only needs
 170          * to support 8k transfers.
 171          */
 172         asc->sc_dmat = tcdsdev->tcdsda_dmat;
 173         if ((error = bus_dmamap_create(asc->sc_dmat, PAGE_SIZE, 1, PAGE_SIZE,
 174             PAGE_SIZE, BUS_DMA_NOWAIT, &asc->sc_dmamap)) < 0) {
 175                 aprint_error(": failed to create DMA map, error = %d\n", error);
 176                 return;
 177         }
 178
 179         sc->sc_id = tcdsdev->tcdsda_id;
 180         sc->sc_freq = tcdsdev->tcdsda_freq;
 181
 182         /* gimme MHz */
 183         sc->sc_freq /= 1000000;
 184
 185         tcds_intr_establish(parent, tcdsdev->tcdsda_chip, ncr53c9x_intr, sc);
 186
 187         /*
 188          * XXX More of this should be in ncr53c9x_attach(), but
 189          * XXX should we really poke around the chip that much in
 190          * XXX the MI code?  Think about this more...
 191          */
 192
 193         /*
 194          * Set up static configuration info.
 195          */
 196         sc->sc_cfg1 = sc->sc_id | NCRCFG1_PARENB;
 197         sc->sc_cfg2 = NCRCFG2_SCSI2;
 198         sc->sc_cfg3 = NCRCFG3_CDB;
 199         if (sc->sc_freq > 25)
 200                 sc->sc_cfg3 |= NCRF9XCFG3_FCLK;
 201         sc->sc_rev = tcdsdev->tcdsda_variant;
 202         if (tcdsdev->tcdsda_fast) {
 203                 sc->sc_features |= NCR_F_FASTSCSI;
 204                 sc->sc_cfg3_fscsi = NCRF9XCFG3_FSCSI;
 205         }
 206
 207         /*
 208          * XXX minsync and maxxfer _should_ be set up in MI code,
 209          * XXX but it appears to have some dependency on what sort
 210          * XXX of DMA we're hooked up to, etc.
 211          */
 212
 213         /*
 214          * This is the value used to start sync negotiations
 215          * Note that the NCR register "SYNCTP" is programmed
 216          * in "clocks per byte", and has a minimum value of 4.
 217          * The SCSI period used in negotiation is one-fourth
 218          * of the time (in nanoseconds) needed to transfer one byte.
 219          * Since the chip's clock is given in MHz, we have the following
 220          * formula: 4 * period = (1000 / freq) * 4
 221          */
 222         sc->sc_minsync = (1000 / sc->sc_freq) * tcdsdev->tcdsda_period / 4;
 223
 224         sc->sc_maxxfer = 64 * 1024;
 225
 226         /* Do the common parts of attachment. */
 227         sc->sc_adapter.adapt_minphys = minphys;
 228         sc->sc_adapter.adapt_request = ncr53c9x_scsipi_request;
 229         ncr53c9x_attach(sc);
 230 }
 231
 232 static void
 233 tcds_dma_reset(struct ncr53c9x_softc *sc)
 234 {
 235         struct asc_softc *asc = (struct asc_softc *)sc;
 236
 237         /* TCDS SCSI disable/reset/enable. */
 238         tcds_scsi_reset(asc->sc_tcds);                  /* XXX */
 239
 240         if (asc->sc_flags & ASC_MAPLOADED)
 241                 bus_dmamap_unload(asc->sc_dmat, asc->sc_dmamap);
 242         asc->sc_flags &= ~(ASC_DMAACTIVE|ASC_MAPLOADED);
 243 }
 244
 245 /*
 246  * start a DMA transfer or keep it going
 247  */
 248 int
 249 tcds_dma_setup(struct ncr53c9x_softc *sc, uint8_t **addr, size_t *len,
 250     int ispullup, size_t *dmasize)
 251 {
 252         struct asc_softc *asc = (struct asc_softc *)sc;
 253         struct tcds_slotconfig *tcds = asc->sc_tcds;
 254         size_t size;
 255         uint32_t dic;
 256
 257         NCR_DMA(("tcds_dma %d: start %d@%p,%s\n", tcds->sc_slot,
 258             (int)*asc->sc_dmalen, *asc->sc_dmaaddr,
 259             (ispullup) ? "IN" : "OUT"));
 260
 261         /*
 262          * the rules say we cannot transfer more than the limit
 263          * of this DMA chip (64k) and we cannot cross a 8k boundary.
 264          */
 265         size = min(*dmasize, DMAMAX((size_t)*addr));
 266         asc->sc_dmaaddr = addr;
 267         asc->sc_dmalen = len;
 268         asc->sc_flags = (ispullup) ? ASC_ISPULLUP : 0;
 269         *dmasize = asc->sc_dmasize = size;
 270
 271         NCR_DMA(("dma_start: dmasize = %d\n", (int)size));
 272
 273         if (size == 0)
 274                 return 0;
 275
 276         if (bus_dmamap_load(asc->sc_dmat, asc->sc_dmamap, *addr, size,
 277             NULL, BUS_DMA_NOWAIT | (ispullup ? BUS_DMA_READ : BUS_DMA_WRITE))) {
 278                 /*
 279                  * XXX Should return an error, here, but the upper-layer
 280                  * XXX doesn't check the return value!
 281                  */
 282                 panic("%s: dmamap load failed", __func__);
 283         }
 284
 285         /* synchronize dmamap contents with memory image */
 286         bus_dmamap_sync(asc->sc_dmat, asc->sc_dmamap, 0, size,
 287             (ispullup) ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
 288
 289         /* load address, set/clear unaligned transfer and read/write bits. */
 290         bus_space_write_4(tcds->sc_bst, tcds->sc_bsh, tcds->sc_sda,
 291             asc->sc_dmamap->dm_segs[0].ds_addr >> 2);
 292         dic = bus_space_read_4(tcds->sc_bst, tcds->sc_bsh, tcds->sc_dic);
 293         dic &= ~TCDS_DIC_ADDRMASK;
 294         dic |= asc->sc_dmamap->dm_segs[0].ds_addr & TCDS_DIC_ADDRMASK;
 295         if (ispullup)
 296                 dic |= TCDS_DIC_WRITE;
 297         else
 298                 dic &= ~TCDS_DIC_WRITE;
 299         bus_space_write_4(tcds->sc_bst, tcds->sc_bsh, tcds->sc_dic, dic);
 300
 301         asc->sc_flags |= ASC_MAPLOADED;
 302         return 0;
 303 }
 304
 305 static void
 306 tcds_dma_go(struct ncr53c9x_softc *sc)
 307 {
 308         struct asc_softc *asc = (struct asc_softc *)sc;
 309
 310         /* mark unit as DMA-active */
 311         asc->sc_flags |= ASC_DMAACTIVE;
 312
 313         /* start DMA */
 314         tcds_dma_enable(asc->sc_tcds, 1);
 315 }
 316
 317 static void
 318 tcds_dma_stop(struct ncr53c9x_softc *sc)
 319 {
 320 #if 0
 321         struct asc_softc *asc = (struct asc_softc *)sc;
 322 #endif
 323
 324         /*
 325          * XXX STOP DMA HERE!
 326          */
 327 }
 328
 329 /*
 330  * Pseudo (chained) interrupt from the asc driver to kick the
 331  * current running DMA transfer. Called from ncr53c9x_intr()
 332  * for now.
 333  *
 334  * return 1 if it was a DMA continue.
 335  */
 336 static int
 337 tcds_dma_intr(struct ncr53c9x_softc *sc)
 338 {
 339         struct asc_softc *asc = (struct asc_softc *)sc;
 340         struct tcds_slotconfig *tcds = asc->sc_tcds;
 341         int trans, resid;
 342         uint32_t tcl, tcm;
 343         uint32_t dud, dudmask, *addr;
 344         bus_addr_t pa;
 345
 346         NCR_DMA(("tcds_dma %d: intr", tcds->sc_slot));
 347
 348         if (tcds_scsi_iserr(tcds))
 349                 return 0;
 350
 351         /* This is an "assertion" :) */
 352         if ((asc->sc_flags & ASC_DMAACTIVE) == 0)
 353                 panic("%s: DMA wasn't active", __func__);
 354
 355         /* DMA has stopped */
 356         tcds_dma_enable(tcds, 0);
 357         asc->sc_flags &= ~ASC_DMAACTIVE;
 358
 359         if (asc->sc_dmasize == 0) {
 360                 /* A "Transfer Pad" operation completed */
 361                 tcl = NCR_READ_REG(sc, NCR_TCL);
 362                 tcm = NCR_READ_REG(sc, NCR_TCM);
 363                 NCR_DMA(("dma_intr: discarded %d bytes (tcl=%d, tcm=%d)\n",
 364                     tcl | (tcm << 8), tcl, tcm));
 365                 return 0;
 366         }
 367
 368         resid = 0;
 369         if ((asc->sc_flags & ASC_ISPULLUP) == 0 &&
 370             (resid = (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF)) != 0) {
 371                 NCR_DMA(("dma_intr: empty esp FIFO of %d ", resid));
 372                 DELAY(1);
 373         }
 374
 375         resid += (tcl = NCR_READ_REG(sc, NCR_TCL));
 376         resid += (tcm = NCR_READ_REG(sc, NCR_TCM)) << 8;
 377
 378         trans = asc->sc_dmasize - resid;
 379         if (trans < 0) {                        /* transferred < 0 ? */
 380                 printf("tcds_dma %d: xfer (%d) > req (%d)\n",
 381                     tcds->sc_slot, trans, (int)asc->sc_dmasize);
 382                 trans = asc->sc_dmasize;
 383         }
 384
 385         NCR_DMA(("dma_intr: tcl=%d, tcm=%d; trans=%d, resid=%d\n",
 386             tcl, tcm, trans, resid));
 387
 388         *asc->sc_dmalen -= trans;
 389         *asc->sc_dmaaddr += trans;
 390
 391         bus_dmamap_sync(asc->sc_dmat, asc->sc_dmamap,
 392             0, asc->sc_dmamap->dm_mapsize,
 393             (sc->sc_flags & ASC_ISPULLUP) ?
 394             BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
 395
 396         /*
 397          * Clean up unaligned DMAs into main memory.
 398          */
 399         if (asc->sc_flags & ASC_ISPULLUP) {
 400                 /* Handle unaligned starting address, length. */
 401                 dud = bus_space_read_4(tcds->sc_bst,
 402                     tcds->sc_bsh, tcds->sc_dud0);
 403                 if ((dud & TCDS_DUD0_VALIDBITS) != 0) {
 404                         addr = (uint32_t *)((paddr_t)*asc->sc_dmaaddr & ~0x3);
 405                         dudmask = 0;
 406                         if (dud & TCDS_DUD0_VALID00)
 407                                 panic("%s: dud0 byte 0 valid", __func__);
 408                         if (dud & TCDS_DUD0_VALID01)
 409                                 dudmask |= TCDS_DUD_BYTE01;
 410                         if (dud & TCDS_DUD0_VALID10)
 411                                 dudmask |= TCDS_DUD_BYTE10;
 412 #ifdef DIAGNOSTIC
 413                         if (dud & TCDS_DUD0_VALID11)
 414                                 dudmask |= TCDS_DUD_BYTE11;
 415 #endif
 416                         NCR_DMA(("dud0 at %p dudmask 0x%x\n",
 417                             addr, dudmask));
 418                         *addr = (*addr & ~dudmask) | (dud & dudmask);
 419                 }
 420                 dud = bus_space_read_4(tcds->sc_bst,
 421                     tcds->sc_bsh, tcds->sc_dud1);
 422                 if ((dud & TCDS_DUD1_VALIDBITS) != 0) {
 423                         pa = bus_space_read_4(tcds->sc_bst, tcds->sc_bsh,
 424                             tcds->sc_sda) << 2;
 425                         dudmask = 0;
 426                         if (dud & TCDS_DUD1_VALID00)
 427                                 dudmask |= TCDS_DUD_BYTE00;
 428                         if (dud & TCDS_DUD1_VALID01)
 429                                 dudmask |= TCDS_DUD_BYTE01;
 430                         if (dud & TCDS_DUD1_VALID10)
 431                                 dudmask |= TCDS_DUD_BYTE10;
 432 #ifdef DIAGNOSTIC
 433                         if (dud & TCDS_DUD1_VALID11)
 434                                 panic("%s: dud1 byte 3 valid", __func__);
 435 #endif
 436                         NCR_DMA(("dud1 at 0x%lx dudmask 0x%x\n",
 437                             pa, dudmask));
 438                         /* XXX Fix TC_PHYS_TO_UNCACHED() */
 439 #if defined(__alpha__)
 440                         addr = (uint32_t *)ALPHA_PHYS_TO_K0SEG(pa);
 441 #elif defined(__mips__)
 442                         addr = (uint32_t *)MIPS_PHYS_TO_KSEG1(pa);
 443 #elif defined(__vax__)
 444                         addr = (uint32_t *)VAX_PHYS_TO_S0(pa);
 445 #else
 446 #error TURBOchannel only exists on DECs, folks...
 447 #endif
 448                         *addr = (*addr & ~dudmask) | (dud & dudmask);
 449                 }
 450                 /* XXX deal with saved residual byte? */
 451         }
 452
 453         bus_dmamap_unload(asc->sc_dmat, asc->sc_dmamap);
 454         asc->sc_flags &= ~ASC_MAPLOADED;
 455
 456         return 0;
 457 }
 458
 459 /*
 460  * Glue functions.
 461  */
 462 static uint8_t
 463 asc_read_reg(struct ncr53c9x_softc *sc, int reg)
 464 {
 465         struct asc_softc *asc = (struct asc_softc *)sc;
 466         uint32_t v;
 467
 468         v = bus_space_read_4(asc->sc_bst, asc->sc_scsi_bsh,
 469             reg * sizeof(uint32_t));
 470
 471         return v & 0xff;
 472 }
 473
 474 static void
 475 asc_write_reg(struct ncr53c9x_softc *sc, int reg, u_char val)
 476 {
 477         struct asc_softc *asc = (struct asc_softc *)sc;
 478
 479         bus_space_write_4(asc->sc_bst, asc->sc_scsi_bsh,
 480             reg * sizeof(uint32_t), val);
 481 }
 482
 483 static int
 484 tcds_dma_isintr(struct ncr53c9x_softc *sc)
 485 {
 486         struct asc_softc *asc = (struct asc_softc *)sc;
 487         int x;
 488
 489         x = tcds_scsi_isintr(asc->sc_tcds, 1);
 490
 491         /* XXX */
 492         return x;
 493 }
 494
 495 static int
 496 tcds_dma_isactive(struct ncr53c9x_softc *sc)
 497 {
 498         struct asc_softc *asc = (struct asc_softc *)sc;
 499
 500         return (asc->sc_flags & ASC_DMAACTIVE) != 0;
 501 }
 502
 503 static void
 504 tcds_clear_latched_intr(struct ncr53c9x_softc *sc)
 505 {
 506         struct asc_softc *asc = (struct asc_softc *)sc;
 507
 508         /* Clear the TCDS interrupt bit. */
 509         (void)tcds_scsi_isintr(asc->sc_tcds, 1);
 510 }