sys/dev/tc/pxg.c

   1 /*      $NetBSD: pxg.c,v 1.32 2009/05/12 14:47:04 cegger Exp $  */
   2
   3 /*-
   4  * Copyright (c) 1999, 2000, 2001 The NetBSD Foundation, Inc.
   5  * All rights reserved.
   6  *
   7  * This code is derived from software contributed to The NetBSD Foundation
   8  * by Andrew Doran.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions
  12  * are met:
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  29  * POSSIBILITY OF SUCH DAMAGE.
  30  */
  31
  32 /*
  33  * Driver for DEC PixelStamp graphics accelerators with onboard SRAM and
  34  * Intel i860 co-processor (PMAG-D, E and F).
  35  */
  36
  37 #include <sys/cdefs.h>
  38 __KERNEL_RCSID(0, "$NetBSD: pxg.c,v 1.32 2009/05/12 14:47:04 cegger Exp $");
  39
  40 #include <sys/param.h>
  41 #include <sys/systm.h>
  42 #include <sys/device.h>
  43 #include <sys/malloc.h>
  44 #include <sys/callout.h>
  45 #include <sys/proc.h>
  46 #include <sys/kauth.h>
  47
  48 #if defined(pmax)
  49 #include <mips/cpuregs.h>
  50 #elif defined(alpha)
  51 #include <alpha/alpha_cpu.h>
  52 #endif
  53
  54 #include <machine/autoconf.h>
  55 #include <sys/cpu.h>
  56 #include <sys/bus.h>
  57
  58 #include <dev/cons.h>
  59
  60 #include <dev/wscons/wsconsio.h>
  61 #include <dev/wscons/wsdisplayvar.h>
  62
  63 #include <dev/ic/bt459reg.h>
  64
  65 #include <dev/tc/tcvar.h>
  66 #include <dev/tc/sticreg.h>
  67 #include <dev/tc/sticio.h>
  68 #include <dev/tc/sticvar.h>
  69 #include <dev/tc/pxgvar.h>
  70
  71 #define PXG_STIC_POLL_OFFSET    0x000000        /* STIC DMA poll space */
  72 #define PXG_STAMP_OFFSET        0x0c0000        /* pixelstamp space on STIC */
  73 #define PXG_STIC_OFFSET         0x180000        /* STIC registers */
  74 #define PXG_SRAM_OFFSET         0x200000        /* 128 or 256kB of SRAM */
  75 #define PXG_HOST_INTR_OFFSET    0x280000        /* i860 host interrupt */
  76 #define PXG_COPROC_INTR_OFFSET  0x2c0000        /* i860 coprocessor interrupt */
  77 #define PXG_VDAC_OFFSET         0x300000        /* VDAC registers (bt459) */
  78 #define PXG_VDAC_RESET_OFFSET   0x340000        /* VDAC reset register */
  79 #define PXG_ROM_OFFSET          0x380000        /* ROM code */
  80 #define PXG_I860_START_OFFSET   0x380000        /* i860 start register */
  81 #define PXG_I860_RESET_OFFSET   0x3c0000        /* i860 stop register */
  82
  83 static void     pxg_attach(device_t, device_t, void *);
  84 static int      pxg_intr(void *);
  85 static int      pxg_match(device_t, cfdata_t, void *);
  86
  87 static void     pxg_init(struct stic_info *);
  88 static int      pxg_ioctl(struct stic_info *, u_long, void *, int, struct lwp *);
  89 static uint32_t *pxg_pbuf_get(struct stic_info *);
  90 static int      pxg_pbuf_post(struct stic_info *, uint32_t *);
  91 static int      pxg_probe_planes(struct stic_info *);
  92 static int      pxg_probe_sram(struct stic_info *);
  93
  94 void    pxg_cnattach(tc_addr_t);
  95
  96 struct pxg_softc {
  97         struct  stic_info *pxg_si;
  98 };
  99
 100 CFATTACH_DECL_NEW(pxg, sizeof(struct pxg_softc),
 101     pxg_match, pxg_attach, NULL, NULL);
 102
 103 static const char *pxg_types[] = {
 104         "PMAG-DA ",
 105         "PMAG-FA ",
 106         "PMAG-FB ",
 107         "PMAGB-FA",
 108         "PMAGB-FB",
 109 };
 110
 111 static int
 112 pxg_match(device_t parent, cfdata_t match, void *aux)
 113 {
 114         struct tc_attach_args *ta;
 115         int i;
 116
 117         ta = aux;
 118
 119         for (i = 0; i < sizeof(pxg_types) / sizeof(pxg_types[0]); i++)
 120                 if (strncmp(pxg_types[i], ta->ta_modname, TC_ROM_LLEN) == 0)
 121                         return (1);
 122
 123         return (0);
 124 }
 125
 126 static void
 127 pxg_attach(device_t parent, device_t self, void *aux)
 128 {
 129         struct stic_info *si;
 130         struct tc_attach_args *ta;
 131         struct pxg_softc *pxg;
 132         int console;
 133
 134         pxg = device_private(self);
 135         ta = (struct tc_attach_args *)aux;
 136
 137         if (ta->ta_addr == stic_consinfo.si_slotbase) {
 138                 si = &stic_consinfo;
 139                 console = 1;
 140         } else {
 141                 if (stic_consinfo.si_slotbase == 0)
 142                         si = &stic_consinfo;
 143                 else {
 144                         si = malloc(sizeof(*si), M_DEVBUF, M_NOWAIT|M_ZERO);
 145                 }
 146                 si->si_slotbase = ta->ta_addr;
 147                 pxg_init(si);
 148                 console = 0;
 149         }
 150
 151         pxg->pxg_si = si;
 152         si->si_dv = self;
 153         tc_intr_establish(parent, ta->ta_cookie, IPL_TTY, pxg_intr, si);
 154
 155         printf(": %d plane, %dx%d stamp, %dkB SRAM\n", si->si_depth,
 156             si->si_stampw, si->si_stamph, (int)si->si_buf_size >> 10);
 157
 158         stic_attach(self, si, console);
 159
 160 #ifdef notyet
 161         /* Load the co-processor "firmware". */
 162         for (i = 0; i < sizeof(pxg_fwsegs) / sizeof(pxg_fwsegs[0]); i++)
 163                 pxg_load_fwseg(si, &pxg_fwsegs[i]);
 164
 165         /* Start the i860. */
 166         si->si_slotbase[PXG_I860_START_OFFSET >> 2] = 1;
 167         tc_wmb();
 168         tc_syncbus();
 169         DELAY(40000);
 170 #endif
 171 }
 172
 173 void
 174 pxg_cnattach(tc_addr_t addr)
 175 {
 176         struct stic_info *si;
 177
 178         si = &stic_consinfo;
 179         si->si_slotbase = addr;
 180         pxg_init(si);
 181         stic_cnattach(si);
 182 }
 183
 184 static void
 185 pxg_init(struct stic_info *si)
 186 {
 187         volatile uint32_t *slot;
 188         char *kva;
 189
 190         kva = (void *)si->si_slotbase;
 191
 192         si->si_vdac = (uint32_t *)(kva + PXG_VDAC_OFFSET);
 193         si->si_vdac_reset = (uint32_t *)(kva + PXG_VDAC_RESET_OFFSET);
 194         si->si_stic = (volatile struct stic_regs *)(kva + PXG_STIC_OFFSET);
 195         si->si_stamp = (uint32_t *)(kva + PXG_STAMP_OFFSET);
 196         si->si_buf = (uint32_t *)(kva + PXG_SRAM_OFFSET);
 197         si->si_buf_phys = STIC_KSEG_TO_PHYS(si->si_buf);
 198         si->si_buf_size = pxg_probe_sram(si);
 199         si->si_disptype = WSDISPLAY_TYPE_PXG;
 200         si->si_sxc = (volatile struct stic_xcomm *)si->si_buf;
 201
 202         si->si_pbuf_get = pxg_pbuf_get;
 203         si->si_pbuf_post = pxg_pbuf_post;
 204         si->si_ioctl = pxg_ioctl;
 205
 206         /* Disable the co-processor. */
 207         slot = (volatile uint32_t *)kva;
 208         slot[PXG_I860_RESET_OFFSET >> 2] = 0;
 209         tc_wmb();
 210         slot[PXG_HOST_INTR_OFFSET >> 2] = 0;
 211         tc_wmb();
 212         tc_syncbus();
 213         DELAY(40000);
 214
 215         /* XXX Check for a second PixelStamp. */
 216         if (((si->si_stic->sr_modcl & 0x600) >> 9) > 1)
 217                 si->si_depth = 24;
 218         else
 219                 si->si_depth = pxg_probe_planes(si);
 220
 221         stic_init(si);
 222 }
 223
 224 static int
 225 pxg_probe_sram(struct stic_info *si)
 226 {
 227         volatile uint32_t *a, *b;
 228
 229         a = (volatile uint32_t *)si->si_slotbase + (PXG_SRAM_OFFSET >> 2);
 230         b = a + (0x20000 >> 2);
 231         *a = 4321;
 232         *b = 1234;
 233         tc_mb();
 234         return ((*a == *b) ? 0x20000 : 0x40000);
 235 }
 236
 237 static int
 238 pxg_probe_planes(struct stic_info *si)
 239 {
 240         volatile uint32_t *vdac;
 241         int id;
 242
 243         /*
 244          * For the visible framebuffer (# 0), we can cheat and use the VDAC
 245          * ID.
 246          */
 247         vdac = si->si_vdac;
 248         vdac[BT459_REG_ADDR_LOW] = (BT459_IREG_ID & 0xff) |
 249             ((BT459_IREG_ID & 0xff) << 8) | ((BT459_IREG_ID & 0xff) << 16);
 250         vdac[BT459_REG_ADDR_HIGH] = ((BT459_IREG_ID & 0xff00) >> 8) |
 251             (BT459_IREG_ID & 0xff00) | ((BT459_IREG_ID & 0xff00) << 8);
 252         tc_mb();
 253         id = vdac[BT459_REG_IREG_DATA] & 0x00ffffff;
 254
 255         /* 3 VDACs */
 256         if (id == 0x004a4a4a)
 257                 return (24);
 258
 259         /* 1 VDAC */
 260         if ((id & 0xff0000) == 0x4a0000 || (id & 0x00ff00) == 0x004a00 ||
 261             (id & 0x0000ff) == 0x00004a)
 262                 return (8);
 263
 264         /* XXX Assume 8 planes. */
 265         printf("pxg_probe_planes: invalid VDAC ID %x\n", id);
 266         return (8);
 267 }
 268
 269 static int
 270 pxg_intr(void *cookie)
 271 {
 272 #ifdef notyet
 273         struct stic_info *si;
 274         volatile struct stic_regs *sr;
 275         volatile uint32_t *hi;
 276         uint32_t state;
 277         int it;
 278
 279         si = cookie;
 280         sr = si->si_stic;
 281         state = sr->sr_ipdvint;
 282         hi = (volatile uint32_t *)si->si_slotbase +
 283             (PXG_HOST_INTR_OFFSET / sizeof(uint32_t));
 284
 285         /* Clear the interrupt condition */
 286         it = hi[0] & 15;
 287         hi[0] = 0;
 288         tc_wmb();
 289         hi[2] = 0;
 290         tc_wmb();
 291
 292         switch (it) {
 293         case 3:
 294                 sr->sr_ipdvint = STIC_INT_V_WE | STIC_INT_V_EN;
 295                 tc_wmb();
 296                 stic_flush(si);
 297                 break;
 298         }
 299 #else
 300         printf("pxg_intr: how did this happen?\n");
 301 #endif
 302         return (1);
 303 }
 304
 305 static uint32_t *
 306 pxg_pbuf_get(struct stic_info *si)
 307 {
 308         u_long off;
 309
 310         si->si_pbuf_select ^= STIC_PACKET_SIZE;
 311         off = si->si_pbuf_select + STIC_XCOMM_SIZE;
 312         return ((uint32_t *)((char *)si->si_buf + off));
 313 }
 314
 315 static int
 316 pxg_pbuf_post(struct stic_info *si, uint32_t *buf)
 317 {
 318         volatile uint32_t *poll, junk;
 319         volatile struct stic_regs *sr;
 320         u_long v;
 321         int c;
 322
 323         sr = si->si_stic;
 324
 325         /* Get address of poll register for this buffer. */
 326         v = ((u_long)buf - (u_long)si->si_buf) >> 9;
 327         poll = (volatile uint32_t *)((char *)si->si_slotbase + v);
 328
 329         /*
 330          * Read the poll register and make sure the stamp wants to accept
 331          * our packet.  This read will initiate the DMA.  Don't wait for
 332          * ever, just in case something's wrong.
 333          */
 334         tc_mb();
 335
 336         for (c = STAMP_RETRIES; c != 0; c--) {
 337                 if ((sr->sr_ipdvint & STIC_INT_P) != 0) {
 338                         sr->sr_ipdvint = STIC_INT_P_WE;
 339                         tc_wmb();
 340                         junk = *poll;
 341                         return (0);
 342                 }
 343                 DELAY(STAMP_DELAY);
 344         }
 345
 346         /* STIC has lost the plot, punish it. */
 347         stic_reset(si);
 348         return (-1);
 349 }
 350
 351 static int
 352 pxg_ioctl(struct stic_info *si, u_long cmd, void *data, int flag,
 353           struct lwp *l)
 354 {
 355         struct stic_xinfo *sxi;
 356         volatile uint32_t *ptr = NULL;
 357         int rv, s;
 358
 359         switch (cmd) {
 360         case STICIO_START860:
 361         case STICIO_RESET860:
 362                 if ((rv = kauth_authorize_generic(l->l_cred,
 363                     KAUTH_GENERIC_ISSUSER, NULL)) != 0)
 364                         return (rv);
 365                 if (si->si_dispmode != WSDISPLAYIO_MODE_MAPPED)
 366                         return (EBUSY);
 367                 ptr = (volatile uint32_t *)si->si_slotbase;
 368                 break;
 369         }
 370
 371         switch (cmd) {
 372         case STICIO_START860:
 373                 s = spltty();
 374                 ptr[PXG_I860_START_OFFSET >> 2] = 1;
 375                 tc_wmb();
 376                 splx(s);
 377                 rv = 0;
 378                 break;
 379
 380         case STICIO_RESET860:
 381                 s = spltty();
 382                 ptr[PXG_I860_RESET_OFFSET >> 2] = 0;
 383                 tc_wmb();
 384                 splx(s);
 385                 rv = 0;
 386                 break;
 387
 388         case STICIO_GXINFO:
 389                 sxi = (struct stic_xinfo *)data;
 390                 sxi->sxi_unit = si->si_unit;
 391                 sxi->sxi_stampw = si->si_stampw;
 392                 sxi->sxi_stamph = si->si_stamph;
 393                 sxi->sxi_buf_size = si->si_buf_size;
 394                 sxi->sxi_buf_phys = 0;
 395                 sxi->sxi_buf_pktoff = STIC_XCOMM_SIZE;
 396                 sxi->sxi_buf_pktcnt = 2;
 397                 sxi->sxi_buf_imgoff = STIC_XCOMM_SIZE + STIC_PACKET_SIZE * 2;
 398                 rv = 0;
 399                 break;
 400
 401         default:
 402                 rv = EPASSTHROUGH;
 403                 break;
 404         }
 405
 406         return (rv);
 407 }
 408
 409 #ifdef notyet
 410 void
 411 pxg_load_fwseg(struct stic_info *si, struct pxg_fwseg *pfs)
 412 {
 413         const uint32_t *src;
 414         uint32_t *dst;
 415         u_int left, i;
 416
 417         dst = (uint32_t *)((void *)si->si_buf + pfs->pfs_addr);
 418         src = pfs->pfs_data;
 419
 420         for (left = pfs->pfs_compsize; left != 0; left -= 4) {
 421                 if (src[0] == PXGFW_RLE_MAGIC) {
 422                         for (i = src[2]; i != 0; i--)
 423                                 *dst++ = src[1];
 424                         src += 3;
 425                 } else {
 426                         *dst++ = src[0];
 427                         src++;
 428                 }
 429         }
 430
 431         if (src == NULL)
 432                 memset(dst, 0, pfs->pfs_realsize);
 433 }
 434 #endif