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1 /* Definitions for the Blackfin port.
2 Copyright (C) 2005 Free Software Foundation, Inc.
3 Contributed by Analog Devices.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 2, or (at your
10 option) any later version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to
19 the Free Software Foundation, 51 Franklin Street, Fifth Floor,
20 Boston, MA 02110-1301, USA. */
22 #ifndef _BFIN_CONFIG
23 #define _BFIN_CONFIG
25 #define OBJECT_FORMAT_ELF
27 #define BRT 1
28 #define BRF 0
30 /* Print subsidiary information on the compiler version in use. */
33 /* Run-time compilation parameters selecting different hardware subsets. */
37 /* Predefinition in the preprocessor for this target machine */
38 #ifndef TARGET_CPU_CPP_BUILTINS
39 #define TARGET_CPU_CPP_BUILTINS() \
40 do \
41 { \
44 if (flag_pic) \
45 { \
48 } \
49 if (TARGET_ID_SHARED_LIBRARY) \
51 } \
52 while (0)
53 #endif
55 /* Generate DSP instructions, like DSP halfword loads */
56 #define TARGET_DSP (1)
58 #define TARGET_DEFAULT (MASK_SPECLD_ANOMALY | MASK_CSYNC_ANOMALY)
60 /* Maximum number of library ids we permit */
61 #define MAX_LIBRARY_ID 255
65 /* Sometimes certain combinations of command options do not make
66 sense on a particular target machine. You can define a macro
67 `OVERRIDE_OPTIONS' to take account of this. This macro, if
68 defined, is executed once just after all the command options have
69 been parsed.
71 Don't use this macro to turn on various extra optimizations for
72 `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */
74 #define OVERRIDE_OPTIONS override_options ()
76 #define FUNCTION_MODE SImode
77 #define Pmode SImode
79 /* store-condition-codes instructions store 0 for false
80 This is the value stored for true. */
81 #define STORE_FLAG_VALUE 1
83 /* Define this if pushing a word on the stack
84 makes the stack pointer a smaller address. */
85 #define STACK_GROWS_DOWNWARD
87 #define STACK_PUSH_CODE PRE_DEC
89 /* Define this to nonzero if the nominal address of the stack frame
90 is at the high-address end of the local variables;
91 that is, each additional local variable allocated
92 goes at a more negative offset in the frame. */
93 #define FRAME_GROWS_DOWNWARD 1
95 /* We define a dummy ARGP register; the parameters start at offset 0 from
96 it. */
97 #define FIRST_PARM_OFFSET(DECL) 0
99 /* Offset within stack frame to start allocating local variables at.
100 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
101 first local allocated. Otherwise, it is the offset to the BEGINNING
102 of the first local allocated. */
103 #define STARTING_FRAME_OFFSET 0
105 /* Register to use for pushing function arguments. */
106 #define STACK_POINTER_REGNUM REG_P6
108 /* Base register for access to local variables of the function. */
109 #define FRAME_POINTER_REGNUM REG_P7
111 /* A dummy register that will be eliminated to either FP or SP. */
112 #define ARG_POINTER_REGNUM REG_ARGP
114 /* `PIC_OFFSET_TABLE_REGNUM'
115 The register number of the register used to address a table of
116 static data addresses in memory. In some cases this register is
117 defined by a processor's "application binary interface" (ABI).
118 When this macro is defined, RTL is generated for this register
119 once, as with the stack pointer and frame pointer registers. If
120 this macro is not defined, it is up to the machine-dependent files
121 to allocate such a register (if necessary). */
122 #define PIC_OFFSET_TABLE_REGNUM (REG_P5)
124 /* A static chain register for nested functions. We need to use a
125 call-clobbered register for this. */
126 #define STATIC_CHAIN_REGNUM REG_P2
128 /* Define this if functions should assume that stack space has been
129 allocated for arguments even when their values are passed in
130 registers.
132 The value of this macro is the size, in bytes, of the area reserved for
133 arguments passed in registers.
135 This space can either be allocated by the caller or be a part of the
136 machine-dependent stack frame: `OUTGOING_REG_PARM_STACK_SPACE'
137 says which. */
138 #define FIXED_STACK_AREA 12
139 #define REG_PARM_STACK_SPACE(FNDECL) FIXED_STACK_AREA
141 /* Define this if the above stack space is to be considered part of the
142 * space allocated by the caller. */
143 #define OUTGOING_REG_PARM_STACK_SPACE
145 /* Define this if the maximum size of all the outgoing args is to be
146 accumulated and pushed during the prologue. The amount can be
147 found in the variable current_function_outgoing_args_size. */
148 #define ACCUMULATE_OUTGOING_ARGS 1
150 /* Value should be nonzero if functions must have frame pointers.
151 Zero means the frame pointer need not be set up (and parms
152 may be accessed via the stack pointer) in functions that seem suitable.
153 This is computed in `reload', in reload1.c.
154 */
155 #define FRAME_POINTER_REQUIRED (bfin_frame_pointer_required ())
157 #define PARM_BOUNDRY 32
159 #define STACK_BOUNDRY 32
161 /*#define DATA_ALIGNMENT(TYPE, BASIC-ALIGN) for arrays.. */
163 /* Make strings word-aligned so strcpy from constants will be faster. */
164 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
165 (TREE_CODE (EXP) == STRING_CST \
166 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
168 #define TRAMPOLINE_SIZE 18
169 #define TRAMPOLINE_TEMPLATE(FILE) \
176 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
177 initialize_trampoline (TRAMP, FNADDR, CXT)
178 \f
179 /* Definitions for register eliminations.
181 This is an array of structures. Each structure initializes one pair
182 of eliminable registers. The "from" register number is given first,
183 followed by "to". Eliminations of the same "from" register are listed
184 in order of preference.
186 There are two registers that can always be eliminated on the i386.
187 The frame pointer and the arg pointer can be replaced by either the
188 hard frame pointer or to the stack pointer, depending upon the
189 circumstances. The hard frame pointer is not used before reload and
190 so it is not eligible for elimination. */
192 #define ELIMINABLE_REGS \
193 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
194 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
195 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}} \
197 /* Given FROM and TO register numbers, say whether this elimination is
198 allowed. Frame pointer elimination is automatically handled.
200 All other eliminations are valid. */
202 #define CAN_ELIMINATE(FROM, TO) \
203 ((TO) == STACK_POINTER_REGNUM ? ! frame_pointer_needed : 1)
205 /* Define the offset between two registers, one to be eliminated, and the other
206 its replacement, at the start of a routine. */
208 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
209 ((OFFSET) = bfin_initial_elimination_offset ((FROM), (TO)))
210 \f
211 /* This processor has
212 8 data register for doing arithmetic
213 8 pointer register for doing addressing, including
214 1 stack pointer P6
215 1 frame pointer P7
216 4 sets of indexing registers (I0-3, B0-3, L0-3, M0-3)
217 1 condition code flag register CC
218 5 return address registers RETS/I/X/N/E
219 1 arithmetic status register (ASTAT). */
221 #define FIRST_PSEUDO_REGISTER 44
223 #define PREG_P(X) (REG_P (X) && REGNO (X) >= REG_P0 && REGNO (X) <= REG_P7)
224 #define ADDRESS_REGNO_P(X) ((X) >= REG_P0 && (X) <= REG_M3)
225 #define D_REGNO_P(X) ((X) <= REG_R7)
227 #define REGISTER_NAMES { \
236 }
238 #define SHORT_REGISTER_NAMES { \
244 #define HIGH_REGISTER_NAMES { \
250 #define DREGS_PAIR_NAMES { \
253 #define BYTE_REGISTER_NAMES { \
257 /* 1 for registers that have pervasive standard uses
258 and are not available for the register allocator. */
260 #define FIXED_REGISTERS \
262 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
264 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, \
266 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 \
267 }
269 /* 1 for registers not available across function calls.
270 These must include the FIXED_REGISTERS and also any
271 registers that can be used without being saved.
272 The latter must include the registers where values are returned
273 and the register where structure-value addresses are passed.
274 Aside from that, you can include as many other registers as you like. */
276 #define CALL_USED_REGISTERS \
278 { 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 1, 0, \
280 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
282 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 \
283 }
285 /* Order in which to allocate registers. Each register must be
286 listed once, even those in FIXED_REGISTERS. List frame pointer
287 late and fixed registers last. Note that, in general, we prefer
288 registers listed in CALL_USED_REGISTERS, keeping the others
289 available for storage of persistent values. */
291 #define REG_ALLOC_ORDER \
292 { REG_R0, REG_R1, REG_R2, REG_R3, REG_R7, REG_R6, REG_R5, REG_R4, \
293 REG_P2, REG_P1, REG_P0, REG_P5, REG_P4, REG_P3, REG_P6, REG_P7, \
294 REG_A0, REG_A1, \
295 REG_I0, REG_I1, REG_I2, REG_I3, REG_B0, REG_B1, REG_B2, REG_B3, \
296 REG_L0, REG_L1, REG_L2, REG_L3, REG_M0, REG_M1, REG_M2, REG_M3, \
297 REG_RETS, REG_RETI, REG_RETX, REG_RETN, REG_RETE, \
298 REG_ASTAT, REG_SEQSTAT, REG_USP, \
299 REG_CC, REG_ARGP \
300 }
302 /* Macro to conditionally modify fixed_regs/call_used_regs. */
303 #define CONDITIONAL_REGISTER_USAGE \
304 { \
305 conditional_register_usage(); \
306 if (flag_pic) \
307 { \
308 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
309 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
310 } \
311 }
313 /* Define the classes of registers for register constraints in the
314 machine description. Also define ranges of constants.
316 One of the classes must always be named ALL_REGS and include all hard regs.
317 If there is more than one class, another class must be named NO_REGS
318 and contain no registers.
320 The name GENERAL_REGS must be the name of a class (or an alias for
321 another name such as ALL_REGS). This is the class of registers
322 that is allowed by "g" or "r" in a register constraint.
323 Also, registers outside this class are allocated only when
324 instructions express preferences for them.
326 The classes must be numbered in nondecreasing order; that is,
327 a larger-numbered class must never be contained completely
328 in a smaller-numbered class.
330 For any two classes, it is very desirable that there be another
331 class that represents their union. */
334 enum reg_class
335 {
336 NO_REGS,
337 IREGS,
338 BREGS,
339 LREGS,
340 MREGS,
341 CIRCREGS, /* Circular buffering registers, Ix, Bx, Lx together form. See Automatic Circular Buffering. */
342 DAGREGS,
343 EVEN_AREGS,
344 ODD_AREGS,
345 AREGS,
346 CCREGS,
347 EVEN_DREGS,
348 ODD_DREGS,
349 DREGS,
350 PREGS_CLOBBERED,
351 PREGS,
352 DPREGS,
353 MOST_REGS,
354 PROLOGUE_REGS,
355 NON_A_CC_REGS,
356 ALL_REGS, LIM_REG_CLASSES
357 };
359 #define N_REG_CLASSES ((int)LIM_REG_CLASSES)
361 #define GENERAL_REGS DPREGS
363 /* Give names of register classes as strings for dump file. */
365 #define REG_CLASS_NAMES \
388 /* An initializer containing the contents of the register classes, as integers
389 which are bit masks. The Nth integer specifies the contents of class N.
390 The way the integer MASK is interpreted is that register R is in the class
391 if `MASK & (1 << R)' is 1.
393 When the machine has more than 32 registers, an integer does not suffice.
394 Then the integers are replaced by sub-initializers, braced groupings
395 containing several integers. Each sub-initializer must be suitable as an
396 initializer for the type `HARD_REG_SET' which is defined in
397 `hard-reg-set.h'. */
399 /* NOTE: DSP registers, IREGS - AREGS, are not GENERAL_REGS. We use
400 MOST_REGS as the union of DPREGS and DAGREGS. */
402 #define REG_CLASS_CONTENTS \
426 #define BASE_REG_CLASS PREGS
427 #define INDEX_REG_CLASS PREGS
429 #define REGNO_OK_FOR_BASE_STRICT_P(X) (REGNO_REG_CLASS (X) == BASE_REG_CLASS)
430 #define REGNO_OK_FOR_BASE_NONSTRICT_P(X) \
431 (((X) >= FIRST_PSEUDO_REGISTER) || REGNO_REG_CLASS (X) == BASE_REG_CLASS)
433 #ifdef REG_OK_STRICT
434 #define REGNO_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_STRICT_P (X)
435 #else
436 #define REGNO_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_NONSTRICT_P (X)
437 #endif
439 #define REG_OK_FOR_BASE_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))
440 #define REG_OK_FOR_INDEX_P(X) 0
441 #define REGNO_OK_FOR_INDEX_P(X) 0
443 /* Get reg_class from a letter such as appears in the machine description. */
445 #define REG_CLASS_FROM_LETTER(LETTER) \
462 NO_REGS)
464 /* The same information, inverted:
465 Return the class number of the smallest class containing
466 reg number REGNO. This could be a conditional expression
467 or could index an array. */
469 #define REGNO_REG_CLASS(REGNO) \
470 ((REGNO) < REG_P0 ? DREGS \
471 : (REGNO) < REG_I0 ? PREGS \
472 : (REGNO) == REG_ARGP ? BASE_REG_CLASS \
473 : (REGNO) >= REG_I0 && (REGNO) <= REG_I3 ? IREGS \
474 : (REGNO) >= REG_L0 && (REGNO) <= REG_L3 ? LREGS \
475 : (REGNO) >= REG_B0 && (REGNO) <= REG_B3 ? BREGS \
476 : (REGNO) >= REG_M0 && (REGNO) <= REG_M3 ? MREGS \
477 : (REGNO) == REG_A0 || (REGNO) == REG_A1 ? AREGS \
478 : (REGNO) == REG_CC ? CCREGS \
479 : (REGNO) >= REG_RETS ? PROLOGUE_REGS \
480 : NO_REGS)
482 /* When defined, the compiler allows registers explicitly used in the
483 rtl to be used as spill registers but prevents the compiler from
484 extending the lifetime of these registers. */
485 #define SMALL_REGISTER_CLASSES 1
487 #define CLASS_LIKELY_SPILLED_P(CLASS) \
488 ((CLASS) == PREGS_CLOBBERED \
489 || (CLASS) == PROLOGUE_REGS \
490 || (CLASS) == CCREGS)
492 /* Do not allow to store a value in REG_CC for any mode */
493 /* Do not allow to store value in pregs if mode is not SI*/
494 #define HARD_REGNO_MODE_OK(REGNO, MODE) hard_regno_mode_ok((REGNO), (MODE))
496 /* Return the maximum number of consecutive registers
497 needed to represent mode MODE in a register of class CLASS. */
498 #define CLASS_MAX_NREGS(CLASS, MODE) \
499 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
501 #define HARD_REGNO_NREGS(REGNO, MODE) \
502 ((MODE) == PDImode && ((REGNO) == REG_A0 || (REGNO) == REG_A1) \
503 ? 1 : CLASS_MAX_NREGS (GENERAL_REGS, MODE))
505 /* A C expression that is nonzero if hard register TO can be
506 considered for use as a rename register for FROM register */
507 #define HARD_REGNO_RENAME_OK(FROM, TO) bfin_hard_regno_rename_ok (FROM, TO)
509 /* A C expression that is nonzero if it is desirable to choose
510 register allocation so as to avoid move instructions between a
511 value of mode MODE1 and a value of mode MODE2.
513 If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R,
514 MODE2)' are ever different for any R, then `MODES_TIEABLE_P (MODE1,
515 MODE2)' must be zero. */
516 #define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) == (MODE2))
518 /* `PREFERRED_RELOAD_CLASS (X, CLASS)'
519 A C expression that places additional restrictions on the register
520 class to use when it is necessary to copy value X into a register
521 in class CLASS. The value is a register class; perhaps CLASS, or
522 perhaps another, smaller class. */
523 #define PREFERRED_RELOAD_CLASS(X, CLASS) (CLASS)
525 #define SECONDARY_OUTPUT_RELOAD_CLASS(class,mode,x) \
526 secondary_output_reload_class(class,mode,x)
527 #define SECONDARY_INPUT_RELOAD_CLASS(class,mode,x) \
528 secondary_input_reload_class(class,mode,x)
530 /* Function Calling Conventions. */
532 /* The type of the current function; normal functions are of type
533 SUBROUTINE. */
538 #define FUNCTION_ARG_REGISTERS { REG_R0, REG_R1, REG_R2, -1 }
540 /* Flags for the call/call_value rtl operations set up by function_arg */
552 /* Define where to put the arguments to a function.
553 Value is zero to push the argument on the stack,
554 or a hard register in which to store the argument.
556 MODE is the argument's machine mode.
557 TYPE is the data type of the argument (as a tree).
558 This is null for libcalls where that information may
559 not be available.
560 CUM is a variable of type CUMULATIVE_ARGS which gives info about
561 the preceding args and about the function being called.
562 NAMED is nonzero if this argument is a named parameter
563 (otherwise it is an extra parameter matching an ellipsis). */
565 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
566 (function_arg (&CUM, MODE, TYPE, NAMED))
568 #define FUNCTION_ARG_REGNO_P(REGNO) function_arg_regno_p (REGNO)
571 /* Initialize a variable CUM of type CUMULATIVE_ARGS
572 for a call to a function whose data type is FNTYPE.
573 For a library call, FNTYPE is 0. */
574 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT, N_NAMED_ARGS) \
575 (init_cumulative_args (&CUM, FNTYPE, LIBNAME))
577 /* Update the data in CUM to advance over an argument
578 of mode MODE and data type TYPE.
579 (TYPE is null for libcalls where that information may not be available.) */
580 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
581 (function_arg_advance (&CUM, MODE, TYPE, NAMED))
583 #define RETURN_POPS_ARGS(FDECL, FUNTYPE, STKSIZE) 0
585 /* Define how to find the value returned by a function.
586 VALTYPE is the data type of the value (as a tree).
587 If the precise function being called is known, FUNC is its FUNCTION_DECL;
588 otherwise, FUNC is 0.
589 */
591 #define VALUE_REGNO(MODE) (REG_R0)
593 #define FUNCTION_VALUE(VALTYPE, FUNC) \
594 gen_rtx_REG (TYPE_MODE (VALTYPE), \
595 VALUE_REGNO(TYPE_MODE(VALTYPE)))
597 /* Define how to find the value returned by a library function
598 assuming the value has mode MODE. */
600 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, VALUE_REGNO(MODE))
602 #define FUNCTION_VALUE_REGNO_P(N) ((N) == REG_R0)
604 #define DEFAULT_PCC_STRUCT_RETURN 0
605 #define RETURN_IN_MEMORY(TYPE) bfin_return_in_memory(TYPE)
607 /* Before the prologue, the return address is in the RETS register. */
608 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, REG_RETS)
610 #define RETURN_ADDR_RTX(COUNT, FRAME) bfin_return_addr_rtx (COUNT)
612 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (REG_RETS)
614 /* Call instructions don't modify the stack pointer on the Blackfin. */
615 #define INCOMING_FRAME_SP_OFFSET 0
617 /* Describe how we implement __builtin_eh_return. */
618 #define EH_RETURN_DATA_REGNO(N) ((N) < 2 ? (N) : INVALID_REGNUM)
619 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, REG_P2)
620 #define EH_RETURN_HANDLER_RTX \
621 gen_rtx_MEM (Pmode, plus_constant (frame_pointer_rtx, UNITS_PER_WORD))
623 /* Addressing Modes */
625 /* Recognize any constant value that is a valid address. */
626 #define CONSTANT_ADDRESS_P(X) (CONSTANT_P (X))
628 /* Nonzero if the constant value X is a legitimate general operand.
629 symbol_ref are not legitimate and will be put into constant pool.
630 See force_const_mem().
631 If -mno-pool, all constants are legitimate.
632 */
633 #define LEGITIMATE_CONSTANT_P(x) 1
635 /* A number, the maximum number of registers that can appear in a
636 valid memory address. Note that it is up to you to specify a
637 value equal to the maximum number that `GO_IF_LEGITIMATE_ADDRESS'
638 would ever accept. */
639 #define MAX_REGS_PER_ADDRESS 1
641 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
642 that is a valid memory address for an instruction.
643 The MODE argument is the machine mode for the MEM expression
644 that wants to use this address.
646 Blackfin addressing modes are as follows:
648 [preg]
649 [preg + imm16]
651 B [ Preg + uimm15 ]
652 W [ Preg + uimm16m2 ]
653 [ Preg + uimm17m4 ]
655 [preg++]
656 [preg--]
657 [--sp]
658 */
660 #define LEGITIMATE_MODE_FOR_AUTOINC_P(MODE) \
661 (GET_MODE_SIZE (MODE) <= 4 || (MODE) == PDImode)
663 #ifdef REG_OK_STRICT
664 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN) \
665 do { \
666 if (bfin_legitimate_address_p (MODE, X, 1)) \
667 goto WIN; \
668 } while (0);
669 #else
670 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN) \
671 do { \
672 if (bfin_legitimate_address_p (MODE, X, 0)) \
673 goto WIN; \
674 } while (0);
675 #endif
677 /* Try machine-dependent ways of modifying an illegitimate address
678 to be legitimate. If we find one, return the new, valid address.
679 This macro is used in only one place: `memory_address' in explow.c.
681 OLDX is the address as it was before break_out_memory_refs was called.
682 In some cases it is useful to look at this to decide what needs to be done.
684 MODE and WIN are passed so that this macro can use
685 GO_IF_LEGITIMATE_ADDRESS.
687 It is always safe for this macro to do nothing. It exists to recognize
688 opportunities to optimize the output.
689 */
690 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
691 do { \
692 rtx _q = legitimize_address(X, OLDX, MODE); \
693 if (_q) { X = _q; goto WIN; } \
694 } while (0)
696 #define HAVE_POST_INCREMENT 1
697 #define HAVE_POST_DECREMENT 1
698 #define HAVE_PRE_DECREMENT 1
700 /* `LEGITIMATE_PIC_OPERAND_P (X)'
701 A C expression that is nonzero if X is a legitimate immediate
702 operand on the target machine when generating position independent
703 code. You can assume that X satisfies `CONSTANT_P', so you need
704 not check this. You can also assume FLAG_PIC is true, so you need
705 not check it either. You need not define this macro if all
706 constants (including `SYMBOL_REF') can be immediate operands when
707 generating position independent code. */
708 #define LEGITIMATE_PIC_OPERAND_P(X) ! SYMBOLIC_CONST (X)
710 #define SYMBOLIC_CONST(X) \
711 (GET_CODE (X) == SYMBOL_REF \
712 || GET_CODE (X) == LABEL_REF \
713 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
715 /*
716 A C statement or compound statement with a conditional `goto
717 LABEL;' executed if memory address X (an RTX) can have different
718 meanings depending on the machine mode of the memory reference it
719 is used for or if the address is valid for some modes but not
720 others.
722 Autoincrement and autodecrement addresses typically have
723 mode-dependent effects because the amount of the increment or
724 decrement is the size of the operand being addressed. Some
725 machines have other mode-dependent addresses. Many RISC machines
726 have no mode-dependent addresses.
728 You may assume that ADDR is a valid address for the machine.
729 */
730 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
731 do { \
732 if (GET_CODE (ADDR) == POST_INC \
733 || GET_CODE (ADDR) == POST_DEC \
734 || GET_CODE (ADDR) == PRE_DEC) \
735 goto LABEL; \
736 } while (0)
738 #define NOTICE_UPDATE_CC(EXPR, INSN) 0
740 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
741 is done just by pretending it is already truncated. */
742 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
744 /* Max number of bytes we can move from memory to memory
745 in one reasonably fast instruction. */
746 #define MOVE_MAX UNITS_PER_WORD
749 /* STORAGE LAYOUT: target machine storage layout
750 Define this macro as a C expression which is nonzero if accessing
751 less than a word of memory (i.e. a `char' or a `short') is no
752 faster than accessing a word of memory, i.e., if such access
753 require more than one instruction or if there is no difference in
754 cost between byte and (aligned) word loads.
756 When this macro is not defined, the compiler will access a field by
757 finding the smallest containing object; when it is defined, a
758 fullword load will be used if alignment permits. Unless bytes
759 accesses are faster than word accesses, using word accesses is
760 preferable since it may eliminate subsequent memory access if
761 subsequent accesses occur to other fields in the same word of the
762 structure, but to different bytes. */
763 #define SLOW_BYTE_ACCESS 0
764 #define SLOW_SHORT_ACCESS 0
766 /* Define this if most significant bit is lowest numbered
767 in instructions that operate on numbered bit-fields. */
768 #define BITS_BIG_ENDIAN 0
770 /* Define this if most significant byte of a word is the lowest numbered.
771 We can't access bytes but if we could we would in the Big Endian order. */
772 #define BYTES_BIG_ENDIAN 0
774 /* Define this if most significant word of a multiword number is numbered. */
775 #define WORDS_BIG_ENDIAN 0
777 /* number of bits in an addressable storage unit */
778 #define BITS_PER_UNIT 8
780 /* Width in bits of a "word", which is the contents of a machine register.
781 Note that this is not necessarily the width of data type `int';
782 if using 16-bit ints on a 68000, this would still be 32.
783 But on a machine with 16-bit registers, this would be 16. */
784 #define BITS_PER_WORD 32
786 /* Width of a word, in units (bytes). */
787 #define UNITS_PER_WORD 4
789 /* Width in bits of a pointer.
790 See also the macro `Pmode1' defined below. */
791 #define POINTER_SIZE 32
793 /* Allocation boundary (in *bits*) for storing pointers in memory. */
794 #define POINTER_BOUNDARY 32
796 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
797 #define PARM_BOUNDARY 32
799 /* Boundary (in *bits*) on which stack pointer should be aligned. */
800 #define STACK_BOUNDARY 32
802 /* Allocation boundary (in *bits*) for the code of a function. */
803 #define FUNCTION_BOUNDARY 32
805 /* Alignment of field after `int : 0' in a structure. */
806 #define EMPTY_FIELD_BOUNDARY BITS_PER_WORD
808 /* No data type wants to be aligned rounder than this. */
809 #define BIGGEST_ALIGNMENT 32
811 /* Define this if move instructions will actually fail to work
812 when given unaligned data. */
813 #define STRICT_ALIGNMENT 1
815 /* (shell-command "rm c-decl.o stor-layout.o")
816 * never define PCC_BITFIELD_TYPE_MATTERS
817 * really cause some alignment problem
818 */
820 #define UNITS_PER_FLOAT ((FLOAT_TYPE_SIZE + BITS_PER_UNIT - 1) / \
821 BITS_PER_UNIT)
823 #define UNITS_PER_DOUBLE ((DOUBLE_TYPE_SIZE + BITS_PER_UNIT - 1) / \
824 BITS_PER_UNIT)
827 /* what is the 'type' of size_t */
830 /* Define this as 1 if `char' should by default be signed; else as 0. */
831 #define DEFAULT_SIGNED_CHAR 1
832 #define FLOAT_TYPE_SIZE BITS_PER_WORD
833 #define SHORT_TYPE_SIZE 16
834 #define CHAR_TYPE_SIZE 8
835 #define INT_TYPE_SIZE 32
836 #define LONG_TYPE_SIZE 32
837 #define LONG_LONG_TYPE_SIZE 64
839 /* Note: Fix this to depend on target switch. -- lev */
841 /* Note: Try to implement double and force long double. -- tonyko
842 * #define __DOUBLES_ARE_FLOATS__
843 * #define DOUBLE_TYPE_SIZE FLOAT_TYPE_SIZE
844 * #define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE
845 * #define DOUBLES_ARE_FLOATS 1
846 */
848 #define DOUBLE_TYPE_SIZE 64
849 #define LONG_DOUBLE_TYPE_SIZE 64
851 /* `PROMOTE_MODE (M, UNSIGNEDP, TYPE)'
852 A macro to update M and UNSIGNEDP when an object whose type is
853 TYPE and which has the specified mode and signedness is to be
854 stored in a register. This macro is only called when TYPE is a
855 scalar type.
857 On most RISC machines, which only have operations that operate on
858 a full register, define this macro to set M to `word_mode' if M is
859 an integer mode narrower than `BITS_PER_WORD'. In most cases,
860 only integer modes should be widened because wider-precision
861 floating-point operations are usually more expensive than their
862 narrower counterparts.
864 For most machines, the macro definition does not change UNSIGNEDP.
865 However, some machines, have instructions that preferentially
866 handle either signed or unsigned quantities of certain modes. For
867 example, on the DEC Alpha, 32-bit loads from memory and 32-bit add
868 instructions sign-extend the result to 64 bits. On such machines,
869 set UNSIGNEDP according to which kind of extension is more
870 efficient.
872 Do not define this macro if it would never modify M.*/
874 #define BFIN_PROMOTE_MODE_P(MODE) \
875 (!TARGET_DSP && GET_MODE_CLASS (MODE) == MODE_INT \
876 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD)
878 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
879 if (BFIN_PROMOTE_MODE_P(MODE)) \
880 { \
881 if (MODE == QImode) \
882 UNSIGNEDP = 1; \
883 else if (MODE == HImode) \
884 UNSIGNEDP = 0; \
885 (MODE) = SImode; \
886 }
888 /* Describing Relative Costs of Operations */
890 /* Do not put function addr into constant pool */
891 #define NO_FUNCTION_CSE 1
893 /* A C expression for the cost of moving data from a register in class FROM to
894 one in class TO. The classes are expressed using the enumeration values
895 such as `GENERAL_REGS'. A value of 2 is the default; other values are
896 interpreted relative to that.
898 It is not required that the cost always equal 2 when FROM is the same as TO;
899 on some machines it is expensive to move between registers if they are not
900 general registers. */
902 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
903 bfin_register_move_cost ((MODE), (CLASS1), (CLASS2))
905 /* A C expression for the cost of moving data of mode M between a
906 register and memory. A value of 2 is the default; this cost is
907 relative to those in `REGISTER_MOVE_COST'.
909 If moving between registers and memory is more expensive than
910 between two registers, you should define this macro to express the
911 relative cost. */
913 #define MEMORY_MOVE_COST(MODE, CLASS, IN) \
914 bfin_memory_move_cost ((MODE), (CLASS), (IN))
916 /* Specify the machine mode that this machine uses
917 for the index in the tablejump instruction. */
918 #define CASE_VECTOR_MODE SImode
920 #define JUMP_TABLES_IN_TEXT_SECTION flag_pic
922 /* Define if operations between registers always perform the operation
923 on the full register even if a narrower mode is specified.
924 #define WORD_REGISTER_OPERATIONS
925 */
927 #define CONST_18UBIT_IMM_P(VALUE) ((VALUE) >= 0 && (VALUE) <= 262140)
928 #define CONST_16BIT_IMM_P(VALUE) ((VALUE) >= -32768 && (VALUE) <= 32767)
929 #define CONST_16UBIT_IMM_P(VALUE) ((VALUE) >= 0 && (VALUE) <= 65535)
930 #define CONST_7BIT_IMM_P(VALUE) ((VALUE) >= -64 && (VALUE) <= 63)
931 #define CONST_7NBIT_IMM_P(VALUE) ((VALUE) >= -64 && (VALUE) <= 0)
932 #define CONST_5UBIT_IMM_P(VALUE) ((VALUE) >= 0 && (VALUE) <= 31)
933 #define CONST_4BIT_IMM_P(VALUE) ((VALUE) >= -8 && (VALUE) <= 7)
934 #define CONST_4UBIT_IMM_P(VALUE) ((VALUE) >= 0 && (VALUE) <= 15)
935 #define CONST_3BIT_IMM_P(VALUE) ((VALUE) >= -4 && (VALUE) <= 3)
936 #define CONST_3UBIT_IMM_P(VALUE) ((VALUE) >= 0 && (VALUE) <= 7)
938 #define CONSTRAINT_LEN(C, STR) \
941 : DEFAULT_CONSTRAINT_LEN ((C), (STR)))
943 #define CONST_OK_FOR_P(VALUE, STR) \
949 : 0)
951 #define CONST_OK_FOR_K(VALUE, STR) \
957 : 0) \
963 : 0) \
966 : 0) \
967 : 0)
969 #define CONST_OK_FOR_M(VALUE, STR) \
972 : 0)
974 /* The letters I, J, K, L and M in a register constraint string
975 can be used to stand for particular ranges of immediate operands.
976 This macro defines what the ranges are.
977 C is the letter, and VALUE is a constant value.
978 Return 1 if VALUE is in the range specified by C.
980 bfin constant operands are as follows
982 J 2**N 5bit imm scaled
983 Ks7 -64 .. 63 signed 7bit imm
984 Ku5 0..31 unsigned 5bit imm
985 Ks4 -8 .. 7 signed 4bit imm
986 Ks3 -4 .. 3 signed 3bit imm
987 Ku3 0 .. 7 unsigned 3bit imm
988 Pn 0, 1, 2 constants 0, 1 or 2, corresponding to n
989 */
990 #define CONST_OK_FOR_CONSTRAINT_P(VALUE, C, STR) \
996 : 0)
998 /*Constant Output Formats */
999 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
1002 #define EXTRA_CONSTRAINT(VALUE, D) \
1005 /* Switch into a generic section. */
1006 #define TARGET_ASM_NAMED_SECTION default_elf_asm_named_section
1008 #define PRINT_OPERAND(FILE, RTX, CODE) print_operand (FILE, RTX, CODE)
1009 #define PRINT_OPERAND_ADDRESS(FILE, RTX) print_address_operand (FILE, RTX)
1012 CODE_DIR,
1013 DATA_DIR,
1014 LAST_SECT_NM
1018 LONG_CONST_DIR,
1019 SHORT_CONST_DIR,
1020 BYTE_CONST_DIR,
1021 SPACE_DIR,
1022 INIT_DIR,
1023 LAST_DIR_NM
1032 #define ASM_GLOBALIZE_LABEL1(FILE, NAME) \
1034 assemble_name (FILE, NAME); \
1037 } while (0)
1039 #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
1040 do { \
1042 assemble_name (FILE, NAME); \
1046 ASM_OUTPUT_LABEL(FILE, NAME); \
1047 } while (0)
1049 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1050 do { assemble_name (FILE, NAME); \
1052 } while (0)
1054 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1056 } while (0)
1058 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1059 do { char __buf[256]; \
1062 assemble_name (FILE, __buf); \
1065 } while (0)
1067 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1068 MY_ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL)
1070 #define MY_ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1071 do { \
1072 char __buf[256]; \
1075 assemble_name (FILE, __buf); \
1078 assemble_name (FILE, __buf); \
1081 } while (0)
1083 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1084 do { \
1085 if ((LOG) != 0) \
1087 } while (0)
1089 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1090 do { \
1091 asm_output_skip (FILE, SIZE); \
1092 } while (0)
1094 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1095 do { \
1096 data_section(); \
1097 if ((SIZE) >= (unsigned int) 4 ) ASM_OUTPUT_ALIGN(FILE,2); \
1098 ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, SIZE); \
1099 ASM_OUTPUT_LABEL (FILE, NAME); \
1101 (ROUNDED) > (unsigned int) 1 ? (ROUNDED) : 1); \
1102 } while (0)
1104 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1105 do { \
1106 ASM_GLOBALIZE_LABEL1(FILE,NAME); \
1107 ASM_OUTPUT_LOCAL (FILE, NAME, SIZE, ROUNDED); } while(0)
1111 #define FUNCTION_PROFILER(FILE, LABELNO) \
1112 do { \
1114 } while(0)
1116 #undef NO_PROFILE_COUNTERS
1117 #define NO_PROFILE_COUNTERS 1
1125 /* This works for GAS and some other assemblers. */
1128 /* Don't know how to order these. UNALIGNED_WORD_ASM_OP is in
1129 dwarf2.out. */
1132 /* DBX register number for a given compiler register number */
1133 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)