gnu/dist/gcc4/gcc/config/bfin/lib1funcs.asm

   1 /* libgcc functions for Blackfin.
   2    Copyright (C) 2005 Free Software Foundation, Inc.
   3    Contributed by Analog Devices.
   4
   5 This file is part of GCC.
   6
   7 GCC is free software; you can redistribute it and/or modify
   8 it under the terms of the GNU General Public License as published by
   9 the Free Software Foundation; either version 2, or (at your option)
  10 any later version.
  11
  12 GCC is distributed in the hope that it will be useful,
  13 but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 GNU General Public License for more details.
  16
  17 You should have received a copy of the GNU General Public License
  18 along with GCC; see the file COPYING.  If not, write to
  19 the Free Software Foundation, 51 Franklin Street, Fifth Floor,
  20 Boston, MA 02110-1301, USA.  */
  21
  22 /* As a special exception, if you link this library with files
  23    compiled with GCC to produce an executable, this does not cause
  24    the resulting executable to be covered by the GNU General Public License.
  25    This exception does not however invalidate any other reasons why
  26    the executable file might be covered by the GNU General Public License.  */
  27
  28
  29 #ifdef L_divsi3
  30 .text
  31 .align 2
  32 .global ___divsi3;
  33 .type ___divsi3, STT_FUNC;
  34
  35 ___divsi3:
  36         [--SP]= RETS;
  37         [--SP] = R7;
  38
  39         R2 = -R0;
  40         CC = R0 < 0;
  41         IF CC R0 = R2;
  42         R7 = CC;
  43
  44         R2 = -R1;
  45         CC = R1 < 0;
  46         IF CC R1 = R2;
  47         R2 = CC;
  48         R7 = R7 ^ R2;
  49
  50         CALL ___udivsi3;
  51
  52         CC = R7;
  53         R1 = -R0;
  54         IF CC R0 = R1;
  55
  56         R7 = [SP++];
  57         RETS = [SP++];
  58         RTS;
  59 #endif
  60
  61 #ifdef L_modsi3
  62 .align 2
  63 .global ___modsi3;
  64 .type ___modsi3, STT_FUNC;
  65
  66 ___modsi3:
  67         [--SP] = RETS;
  68         /* P1 and P2 are preserved by divsi3 and udivsi3.  */
  69         P1 = R0;
  70         P2 = R1;
  71         CALL ___divsi3;
  72         R1 = P1;
  73         R2 = P2;
  74         R2 *= R0;
  75         R0 = R1 - R2;
  76         RETS = [SP++];
  77         RTS;
  78 #endif
  79
  80 #ifdef L_udivsi3
  81 .align 2
  82 .global ___udivsi3;
  83 .type ___udivsi3, STT_FUNC;
  84
  85 ___udivsi3:
  86         P0 = 32;
  87         LSETUP (0f, 1f) LC0 = P0;
  88         /* upper half of dividend */
  89         R3 = 0;
  90 0:
  91         /* The first time round in the loop we shift in garbage, but since we
  92            perform 33 shifts, it doesn't matter.  */
  93         R0 = ROT R0 BY 1;
  94         R3 = ROT R3 BY 1;
  95         R2 = R3 - R1;
  96         CC = R3 < R1 (IU);
  97 1:
  98         /* Last instruction of the loop.  */
  99         IF ! CC R3 = R2;
 100
 101         /* Shift in the last bit.  */
 102         R0 = ROT R0 BY 1;
 103         /* R0 is the result, R3 contains the remainder.  */
 104         R0 = ~ R0;
 105         RTS;
 106 #endif
 107
 108 #ifdef L_umodsi3
 109 .align 2
 110 .global ___umodsi3;
 111 .type ___umodsi3, STT_FUNC;
 112
 113 ___umodsi3:
 114         [--SP] = RETS;
 115         CALL ___udivsi3;
 116         R0 = R3;
 117         RETS = [SP++];
 118         RTS;
 119 #endif
 120