1 2006-05-14 Thiemo Seufer <ths@mips.com>
3 * mips16-opc.c (I1, I32, I64): New shortcut defines.
4 (mips16_opcodes): Change membership of instructions to their
7 2006-05-09 H.J. Lu <hongjiu.lu@intel.com>
9 * i386-dis.c (grps): Update sgdt/sidt for 64bit.
11 2006-05-05 Julian Brown <julian@codesourcery.com>
13 * arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx as
16 2006-05-05 Thiemo Seufer <ths@mips.com>
17 David Ung <davidu@mips.com>
19 * mips-opc.c: Add macro for cache instruction.
21 2006-05-04 Thiemo Seufer <ths@mips.com>
22 Nigel Stephens <nigel@mips.com>
23 David Ung <davidu@mips.com>
25 * mips-dis.c (mips_arch_choices): Add smartmips instruction
26 decoding to MIPS32 and MIPS32R2. Limit DSP decoding to release
27 2 ISAs. Add MIPS3D decoding to MIPS32R2. Add MT decoding to
29 * mips-opc.c: fix random typos in comments.
30 (INSN_SMARTMIPS): New defines.
31 (mips_builtin_opcodes): Add paired single support for MIPS32R2.
32 Move bc3f, bc3fl, bc3t, bc3tl downwards. Move flushi, flushd,
33 flushid, wb upwards. Move cfc3, ctc3 downwards. Rework the
34 FP_S and FP_D flags to denote single and double register
35 accesses separately. Move dmfc3, dmtc3, mfc3, mtc3 downwards.
36 Allow jr.hb and jalr.hb for release 1 ISAs. Allow luxc1, suxc1
37 for MIPS32R2. Add SmartMIPS instructions. Add two-argument
38 variants of bc2f, bc2fl, bc2t, bc2tl. Add mfhc2, mthc2 to
40 * mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
42 2006-05-03 Thiemo Seufer <ths@mips.com>
44 * mips-opc.c (mips_builtin_opcodes): Fix mftr argument order.
46 2006-05-02 Thiemo Seufer <ths@mips.com>
47 Nigel Stephens <nigel@mips.com>
48 David Ung <davidu@mips.com>
50 * mips-dis.c (print_insn_args): Force mips16 to odd addresses.
51 (print_mips16_insn_arg): Force mips16 to odd addresses.
53 2006-04-30 Thiemo Seufer <ths@mips.com>
54 David Ung <davidu@mips.com>
56 * mips-opc.c (mips_builtin_opcodes): Add udi instructions
58 * mips-dis.c (print_insn_args): Adds udi argument handling.
60 2006-04-28 James E Wilson <wilson@specifix.com>
62 * m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
65 2006-04-28 Thiemo Seufer <ths@mips.com>
66 David Ung <davidu@mips.com>
67 Nigel Stephens <nigel@mips.com>
69 * mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
72 2006-04-28 Thiemo Seufer <ths@mips.com>
73 Nigel Stephens <nigel@mips.com>
74 David Ung <davidu@mips.com>
76 * mips-dis.c (print_insn_args): Add mips_opcode argument.
77 (print_insn_mips): Adjust print_insn_args call.
79 2006-04-28 Thiemo Seufer <ths@mips.com>
80 Nigel Stephens <nigel@mips.com>
82 * mips-dis.c (print_insn_args): Print $fcc only for FP
83 instructions, use $cc elsewise.
85 2006-04-28 Thiemo Seufer <ths@mips.com>
86 Nigel Stephens <nigel@mips.com>
88 * opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
89 Map MIPS16 registers to O32 names.
90 (print_mips16_insn_arg): Use mips16_reg_names.
92 2006-04-26 Julian Brown <julian@codesourcery.com>
94 * arm-dis.c (print_insn_neon): Disassemble floating-point constant
97 2006-04-26 Nathan Sidwell <nathan@codesourcery.com>
98 Julian Brown <julian@codesourcery.com>
100 * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
101 %<code>[zy] into %[zy]<code>. Expand meaning of %<bitfield>['`?].
102 Add unified load/store instruction names.
103 (neon_opcode_table): New.
104 (arm_opcodes): Expand meaning of %<bitfield>['`?].
105 (arm_decode_bitfield): New.
106 (print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
107 Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
108 (print_insn_neon): New.
109 (print_insn_arm): Adjust print_insn_coprocessor call. Call
110 print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
111 (print_insn_thumb32): Likewise.
113 2006-04-19 Alan Modra <amodra@bigpond.net.au>
115 * Makefile.am: Run "make dep-am".
116 * Makefile.in: Regenerate.
118 2006-04-19 Alan Modra <amodra@bigpond.net.au>
120 * avr-dis.c (avr_operand): Warning fix.
122 * configure: Regenerate.
124 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
126 * po/POTFILES.in: Regenerated.
128 2006-04-12 Hochstein <hochstein@algo.informatik.tu-darmstadt.de>
131 * avr-dis.c (avr_operand): Arrange for a comment to appear before
132 the symolic form of an address, so that the output of objdump -d
135 2006-04-10 DJ Delorie <dj@redhat.com>
137 * m32c-asm.c: Regenerate.
139 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
141 * Makefile.am: Add install-html target.
142 * Makefile.in: Regenerate.
144 2006-04-06 Nick Clifton <nickc@redhat.com>
146 * po/vi/po: Updated Vietnamese translation.
148 2006-03-31 Paul Koning <ni1d@arrl.net>
150 * pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
152 2006-03-16 Bernd Schmidt <bernd.schmidt@analog.com>
154 * bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
155 logic to identify halfword shifts.
157 2006-03-16 Paul Brook <paul@codesourcery.com>
159 * arm-dis.c (arm_opcodes): Rename swi to svc.
160 (thumb_opcodes): Ditto.
162 2006-03-13 DJ Delorie <dj@redhat.com>
164 * m32c-asm.c: Regenerate.
165 * m32c-desc.c: Likewise.
166 * m32c-desc.h: Likewise.
167 * m32c-dis.c: Likewise.
168 * m32c-ibld.c: Likewise.
169 * m32c-opc.c: Likewise.
170 * m32c-opc.h: Likewise.
172 2006-03-10 DJ Delorie <dj@redhat.com>
174 * m32c-desc.c: Regenerate with mul.l, mulu.l.
175 * m32c-opc.c: Likewise.
176 * m32c-opc.h: Likewise.
179 2006-03-09 Nick Clifton <nickc@redhat.com>
181 * po/sv.po: Updated Swedish translation.
183 2006-03-07 H.J. Lu <hongjiu.lu@intel.com>
186 * i386-dis.c (REP_Fixup): New function.
187 (AL): Remove duplicate.
192 (indirDXr): Likewise.
195 (dis386): Updated entries of ins, outs, movs, lods and stos.
197 2006-03-05 Nick Clifton <nickc@redhat.com>
199 * cgen-ibld.in (insert_normal): Cope with attempts to insert a
200 signed 32-bit value into an unsigned 32-bit field when the host is
202 * fr30-ibld.c: Regenerate.
203 * frv-ibld.c: Regenerate.
204 * ip2k-ibld.c: Regenerate.
205 * iq2000-asm.c: Regenerate.
206 * iq2000-ibld.c: Regenerate.
207 * m32c-ibld.c: Regenerate.
208 * m32r-ibld.c: Regenerate.
209 * openrisc-ibld.c: Regenerate.
210 * xc16x-ibld.c: Regenerate.
211 * xstormy16-ibld.c: Regenerate.
213 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
215 * xc16x-asm.c: Regenerate.
216 * xc16x-dis.c: Regenerate.
218 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
220 * po/Make-in: Add html target.
222 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
224 * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
225 Intel Merom New Instructions.
226 (THREE_BYTE_0): Likewise.
227 (THREE_BYTE_1): Likewise.
228 (three_byte_table): Likewise.
229 (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
230 THREE_BYTE_1 for entry 0x3a.
231 (twobyte_has_modrm): Updated.
232 (twobyte_uses_SSE_prefix): Likewise.
233 (print_insn): Handle 3-byte opcodes used by Intel Merom New
236 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
238 * sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
239 (v9_hpriv_reg_names): New table.
240 (print_insn_sparc): Allow values up to 16 for '?' and '!'.
241 New cases '$' and '%' for read/write hyperprivileged register.
242 * sparc-opc.c (sparc_opcodes): Add new entries for UA2005
243 window handling and rdhpr/wrhpr instructions.
245 2006-02-24 DJ Delorie <dj@redhat.com>
247 * m32c-desc.c: Regenerate with linker relaxation attributes.
248 * m32c-desc.h: Likewise.
249 * m32c-dis.c: Likewise.
250 * m32c-opc.c: Likewise.
252 2006-02-24 Paul Brook <paul@codesourcery.com>
254 * arm-dis.c (arm_opcodes): Add V7 instructions.
255 (thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants.
256 (print_arm_address): New function.
257 (print_insn_arm): Use it. Add 'P' and 'U' cases.
258 (psr_name): New function.
259 (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
261 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
263 * ia64-opc-i.c (bXc): New.
265 (OpX2TaTbYaXcC): Likewise.
268 (ia64_opcodes_i): Add instructions for tf.
270 * ia64-opc.h (IMMU5b): New.
272 * ia64-asmtab.c: Regenerated.
274 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
276 * ia64-gen.c: Update copyright years.
277 * ia64-opc-b.c: Likewise.
279 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
281 * ia64-gen.c (lookup_regindex): Handle ".vm".
282 (print_dependency_table): Handle '\"'.
284 * ia64-ic.tbl: Updated from SDM 2.2.
285 * ia64-raw.tbl: Likewise.
286 * ia64-waw.tbl: Likewise.
287 * ia64-asmtab.c: Regenerated.
289 * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
291 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
292 Anil Paranjape <anilp1@kpitcummins.com>
293 Shilin Shakti <shilins@kpitcummins.com>
295 * xc16x-desc.h: New file
296 * xc16x-desc.c: New file
297 * xc16x-opc.h: New file
298 * xc16x-opc.c: New file
299 * xc16x-ibld.c: New file
300 * xc16x-asm.c: New file
301 * xc16x-dis.c: New file
302 * Makefile.am: Entries for xc16x
303 * Makefile.in: Regenerate
304 * cofigure.in: Add xc16x target information.
305 * configure: Regenerate.
306 * disassemble.c: Add xc16x target information.
308 2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
310 * i386-dis.c (dis386_twobyte): Use "movZ" for debug register
313 2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
315 * i386-dis.c ('Z'): Add a new macro.
316 (dis386_twobyte): Use "movZ" for control register moves.
318 2006-02-10 Nick Clifton <nickc@redhat.com>
320 * iq2000-asm.c: Regenerate.
322 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
324 * m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
326 2006-01-26 David Ung <davidu@mips.com>
328 * mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
329 ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
330 floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
331 nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
332 rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
334 2006-01-18 Arnold Metselaar <arnoldm@sourceware.org>
336 * z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
337 ld_d_r, pref_xd_cb): Use signed char to hold data to be
339 * z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
340 buffer overflows when disassembling instructions like
342 * z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
343 operand, if the offset is negative.
345 2006-01-17 Arnold Metselaar <arnoldm@sourceware.org>
347 * z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
348 unsigned char to hold data to be disassembled.
350 2006-01-17 Andreas Schwab <schwab@suse.de>
353 * disassemble.c (disassemble_init_for_target): Set
354 disassembler_needs_relocs for bfd_arch_arm.
356 2006-01-16 Paul Brook <paul@codesourcery.com>
358 * m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
359 f?add?, and f?sub? instructions.
361 2006-01-16 Nick Clifton <nickc@redhat.com>
363 * po/zh_CN.po: New Chinese (simplified) translation.
364 * configure.in (ALL_LINGUAS): Add "zh_CH".
365 * configure: Regenerate.
367 2006-01-05 Paul Brook <paul@codesourcery.com>
369 * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
371 2006-01-06 DJ Delorie <dj@redhat.com>
373 * m32c-desc.c: Regenerate.
374 * m32c-opc.c: Regenerate.
375 * m32c-opc.h: Regenerate.
377 2006-01-03 DJ Delorie <dj@redhat.com>
379 * cgen-ibld.in (extract_normal): Avoid memory range errors.
380 * m32c-ibld.c: Regenerated.
382 For older changes see ChangeLog-2005
388 version-control: never