sys/arch/acorn26/iobus/iocvar.h

   1 /* $NetBSD: iocvar.h,v 1.5 2009/01/06 23:48:30 bjh21 Exp $ */
   2 /*-
   3  * Copyright (c) 1998, 1999 Ben Harris
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  * 3. The name of the author may not be used to endorse or promote products
  15  *    derived from this software without specific prior written permission.
  16  *
  17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  */
  28 /*
  29  * iocvar.h - aspects of the IOC driver that are visible to the world.
  30  */
  31
  32 #ifndef _ARM26_IOCVAR_H
  33 #define _ARM26_IOCVAR_H
  34
  35 #include <sys/timetc.h>
  36 #include <machine/irq.h>
  37
  38 /* Structure passed to children of an IOC */
  39
  40 struct ioc_attach_args {
  41         /* Means of accessing the device at various speeds */
  42         bus_space_tag_t         ioc_fast_t;
  43         bus_space_handle_t      ioc_fast_h;
  44         bus_space_tag_t         ioc_medium_t;
  45         bus_space_handle_t      ioc_medium_h;
  46         bus_space_tag_t         ioc_slow_t;
  47         bus_space_handle_t      ioc_slow_h;
  48         bus_space_tag_t         ioc_sync_t;
  49         bus_space_handle_t      ioc_sync_h;
  50         int                     ioc_bank; /* only for ioc_print */
  51         int                     ioc_offset;
  52 };
  53
  54 struct ioc_softc {
  55         device_t                sc_dev;
  56         bus_space_tag_t         sc_bst;
  57         bus_space_handle_t      sc_bsh;
  58         struct irq_handler      *sc_clkirq;
  59         struct evcnt            sc_clkev;
  60         struct irq_handler      *sc_sclkirq;
  61         struct evcnt            sc_sclkev;
  62         struct timecounter      sc_tc;
  63         u_int                   sc_tcbase;
  64         u_int8_t                sc_ctl;
  65 };
  66
  67 extern device_t the_ioc;
  68
  69 /* Public IOC functions */
  70
  71 extern int ioc_irq_status(int);
  72 extern void ioc_irq_waitfor(int);
  73 extern void ioc_irq_clear(int);
  74 extern u_int32_t ioc_irq_status_full(void);
  75 extern void ioc_irq_setmask(u_int32_t);
  76
  77 extern void ioc_fiq_setmask(u_int32_t);
  78
  79 extern void ioc_counter_start(device_t, int, int);
  80
  81 /*
  82  * Control Register
  83  */
  84
  85 /*
  86  * ioc_ctl_{read,write}
  87  *
  88  * Functions to manipulate the IOC control register.  The bottom six
  89  * bits of the control register map to bidirectional pins on the chip.
  90  * The output circuits are open-drain, so a pin is made an input by
  91  * writing '1' to it.
  92  */
  93
  94 static inline u_int
  95 ioc_ctl_read(device_t self)
  96 {
  97         struct ioc_softc *sc = device_private(self);
  98
  99         return bus_space_read_1(sc->sc_bst, sc->sc_bsh, IOC_CTL);
 100 }
 101
 102 static inline void
 103 ioc_ctl_write(device_t self, u_int value, u_int mask)
 104 {
 105         struct ioc_softc *sc = device_private(self);
 106         int s;
 107         bus_space_tag_t bst = sc->sc_bst;
 108         bus_space_handle_t bsh = sc->sc_bsh;
 109
 110         s = splhigh();
 111         sc->sc_ctl = (sc->sc_ctl & ~mask) | (value & mask);
 112         bus_space_write_1(bst, bsh, IOC_CTL, sc->sc_ctl);
 113         splx(s);
 114 }
 115
 116 #endif