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[netbsd-mini2440.git] / sys / arch / acorn32 / eb7500atx / if_cs.c
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1 /* $NetBSD: if_cs.c,v 1.5 2009/05/12 06:57:51 cegger Exp $ */
3 /*
4 * Copyright (c) 2004 Christopher Gilbert
5 * All rights reserved.
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * 3. The name of the author may be used to endorse or promote products
13 * derived from this software without specific prior written permission.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
16 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
19 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
20 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
21 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
28 * Copyright 1997
29 * Digital Equipment Corporation. All rights reserved.
31 * This software is furnished under license and may be used and
32 * copied only in accordance with the following terms and conditions.
33 * Subject to these conditions, you may download, copy, install,
34 * use, modify and distribute this software in source and/or binary
35 * form. No title or ownership is transferred hereby.
37 * 1) Any source code used, modified or distributed must reproduce
38 * and retain this copyright notice and list of conditions as
39 * they appear in the source file.
41 * 2) No right is granted to use any trade name, trademark, or logo of
42 * Digital Equipment Corporation. Neither the "Digital Equipment
43 * Corporation" name nor any trademark or logo of Digital Equipment
44 * Corporation may be used to endorse or promote products derived
45 * from this software without the prior written permission of
46 * Digital Equipment Corporation.
48 * 3) This software is provided "AS-IS" and any express or implied
49 * warranties, including but not limited to, any implied warranties
50 * of merchantability, fitness for a particular purpose, or
51 * non-infringement are disclaimed. In no event shall DIGITAL be
52 * liable for any damages whatsoever, and in particular, DIGITAL
53 * shall not be liable for special, indirect, consequential, or
54 * incidental damages or damages for lost profits, loss of
55 * revenue or loss of use, whether such damages arise in contract,
56 * negligence, tort, under statute, in equity, at law or otherwise,
57 * even if advised of the possibility of such damage.
60 #include <sys/cdefs.h>
61 __KERNEL_RCSID(0, "$NetBSD: if_cs.c,v 1.5 2009/05/12 06:57:51 cegger Exp $");
63 #include <sys/param.h>
64 #include <sys/systm.h>
65 #include <sys/socket.h>
66 #include <sys/device.h>
68 #include "rnd.h"
69 #if NRND > 0
70 #include <sys/rnd.h>
71 #endif
73 #include <net/if.h>
74 #include <net/if_ether.h>
75 #include <net/if_media.h>
77 #include <machine/bus.h>
78 #include <machine/intr.h>
80 #include <acorn32/eb7500atx/rsbus.h>
82 #include <dev/ic/cs89x0reg.h>
83 #include <dev/ic/cs89x0var.h>
86 * the CS network interface is accessed at the following address locations:
87 * 030104f1 CS8920 PNP Low
88 * 03010600 03010640 CS8920 Default I/O registers
89 * 030114f1 CS8920 PNP High
90 * 03014000 03016000 CS8920 Default Memory
92 * IRQ is mapped as:
93 * CS8920 IRQ 3 INT5
95 * It must be configured as the following:
96 * The CS8920 PNP address should be configured for ISA base at 0x300
97 * to achieve the default register mapping as specified.
98 * Note memory addresses are all have bit 23 tied high in hardware.
99 * This only effects the value programmed into the CS8920 memory offset
100 * registers.
102 * Just to add to the fun the I/O registers are layed out as:
103 * xxxxR1R0
104 * xxxxR3R2
105 * xxxxR5R4
107 * This works fine for 16bit accesses, but it makes access to single
108 * register hard (which does happen on a reset, as we've got to toggle
109 * the chip into 16bit mode)
111 * Network DRQ is connected to DRQ5
115 * make a private tag so that we can use rsbus's map/unmap
117 static struct bus_space cs_rsbus_bs_tag;
119 int cs_rsbus_probe(device_t, cfdata_t, void *);
120 void cs_rsbus_attach(device_t, device_t, void *);
122 static u_int8_t cs_rbus_read_1(struct cs_softc *, bus_size_t);
124 CFATTACH_DECL_NEW(cs_rsbus, sizeof(struct cs_softc),
125 cs_rsbus_probe, cs_rsbus_attach, NULL, NULL);
127 /* Available media */
128 int cs_rbus_media [] = {
129 IFM_ETHER|IFM_10_T|IFM_FDX,
130 IFM_ETHER|IFM_10_T
133 int
134 cs_rsbus_probe(device_t parent, cfdata_t cf, void *aux)
136 /* for now it'll always attach */
137 return 1;
140 void
141 cs_rsbus_attach(device_t parent, device_t self, void *aux)
143 struct cs_softc *sc = device_private(self);
144 struct rsbus_attach_args *rs = aux;
145 u_int iobase;
147 sc->sc_dev = self;
149 /* member copy */
150 cs_rsbus_bs_tag = *rs->sa_iot;
152 /* registers are normally accessed in pairs, on a 4 byte aligned */
153 cs_rsbus_bs_tag.bs_cookie = (void *) 1;
155 sc->sc_iot = sc->sc_memt = &cs_rsbus_bs_tag;
157 #if 0 /* Do DMA later */
158 if (ia->ia_ndrq > 0)
159 isc->sc_drq = ia->ia_drq[0].ir_drq;
160 else
161 isc->sc_drq = -1;
162 #endif
164 /* device always interrupts on 3 but that routes to IRQ 5 */
165 sc->sc_irq = 3;
167 printf("\n");
170 * Map the device.
172 iobase = 0x03010600;
173 if (bus_space_map(sc->sc_iot, iobase, CS8900_IOSIZE * 4,
174 0, &sc->sc_ioh)) {
175 printf("%s: unable to map i/o space\n", device_xname(self));
176 return;
179 #if 0
180 if (bus_space_map(sc->sc_memt, iobase + 0x3A00,
181 CS8900_MEMSIZE * 4, 0, &sc->sc_memh)) {
182 printf("%s: unable to map memory space\n", device_xname(self));
183 } else {
184 sc->sc_cfgflags |= CFGFLG_MEM_MODE | CFGFLG_USE_SA;
185 sc->sc_pktpgaddr = 1<<23;
186 //(0x4000 >> 1) | (1<<23);
188 #endif
189 sc->sc_ih = intr_claim(IRQ_INT5, IPL_NET, "cs", cs_intr, sc);
190 if (sc->sc_ih == NULL) {
191 printf("%s: unable to establish interrupt\n",
192 device_xname(sc->sc_dev));
193 return;
196 /* DMA is for later */
197 sc->sc_dma_chipinit = NULL;
198 sc->sc_dma_attach = NULL;
199 sc->sc_dma_process_rx = NULL;
201 sc->sc_cfgflags |= CFGFLG_PARSE_EEPROM;
202 sc->sc_io_read_1 = cs_rbus_read_1;
205 * also provide media, otherwise it attempts to read the media from
206 * the EEPROM, which again fails
208 cs_attach(sc, NULL, cs_rbus_media, sizeof(cs_rbus_media) / sizeof(cs_rbus_media[0]),
209 IFM_ETHER|IFM_10_T|IFM_FDX);
213 * Provide a function to correctly do reading from oddly numbered registers
214 * as you can't simply shift the register number
216 static u_int8_t
217 cs_rbus_read_1(struct cs_softc *sc, bus_size_t a)
219 bus_size_t offset;
221 * if it's an even address then just use the bus_space_read_1
223 if ((a & 1) == 0)
225 return bus_space_read_1(sc->sc_iot, sc->sc_ioh, a);
228 * otherwise we've get to work out the aligned address and then add
229 * one
231 offset = (a & ~1) << 1;
232 offset++;
234 /* and read it, with no shift (cookie is 0) */
235 return sc->sc_iot->bs_r_1(0, (sc)->sc_ioh, offset);