sys/arch/alpha/include/intr.h

   1 /* $NetBSD: intr.h,v 1.66 2008/04/28 20:23:11 martin Exp $ */
   2
   3 /*-
   4  * Copyright (c) 2000, 2001, 2002 The NetBSD Foundation, Inc.
   5  * All rights reserved.
   6  *
   7  * This code is derived from software contributed to The NetBSD Foundation
   8  * by Jason R. Thorpe.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions
  12  * are met:
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  29  * POSSIBILITY OF SUCH DAMAGE.
  30  */
  31
  32 /*
  33  * Copyright (c) 1997 Christopher G. Demetriou.  All rights reserved.
  34  * Copyright (c) 1996 Carnegie-Mellon University.
  35  * All rights reserved.
  36  *
  37  * Author: Chris G. Demetriou
  38  *
  39  * Permission to use, copy, modify and distribute this software and
  40  * its documentation is hereby granted, provided that both the copyright
  41  * notice and this permission notice appear in all copies of the
  42  * software, derivative works or modified versions, and any portions
  43  * thereof, and that both notices appear in supporting documentation.
  44  *
  45  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
  46  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
  47  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
  48  *
  49  * Carnegie Mellon requests users of this software to return to
  50  *
  51  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
  52  *  School of Computer Science
  53  *  Carnegie Mellon University
  54  *  Pittsburgh PA 15213-3890
  55  *
  56  * any improvements or extensions that they make and grant Carnegie the
  57  * rights to redistribute these changes.
  58  */
  59
  60 #ifndef _ALPHA_INTR_H_
  61 #define _ALPHA_INTR_H_
  62
  63 #include <sys/evcnt.h>
  64 #include <machine/cpu.h>
  65
  66 /*
  67  * The Alpha System Control Block.  This is 8k long, and you get
  68  * 16 bytes per vector (i.e. the vector numbers are spaced 16
  69  * apart).
  70  *
  71  * This is sort of a "shadow" SCB -- rather than the CPU jumping
  72  * to (SCBaddr + (16 * vector)), like it does on the VAX, we get
  73  * a vector number in a1.  We use the SCB to look up a routine/arg
  74  * and jump to it.
  75  *
  76  * Since we use the SCB only for I/O interrupts, we make it shorter
  77  * than normal, starting it at vector 0x800 (the start of the I/O
  78  * interrupt vectors).
  79  */
  80 #define SCB_IOVECBASE   0x0800
  81 #define SCB_VECSIZE     0x0010
  82 #define SCB_SIZE        0x2000
  83
  84 #define SCB_VECTOIDX(x) ((x) >> 4)
  85 #define SCB_IDXTOVEC(x) ((x) << 4)
  86
  87 #define SCB_NIOVECS     SCB_VECTOIDX(SCB_SIZE - SCB_IOVECBASE)
  88
  89 struct scbvec {
  90         void    (*scb_func)(void *, u_long);
  91         void    *scb_arg;
  92 };
  93
  94 /*
  95  * Alpha interrupts come in at one of 4 levels:
  96  *
  97  *      software interrupt level
  98  *      i/o level 1
  99  *      i/o level 2
 100  *      clock level
 101  *
 102  * However, since we do not have any way to know which hardware
 103  * level a particular i/o interrupt comes in on, we have to
 104  * whittle it down to 3.
 105  */
 106
 107 #define IPL_NONE        0       /* no interrupt level */
 108 #define IPL_SOFTCLOCK   1       /* generic software interrupts */
 109 #define IPL_SOFTBIO     1       /* generic software interrupts */
 110 #define IPL_SOFTNET     1       /* generic software interrupts */
 111 #define IPL_SOFTSERIAL  1       /* generic software interrupts */
 112 #define IPL_VM          2       /* interrupts that can alloc mem */
 113 #define IPL_SCHED       3       /* clock interrupts */
 114 #define IPL_HIGH        4       /* all interrupts */
 115
 116 typedef int ipl_t;
 117 typedef struct {
 118         uint8_t _psl;
 119 } ipl_cookie_t;
 120
 121 ipl_cookie_t makeiplcookie(ipl_t);
 122
 123 #define IST_UNUSABLE    -1      /* interrupt cannot be used */
 124 #define IST_NONE        0       /* none (dummy) */
 125 #define IST_PULSE       1       /* pulsed */
 126 #define IST_EDGE        2       /* edge-triggered */
 127 #define IST_LEVEL       3       /* level-triggered */
 128
 129 #ifdef  _KERNEL
 130
 131 /* Simulated software interrupt register. */
 132 extern volatile unsigned long ssir;
 133
 134 /* IPL-lowering/restoring macros */
 135 void    spl0(void);
 136
 137 static __inline void
 138 splx(int s)
 139 {
 140         if (s == ALPHA_PSL_IPL_0 && ssir != 0)
 141                 spl0();
 142         else
 143                 alpha_pal_swpipl(s);
 144 }
 145 /* IPL-raising functions/macros */
 146 static __inline int
 147 _splraise(int s)
 148 {
 149         int cur = alpha_pal_rdps() & ALPHA_PSL_IPL_MASK;
 150         return (s > cur ? alpha_pal_swpipl(s) : cur);
 151 }
 152
 153 #define splraiseipl(icookie)    _splraise((icookie)._psl)
 154
 155 #include <sys/spl.h>
 156
 157 /*
 158  * Interprocessor interrupts.  In order how we want them processed.
 159  */
 160 #define ALPHA_IPI_HALT                  (1UL << 0)
 161 #define ALPHA_IPI_MICROSET              (1UL << 1)
 162 #define ALPHA_IPI_SHOOTDOWN             (1UL << 2)
 163 #define ALPHA_IPI_IMB                   (1UL << 3)
 164 #define ALPHA_IPI_AST                   (1UL << 4)
 165 #define ALPHA_IPI_SYNCH_FPU             (1UL << 5)
 166 #define ALPHA_IPI_DISCARD_FPU           (1UL << 6)
 167 #define ALPHA_IPI_PAUSE                 (1UL << 7)
 168
 169 #define ALPHA_NIPIS             8       /* must not exceed 64 */
 170
 171 struct cpu_info;
 172 struct trapframe;
 173
 174 void    alpha_ipi_init(struct cpu_info *);
 175 void    alpha_ipi_process(struct cpu_info *, struct trapframe *);
 176 void    alpha_send_ipi(unsigned long, unsigned long);
 177 void    alpha_broadcast_ipi(unsigned long);
 178 void    alpha_multicast_ipi(unsigned long, unsigned long);
 179
 180 /*
 181  * Alpha shared-interrupt-line common code.
 182  */
 183
 184 struct alpha_shared_intrhand {
 185         TAILQ_ENTRY(alpha_shared_intrhand)
 186                 ih_q;
 187         struct alpha_shared_intr *ih_intrhead;
 188         int     (*ih_fn)(void *);
 189         void    *ih_arg;
 190         int     ih_level;
 191         unsigned int ih_num;
 192 };
 193
 194 struct alpha_shared_intr {
 195         TAILQ_HEAD(,alpha_shared_intrhand)
 196                 intr_q;
 197         struct evcnt intr_evcnt;
 198         char    *intr_string;
 199         void    *intr_private;
 200         int     intr_sharetype;
 201         int     intr_dfltsharetype;
 202         int     intr_nstrays;
 203         int     intr_maxstrays;
 204 };
 205
 206 #define ALPHA_SHARED_INTR_DISABLE(asi, num)                             \
 207         ((asi)[num].intr_maxstrays != 0 &&                              \
 208          (asi)[num].intr_nstrays == (asi)[num].intr_maxstrays)
 209
 210 void    softintr_dispatch(void);
 211
 212 struct alpha_shared_intr *alpha_shared_intr_alloc(unsigned int, unsigned int);
 213 int     alpha_shared_intr_dispatch(struct alpha_shared_intr *,
 214             unsigned int);
 215 void    *alpha_shared_intr_establish(struct alpha_shared_intr *,
 216             unsigned int, int, int, int (*)(void *), void *, const char *);
 217 void    alpha_shared_intr_disestablish(struct alpha_shared_intr *,
 218             void *, const char *);
 219 int     alpha_shared_intr_get_sharetype(struct alpha_shared_intr *,
 220             unsigned int);
 221 int     alpha_shared_intr_isactive(struct alpha_shared_intr *,
 222             unsigned int);
 223 int     alpha_shared_intr_firstactive(struct alpha_shared_intr *,
 224             unsigned int);
 225 void    alpha_shared_intr_set_dfltsharetype(struct alpha_shared_intr *,
 226             unsigned int, int);
 227 void    alpha_shared_intr_set_maxstrays(struct alpha_shared_intr *,
 228             unsigned int, int);
 229 void    alpha_shared_intr_reset_strays(struct alpha_shared_intr *,
 230             unsigned int);
 231 void    alpha_shared_intr_stray(struct alpha_shared_intr *, unsigned int,
 232             const char *);
 233 void    alpha_shared_intr_set_private(struct alpha_shared_intr *,
 234             unsigned int, void *);
 235 void    *alpha_shared_intr_get_private(struct alpha_shared_intr *,
 236             unsigned int);
 237 char    *alpha_shared_intr_string(struct alpha_shared_intr *,
 238             unsigned int);
 239 struct evcnt *alpha_shared_intr_evcnt(struct alpha_shared_intr *,
 240             unsigned int);
 241
 242 extern struct scbvec scb_iovectab[];
 243
 244 void    scb_init(void);
 245 void    scb_set(u_long, void (*)(void *, u_long), void *, int);
 246 u_long  scb_alloc(void (*)(void *, u_long), void *);
 247 void    scb_free(u_long);
 248
 249 #define SCB_ALLOC_FAILED        ((u_long) -1)
 250
 251 #endif /* _KERNEL */
 252 #endif /* ! _ALPHA_INTR_H_ */