sys/arch/alpha/mcbus/mcbusreg.h

   1 /* $NetBSD: mcbusreg.h,v 1.2 1998/04/15 20:40:34 mjacob Exp $ */
   2
   3 /*
   4  * Copyright (c) 1998 by Matthew Jacob
   5  * NASA AMES Research Center.
   6  * All rights reserved.
   7  *
   8  * Redistribution and use in source and binary forms, with or without
   9  * modification, are permitted provided that the following conditions
  10  * are met:
  11  * 1. Redistributions of source code must retain the above copyright
  12  *    notice immediately at the beginning of the file, without modification,
  13  *    this list of conditions, and the following disclaimer.
  14  * 2. Redistributions in binary form must reproduce the above copyright
  15  *    notice, this list of conditions and the following disclaimer in the
  16  *    documentation and/or other materials provided with the distribution.
  17  * 3. The name of the author may not be used to endorse or promote products
  18  *    derived from this software without specific prior written permission.
  19  *
  20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  21  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  23  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
  24  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  25  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  26  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  27  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  28  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  29  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  30  * SUCH DAMAGE.
  31  */
  32
  33 /*
  34  * 'Register' definitions for the MCBUS main
  35  * system bus found on AlphaServer 4100 systems.
  36  */
  37
  38 /*
  39  * Information gathered from:"
  40  *
  41  * "Rawhide System Programmer's Manual, revision 1.4".
  42  */
  43
  44 /*
  45  * There are 7 possible MC bus modules (architecture says 10, but
  46  * the address map details say otherwise), 1 though 7.
  47  * Their uses are defined as follows:
  48  *
  49  *      MID     Module
  50  *      ----    ------
  51  *      1       Memory
  52  *      2       CPU
  53  *      3       CPU
  54  *      4       CPU, PCI
  55  *      5       CPU, PCI
  56  *      6       CPU, PCI
  57  *      7       CPU, PCI
  58  *
  59  */
  60 #define MCBUS_MID_MAX           7
  61
  62 /*
  63  * For this architecture, bit 39 of a 40 bit address controls whether
  64  * you access I/O or Memory space. Further, there *could* be multiple
  65  * MC busses (but only one specified for now).
  66  */
  67
  68 #define MCBUS_IOSPACE           0x0000008000000000L
  69 #define MCBUS_GID_MASK          0x0000007000000000L
  70 #define MCBUS_GID_SHIFT         36
  71 #define MCBUS_MID_MASK          0x0000000E00000000L
  72 #define MCBUS_MID_SHIFT         33
  73
  74 #define MAX_MC_BUS              8
  75
  76 /*
  77  * This is something of a layering violation, but it makes probing cleaner.
  78  */
  79 #define MCPCIA_PER_MCBUS                4
  80 /* the MCPCIA bridge CSR addresses, offset zero, is a good thing to probe for */
  81 #define MCPCIA_BRIDGE_ADDR(gid, mid)    \
  82         (MCBUS_IOSPACE | 0x1E0000000LL  |               \
  83         (((unsigned long) gid) << MCBUS_GID_SHIFT) |    \
  84         (((unsigned long) mid) << MCBUS_MID_SHIFT))