sys/arch/alpha/pci/a12c_pci.c

   1 /* $NetBSD: a12c_pci.c,v 1.5 2009/03/14 15:35:59 dsl Exp $ */
   2
   3 /* [Notice revision 2.0]
   4  * Copyright (c) 1997 Avalon Computer Systems, Inc.
   5  * All rights reserved.
   6  *
   7  * Author: Ross Harvey
   8  *
   9  * Redistribution and use in source and binary forms, with or without
  10  * modification, are permitted provided that the following conditions
  11  * are met:
  12  * 1. Redistributions of source code must retain the above copyright and
  13  *    author notice, this list of conditions, and the following disclaimer.
  14  * 2. Redistributions in binary form must reproduce the above copyright
  15  *    notice, this list of conditions and the following disclaimer in the
  16  *    documentation and/or other materials provided with the distribution.
  17  * 3. Neither the name of Avalon Computer Systems, Inc. nor the names of
  18  *    its contributors may be used to endorse or promote products derived
  19  *    from this software without specific prior written permission.
  20  * 4. This copyright will be assigned to The NetBSD Foundation on
  21  *    1/1/2000 unless these terms (including possibly the assignment
  22  *    date) are updated in writing by Avalon prior to the latest specified
  23  *    assignment date.
  24  *
  25  * THIS SOFTWARE IS PROVIDED BY AVALON COMPUTER SYSTEMS, INC. AND CONTRIBUTORS
  26  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  35  * POSSIBILITY OF SUCH DAMAGE.
  36  */
  37
  38 #include "opt_avalon_a12.h"             /* Config options headers */
  39 #include <sys/cdefs.h>                  /* RCS ID & Copyright macro defns */
  40
  41 __KERNEL_RCSID(0, "$NetBSD: a12c_pci.c,v 1.5 2009/03/14 15:35:59 dsl Exp $");
  42 __KERNEL_COPYRIGHT(0,
  43     "Copyright (c) 1997 Christopher G. Demetriou.  All rights reserved.");
  44
  45 #include <sys/param.h>
  46 #include <sys/systm.h>
  47 #include <sys/kernel.h>
  48 #include <sys/device.h>
  49
  50 #include <uvm/uvm_extern.h>
  51
  52 #include <dev/pci/pcireg.h>
  53 #include <dev/pci/pcivar.h>
  54 #include <alpha/pci/a12creg.h>
  55 #include <alpha/pci/a12cvar.h>
  56
  57 #include <machine/rpb.h>        /* XXX for eb164 CIA firmware workarounds. */
  58
  59 #define A12C_PCI()      /* Generate ctags(1) key */
  60
  61 void            a12c_attach_hook(struct device *, struct device *,
  62                     struct pcibus_attach_args *);
  63 int             a12c_bus_maxdevs(void *, int);
  64 pcitag_t        a12c_make_tag(void *, int, int, int);
  65 void            a12c_decompose_tag(void *, pcitag_t, int *, int *,
  66                     int *);
  67 pcireg_t        a12c_conf_read(void *, pcitag_t, int);
  68 void            a12c_conf_write(void *, pcitag_t, int, pcireg_t);
  69
  70 void
  71 a12c_pci_init(pci_chipset_tag_t pc, void *v)
  72 {
  73
  74         pc->pc_conf_v = v;
  75         pc->pc_attach_hook = a12c_attach_hook;
  76         pc->pc_bus_maxdevs = a12c_bus_maxdevs;
  77         pc->pc_make_tag = a12c_make_tag;
  78         pc->pc_decompose_tag = a12c_decompose_tag;
  79         pc->pc_conf_read = a12c_conf_read;
  80         pc->pc_conf_write = a12c_conf_write;
  81 }
  82
  83 void
  84 a12c_attach_hook(struct device *parent, struct device *self, struct pcibus_attach_args *pba)
  85 {
  86 }
  87
  88 int
  89 a12c_bus_maxdevs(void *cpv, int busno)
  90 {
  91         return 1;
  92 }
  93
  94 pcitag_t
  95 a12c_make_tag(void *cpv, int b, int d, int f)
  96 {
  97
  98         return (b << 16) | (d << 11) | (f << 8);
  99 }
 100
 101 void
 102 a12c_decompose_tag(void *cpv, pcitag_t tag, int *bp, int *dp, int *fp)
 103 {
 104
 105         if (bp != NULL)
 106                 *bp = (tag >> 16) & 0xff;
 107         if (dp != NULL)
 108                 *dp = (tag >> 11) & 0x1f;
 109         if (fp != NULL)
 110                 *fp = (tag >> 8) & 0x7;
 111 }
 112
 113 static void
 114 a12_clear_master_abort(void)
 115 {
 116         alpha_pal_draina();
 117         alpha_mb();
 118         REGVAL(A12_GSR) = REGVAL(A12_GSR) | A12_PCIMasterAbort;
 119         alpha_mb();
 120 }
 121
 122 static int
 123 a12_check_for_master_abort(void)
 124 {
 125         alpha_pal_draina();
 126         alpha_mb();
 127         return (REGVAL(A12_GSR) & A12_PCIMasterAbort)!=0;
 128 }
 129
 130 static int
 131 a12_set_pci_config_cycle(int offset)
 132 {
 133         alpha_pal_draina();
 134         alpha_mb();
 135         REGVAL(A12_OMR) = REGVAL(A12_OMR)
 136                         | A12_OMR_PCIConfigCycle
 137                         | (offset & 4 ? A12_OMR_PCIAddr2 : 0);
 138         alpha_mb();
 139         return offset & ~4;
 140 }
 141
 142 static void
 143 a12_reset_pci_config_cycle(void)
 144 {
 145         alpha_pal_draina();
 146         alpha_mb();
 147         REGVAL(A12_OMR) = REGVAL(A12_OMR)
 148                         & ~(A12_OMR_PCIConfigCycle | A12_OMR_PCIAddr2);
 149         alpha_mb();
 150 }
 151
 152 pcireg_t
 153 a12c_conf_read(void *cpv, pcitag_t tag, int offset)
 154 {
 155         pcireg_t *datap, data;
 156         int s, ba;
 157         int32_t old_haxr2;                                      /* XXX */
 158
 159         s = 0;                                  /* XXX gcc -Wuninitialized */
 160         old_haxr2 = 0;                          /* XXX gcc -Wuninitialized */
 161
 162         if(tag)
 163                 return ~0;
 164
 165         s = splhigh();
 166         a12_clear_master_abort();
 167         offset = a12_set_pci_config_cycle(offset);
 168
 169         datap = (pcireg_t *)(ALPHA_PHYS_TO_K0SEG(A12_PCITarget+offset));
 170         data  = ~0L;
 171         if(!(ba = badaddr(datap, sizeof *datap)))
 172                 data = *datap;
 173
 174         a12_reset_pci_config_cycle();
 175         if(a12_check_for_master_abort())
 176                 data = ~0L;
 177
 178         splx(s);
 179 #if 0
 180         printf("a12c_conf_read: tag 0x%lx, reg 0x%lx -> %x @ %p%s\n", tag, offset,
 181             data, datap, ba ? " (badaddr)" : "");
 182 #endif
 183
 184         return data;
 185 }
 186
 187
 188
 189 void
 190 a12c_conf_write(void *cpv, pcitag_t tag, int offset, pcireg_t data)
 191 {
 192         pcireg_t *datap;
 193         int s;
 194
 195         s = 0;                                  /* XXX gcc -Wuninitialized */
 196
 197         if(tag) {
 198                 What();
 199                 return;
 200         }
 201
 202         s = splhigh();
 203         offset = a12_set_pci_config_cycle(offset);
 204          datap = (pcireg_t *)(ALPHA_PHYS_TO_K0SEG(A12_PCITarget+offset));
 205         *datap = data;
 206         a12_reset_pci_config_cycle();
 207         splx(s);
 208 #if 0
 209         printf("a12c_conf_write: tag 0x%lx, reg 0x%lx -> 0x%x @ %p\n", tag,
 210             offset, data, datap);
 211 #endif
 212 }