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[netbsd-mini2440.git] / sys / arch / alpha / pci / mcpcia_pci.c
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1 /* $NetBSD: mcpcia_pci.c,v 1.7 2009/03/14 15:35:59 dsl Exp $ */
3 /*
4 * Copyright (c) 1998 by Matthew Jacob
5 * NASA AMES Research Center.
6 * All rights reserved.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice immediately at the beginning of the file, without modification,
13 * this list of conditions, and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. The name of the author may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
33 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
35 __KERNEL_RCSID(0, "$NetBSD: mcpcia_pci.c,v 1.7 2009/03/14 15:35:59 dsl Exp $");
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/kernel.h>
40 #include <sys/device.h>
42 #include <uvm/uvm_extern.h>
44 #include <dev/pci/pcireg.h>
45 #include <dev/pci/pcivar.h>
46 #include <alpha/pci/mcpciareg.h>
47 #include <alpha/pci/mcpciavar.h>
49 #define KV(_addr) ((void *)ALPHA_PHYS_TO_K0SEG((_addr)))
51 static void mcpcia_attach_hook(struct device *, struct device *,
52 struct pcibus_attach_args *);
53 static int
54 mcpcia_bus_maxdevs(void *, int);
55 static pcitag_t
56 mcpcia_make_tag(void *, int, int, int);
57 static void
58 mcpcia_decompose_tag(void *, pcitag_t, int *, int *, int *);
59 static pcireg_t
60 mcpcia_conf_read(void *, pcitag_t, int);
61 static void
62 mcpcia_conf_write(void *, pcitag_t, int, pcireg_t);
64 void
65 mcpcia_pci_init(pci_chipset_tag_t pc, void *v)
67 pc->pc_conf_v = v;
68 pc->pc_attach_hook = mcpcia_attach_hook;
69 pc->pc_bus_maxdevs = mcpcia_bus_maxdevs;
70 pc->pc_make_tag = mcpcia_make_tag;
71 pc->pc_decompose_tag = mcpcia_decompose_tag;
72 pc->pc_conf_read = mcpcia_conf_read;
73 pc->pc_conf_write = mcpcia_conf_write;
76 static void
77 mcpcia_attach_hook(struct device *parent, struct device *self, struct pcibus_attach_args *pba)
81 static int
82 mcpcia_bus_maxdevs(void *cpv, int busno)
84 return (MCPCIA_MAXDEV);
87 static pcitag_t
88 mcpcia_make_tag(void *cpv, int b, int d, int f)
90 pcitag_t tag;
91 tag = (b << 21) | (d << 16) | (f << 13);
92 return (tag);
95 static void
96 mcpcia_decompose_tag(void *cpv, pcitag_t tag, int *bp, int *dp, int *fp)
98 if (bp != NULL)
99 *bp = (tag >> 21) & 0xff;
100 if (dp != NULL)
101 *dp = (tag >> 16) & 0x1f;
102 if (fp != NULL)
103 *fp = (tag >> 13) & 0x7;
106 static pcireg_t
107 mcpcia_conf_read(void *cpv, pcitag_t tag, int offset)
109 struct mcpcia_config *ccp = cpv;
110 pcireg_t *dp, data = (pcireg_t) -1;
111 unsigned long paddr;
114 * There's nothing in slot 0 on a primary bus- don't even try.
116 if ((tag >> 21) == 0 && ((u_int32_t) tag & 0x1f0000) == 0)
117 return (data);
119 if (ccp == NULL) {
120 panic("NULL ccp in mcpcia_conf_read");
122 paddr = (unsigned long) tag;
123 paddr |= (3LL << 3); /* 32 Bit PCI byte enables */
124 paddr |= ((unsigned long) ((offset >> 2) << 7));
125 paddr |= MCPCIA_PCI_CONF;
126 paddr |= ccp->cc_sysbase;
127 dp = (pcireg_t *)KV(paddr);
128 if (badaddr(dp, sizeof (*dp)) == 0) {
129 data = *dp;
131 return (data);
134 static void
135 mcpcia_conf_write(void *cpv, pcitag_t tag, int offset, pcireg_t data)
137 struct mcpcia_config *ccp = cpv;
138 pcireg_t *dp;
139 unsigned long paddr;
142 * There's nothing in slot 0 on a primary bus- don't even try.
144 if ((tag >> 21) == 0 && ((u_int32_t) tag & 0x1f0000) == 0)
145 return;
147 if (ccp == NULL) {
148 panic("NULL ccp in mcpcia_conf_write");
150 paddr = (unsigned long) tag;
151 paddr |= (3LL << 3); /* 32 Bit PCI byte enables */
152 paddr |= ((unsigned long) ((offset >> 2) << 7));
153 paddr |= MCPCIA_PCI_CONF;
154 paddr |= ccp->cc_sysbase;
156 dp = (pcireg_t *)KV(paddr);
157 *dp = data;