sys/arch/alpha/pci/pci_1000a.c

   1 /* $NetBSD: pci_1000a.c,v 1.22 2009/03/14 15:35:59 dsl Exp $ */
   2
   3 /*
   4  * Copyright (c) 1998 The NetBSD Foundation, Inc.
   5  * All rights reserved.
   6  *
   7  * This code is based on pci_kn20aa.c, written by Chris G. Demetriou at
   8  * Carnegie-Mellon University. Platform support for Noritake, Pintake, and
   9  * Corelle by Ross Harvey with copyright assignment by permission of Avalon
  10  * Computer Systems, Inc.
  11  *
  12  * Redistribution and use in source and binary forms, with or without
  13  * modification, are permitted provided that the following conditions
  14  * are met:
  15  * 1. Redistributions of source code must retain the above copyright
  16  *    notice, this list of conditions and the following disclaimer.
  17  * 2. Redistributions in binary form must reproduce the above copyright
  18  *    notice, this list of conditions and the following disclaimer in the
  19  *    documentation and/or other materials provided with the distribution.
  20  *
  21  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  22  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  23  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  24  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  25  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  31  * POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 /*
  35  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
  36  * All rights reserved.
  37  *
  38  * Author: Chris G. Demetriou
  39  *
  40  * Permission to use, copy, modify and distribute this software and
  41  * its documentation is hereby granted, provided that both the copyright
  42  * notice and this permission notice appear in all copies of the
  43  * software, derivative works or modified versions, and any portions
  44  * thereof, and that both notices appear in supporting documentation.
  45  *
  46  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
  47  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
  48  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
  49  *
  50  * Carnegie Mellon requests users of this software to return to
  51  *
  52  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
  53  *  School of Computer Science
  54  *  Carnegie Mellon University
  55  *  Pittsburgh PA 15213-3890
  56  *
  57  * any improvements or extensions that they make and grant Carnegie the
  58  * rights to redistribute these changes.
  59  */
  60
  61 #include <sys/cdefs.h>                  /* RCS ID & Copyright macro defns */
  62
  63 __KERNEL_RCSID(0, "$NetBSD: pci_1000a.c,v 1.22 2009/03/14 15:35:59 dsl Exp $");
  64
  65 #include <sys/types.h>
  66 #include <sys/param.h>
  67 #include <sys/time.h>
  68 #include <sys/systm.h>
  69 #include <sys/errno.h>
  70 #include <sys/malloc.h>
  71 #include <sys/device.h>
  72 #include <sys/syslog.h>
  73
  74 #include <uvm/uvm_extern.h>
  75
  76 #include <machine/autoconf.h>
  77
  78 #include <dev/pci/pcireg.h>
  79 #include <dev/pci/pcivar.h>
  80
  81 #include <alpha/pci/pci_1000a.h>
  82
  83 #include "sio.h"
  84 #if NSIO > 0 || NPCEB > 0
  85 #include <alpha/pci/siovar.h>
  86 #endif
  87
  88 #define PCI_NIRQ        32
  89 #define PCI_STRAY_MAX   5
  90
  91 #define IMR2IRQ(bn) ((bn) - 1)
  92 #define IRQ2IMR(irq) ((irq) + 1)
  93
  94 static bus_space_tag_t mystery_icu_iot;
  95 static bus_space_handle_t mystery_icu_ioh[2];
  96
  97 int     dec_1000a_intr_map(struct pci_attach_args *,
  98             pci_intr_handle_t *);
  99 const char *dec_1000a_intr_string(void *, pci_intr_handle_t);
 100 const struct evcnt *dec_1000a_intr_evcnt(void *, pci_intr_handle_t);
 101 void    *dec_1000a_intr_establish(void *, pci_intr_handle_t,
 102             int, int (*func)(void *), void *);
 103 void    dec_1000a_intr_disestablish(void *, void *);
 104
 105 struct alpha_shared_intr *dec_1000a_pci_intr;
 106
 107 static void dec_1000a_iointr(void *arg, unsigned long vec);
 108 static void dec_1000a_enable_intr(int irq);
 109 static void dec_1000a_disable_intr(int irq);
 110 static void pci_1000a_imi(void);
 111 static pci_chipset_tag_t pc_tag;
 112
 113 void
 114 pci_1000a_pickintr(void *core, bus_space_tag_t iot, bus_space_tag_t memt, pci_chipset_tag_t pc)
 115 {
 116         char *cp;
 117         int i;
 118
 119         mystery_icu_iot = iot;
 120
 121         pc_tag = pc;
 122         if (bus_space_map(iot, 0x54a, 2, 0, mystery_icu_ioh + 0)
 123         ||  bus_space_map(iot, 0x54c, 2, 0, mystery_icu_ioh + 1))
 124                 panic("pci_1000a_pickintr");
 125         pc->pc_intr_v = core;
 126         pc->pc_intr_map = dec_1000a_intr_map;
 127         pc->pc_intr_string = dec_1000a_intr_string;
 128         pc->pc_intr_evcnt = dec_1000a_intr_evcnt;
 129         pc->pc_intr_establish = dec_1000a_intr_establish;
 130         pc->pc_intr_disestablish = dec_1000a_intr_disestablish;
 131
 132         pc->pc_pciide_compat_intr_establish = NULL;
 133
 134         dec_1000a_pci_intr = alpha_shared_intr_alloc(PCI_NIRQ, 8);
 135         for (i = 0; i < PCI_NIRQ; i++) {
 136                 alpha_shared_intr_set_maxstrays(dec_1000a_pci_intr, i,
 137                     PCI_STRAY_MAX);
 138
 139                 cp = alpha_shared_intr_string(dec_1000a_pci_intr, i);
 140                 sprintf(cp, "irq %d", i);
 141                 evcnt_attach_dynamic(alpha_shared_intr_evcnt(
 142                     dec_1000a_pci_intr, i), EVCNT_TYPE_INTR, NULL,
 143                     "dec_1000a", cp);
 144         }
 145
 146         pci_1000a_imi();
 147 #if NSIO > 0 || NPCEB > 0
 148         sio_intr_setup(pc, iot);
 149 #endif
 150 }
 151
 152 int
 153 dec_1000a_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
 154 {
 155         pcitag_t bustag = pa->pa_intrtag;
 156         int buspin = pa->pa_intrpin;
 157         pci_chipset_tag_t pc = pa->pa_pc;
 158         int imrbit, device;
 159         /*
 160          * Get bit number in mystery ICU imr
 161          */
 162         static const signed char imrmap[][4] = {
 163 #               define  IRQSPLIT(o) { (o), (o)+1, (o)+16, (o)+16+1 }
 164 #               define  IRQNONE          { 0, 0, 0, 0 }
 165                 /*  0  */ { 1, 0, 0, 0 },       /* Noritake and Pintake */
 166                 /*  1  */ IRQSPLIT(8),
 167                 /*  2  */ IRQSPLIT(10),
 168                 /*  3  */ IRQSPLIT(12),
 169                 /*  4  */ IRQSPLIT(14),
 170                 /*  5  */ { 1, 0, 0, 0 },       /* Corelle */
 171                 /*  6  */ { 10, 0, 0, 0 },      /* Corelle */
 172                 /*  7  */ IRQNONE,
 173                 /*  8  */ { 1, 0, 0, 0 },       /* isp behind ppb */
 174                 /*  9  */ IRQNONE,
 175                 /* 10  */ IRQNONE,
 176                 /* 11  */ IRQSPLIT(2),
 177                 /* 12  */ IRQSPLIT(4),
 178                 /* 13  */ IRQSPLIT(6),
 179                 /* 14  */ IRQSPLIT(8)           /* Corelle */
 180         };
 181
 182         if (buspin == 0)        /* No IRQ used. */
 183                 return 1;
 184         if (!(1 <= buspin && buspin <= 4))
 185                 goto bad;
 186         pci_decompose_tag(pc, bustag, NULL, &device, NULL);
 187         if (0 <= device && device < sizeof imrmap / sizeof imrmap[0]) {
 188                 if (device == 0)
 189                         printf("dec_1000a_intr_map: ?! UNEXPECTED DEV 0\n");
 190                 imrbit = imrmap[device][buspin - 1];
 191                 if (imrbit) {
 192                         *ihp = IMR2IRQ(imrbit);
 193                         return 0;
 194                 }
 195         }
 196 bad:    printf("dec_1000a_intr_map: can't map dev %d pin %d\n", device, buspin);
 197         return 1;
 198 }
 199
 200 const char *
 201 dec_1000a_intr_string(void *ccv, pci_intr_handle_t ih)
 202 {
 203         static const char irqmsg_fmt[] = "dec_1000a irq %ld";
 204         static char irqstr[sizeof irqmsg_fmt];
 205
 206
 207         if (ih >= PCI_NIRQ)
 208                 panic("dec_1000a_intr_string: bogus dec_1000a IRQ 0x%lx", ih);
 209
 210         snprintf(irqstr, sizeof irqstr, irqmsg_fmt, ih);
 211         return (irqstr);
 212 }
 213
 214 const struct evcnt *
 215 dec_1000a_intr_evcnt(void *ccv, pci_intr_handle_t ih)
 216 {
 217
 218         if (ih >= PCI_NIRQ)
 219                 panic("dec_1000a_intr_evcnt: bogus dec_1000a IRQ 0x%lx", ih);
 220
 221         return (alpha_shared_intr_evcnt(dec_1000a_pci_intr, ih));
 222 }
 223
 224 void *
 225 dec_1000a_intr_establish(ccv, ih, level, func, arg)
 226         void *ccv, *arg;
 227         pci_intr_handle_t ih;
 228         int level;
 229         int (*func)(void *);
 230 {
 231         void *cookie;
 232
 233         if (ih >= PCI_NIRQ)
 234                 panic("dec_1000a_intr_establish: IRQ too high, 0x%lx", ih);
 235
 236         cookie = alpha_shared_intr_establish(dec_1000a_pci_intr, ih, IST_LEVEL,
 237             level, func, arg, "dec_1000a irq");
 238
 239         if (cookie != NULL &&
 240             alpha_shared_intr_firstactive(dec_1000a_pci_intr, ih)) {
 241                 scb_set(0x900 + SCB_IDXTOVEC(ih), dec_1000a_iointr, NULL,
 242                     level);
 243                 dec_1000a_enable_intr(ih);
 244         }
 245         return (cookie);
 246 }
 247
 248 void
 249 dec_1000a_intr_disestablish(void *ccv, void *cookie)
 250 {
 251         struct alpha_shared_intrhand *ih = cookie;
 252         unsigned int irq = ih->ih_num;
 253         int s;
 254
 255         s = splhigh();
 256
 257         alpha_shared_intr_disestablish(dec_1000a_pci_intr, cookie,
 258             "dec_1000a irq");
 259         if (alpha_shared_intr_isactive(dec_1000a_pci_intr, irq) == 0) {
 260                 dec_1000a_disable_intr(irq);
 261                 alpha_shared_intr_set_dfltsharetype(dec_1000a_pci_intr, irq,
 262                     IST_NONE);
 263                 scb_free(0x900 + SCB_IDXTOVEC(irq));
 264         }
 265
 266         splx(s);
 267 }
 268
 269 static void
 270 dec_1000a_iointr(void *framep, unsigned long vec)
 271 {
 272         int irq;
 273
 274         irq = SCB_VECTOIDX(vec - 0x900);
 275
 276         if (!alpha_shared_intr_dispatch(dec_1000a_pci_intr, irq)) {
 277                 alpha_shared_intr_stray(dec_1000a_pci_intr, irq,
 278                     "dec_1000a irq");
 279                 if (ALPHA_SHARED_INTR_DISABLE(dec_1000a_pci_intr, irq))
 280                         dec_1000a_disable_intr(irq);
 281         } else
 282                 alpha_shared_intr_reset_strays(dec_1000a_pci_intr, irq);
 283 }
 284
 285 /*
 286  * Read and write the mystery ICU IMR registers
 287  */
 288
 289 #define IR(h) bus_space_read_2(mystery_icu_iot, mystery_icu_ioh[h], 0)
 290 #define IW(h, v) bus_space_write_2(mystery_icu_iot, mystery_icu_ioh[h], 0, (v))
 291
 292 /*
 293  * Enable and disable interrupts at the ICU level
 294  */
 295
 296 static void
 297 dec_1000a_enable_intr(int irq)
 298 {
 299         int imrval = IRQ2IMR(irq);
 300         int i = imrval >= 16;
 301
 302         IW(i, IR(i) | 1 << (imrval & 0xf));
 303 }
 304
 305 static void
 306 dec_1000a_disable_intr(int irq)
 307 {
 308         int imrval = IRQ2IMR(irq);
 309         int i = imrval >= 16;
 310
 311         IW(i, IR(i) & ~(1 << (imrval & 0xf)));
 312 }
 313 /*
 314  * Initialize mystery ICU
 315  */
 316 static void
 317 pci_1000a_imi()
 318 {
 319         IW(0, IR(0) & 1);
 320         IW(1, IR(0) & 3);
 321 }