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[netbsd-mini2440.git] / sys / arch / alpha / pci / pci_bwx_bus_mem_chipdep.c
blob6081db88e0807d1ee619cbfb69b6e2f35009190b
1 /* $NetBSD: pci_bwx_bus_mem_chipdep.c,v 1.21 2008/04/28 20:23:11 martin Exp $ */
2
3 /*-
4 * Copyright (c) 1997, 1998, 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 /*
34 * Copyright (c) 1995, 1996 Carnegie-Mellon University.
35 * All rights reserved.
36 *
37 * Author: Chris G. Demetriou
38 *
39 * Permission to use, copy, modify and distribute this software and
40 * its documentation is hereby granted, provided that both the copyright
41 * notice and this permission notice appear in all copies of the
42 * software, derivative works or modified versions, and any portions
43 * thereof, and that both notices appear in supporting documentation.
44 *
45 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
46 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
47 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
48 *
49 * Carnegie Mellon requests users of this software to return to
50 *
51 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
52 * School of Computer Science
53 * Carnegie Mellon University
54 * Pittsburgh PA 15213-3890
55 *
56 * any improvements or extensions that they make and grant Carnegie the
57 * rights to redistribute these changes.
58 */
59
60 /*
61 * Common PCI Chipset "bus I/O" functions, for chipsets which have to
62 * deal with only a single PCI interface chip in a machine.
63 *
64 * uses:
65 * CHIP name of the 'chip' it's being compiled for.
66 * CHIP_MEM_BASE Mem space base to use.
67 * CHIP_MEM_EX_STORE
68 * If defined, device-provided static storage area
69 * for the memory space extent. If this is
70 * defined, CHIP_MEM_EX_STORE_SIZE must also be
71 * defined. If this is not defined, a static area
72 * will be declared.
73 * CHIP_MEM_EX_STORE_SIZE
74 * Size of the device-provided static storage area
75 * for the memory space extent.
76 */
77
78 #include <sys/cdefs.h>
79 __KERNEL_RCSID(1, "$NetBSD: pci_bwx_bus_mem_chipdep.c,v 1.21 2008/04/28 20:23:11 martin Exp $");
80
81 #include <sys/extent.h>
82
83 #include <machine/bwx.h>
84
85 #define __C(A,B) __CONCAT(A,B)
86 #define __S(S) __STRING(S)
87
88 /* mapping/unmapping */
89 int __C(CHIP,_mem_map)(void *, bus_addr_t, bus_size_t, int,
90 bus_space_handle_t *, int);
91 void __C(CHIP,_mem_unmap)(void *, bus_space_handle_t,
92 bus_size_t, int);
93 int __C(CHIP,_mem_subregion)(void *, bus_space_handle_t,
94 bus_size_t, bus_size_t, bus_space_handle_t *);
95
96 int __C(CHIP,_mem_translate)(void *, bus_addr_t, bus_size_t,
97 int, struct alpha_bus_space_translation *);
98 int __C(CHIP,_mem_get_window)(void *, int,
99 struct alpha_bus_space_translation *);
100
101 /* allocation/deallocation */
102 int __C(CHIP,_mem_alloc)(void *, bus_addr_t, bus_addr_t,
103 bus_size_t, bus_size_t, bus_addr_t, int, bus_addr_t *,
104 bus_space_handle_t *);
105 void __C(CHIP,_mem_free)(void *, bus_space_handle_t,
106 bus_size_t);
107
108 /* get kernel virtual address */
109 void * __C(CHIP,_mem_vaddr)(void *, bus_space_handle_t);
110
111 /* mmap for user */
112 paddr_t __C(CHIP,_mem_mmap)(void *, bus_addr_t, off_t, int, int);
113
114 /* barrier */
115 inline void __C(CHIP,_mem_barrier)(void *, bus_space_handle_t,
116 bus_size_t, bus_size_t, int);
117
118 /* read (single) */
119 inline u_int8_t __C(CHIP,_mem_read_1)(void *, bus_space_handle_t,
120 bus_size_t);
121 inline u_int16_t __C(CHIP,_mem_read_2)(void *, bus_space_handle_t,
122 bus_size_t);
123 inline u_int32_t __C(CHIP,_mem_read_4)(void *, bus_space_handle_t,
124 bus_size_t);
125 inline u_int64_t __C(CHIP,_mem_read_8)(void *, bus_space_handle_t,
126 bus_size_t);
127
128 /* read multiple */
129 void __C(CHIP,_mem_read_multi_1)(void *, bus_space_handle_t,
130 bus_size_t, u_int8_t *, bus_size_t);
131 void __C(CHIP,_mem_read_multi_2)(void *, bus_space_handle_t,
132 bus_size_t, u_int16_t *, bus_size_t);
133 void __C(CHIP,_mem_read_multi_4)(void *, bus_space_handle_t,
134 bus_size_t, u_int32_t *, bus_size_t);
135 void __C(CHIP,_mem_read_multi_8)(void *, bus_space_handle_t,
136 bus_size_t, u_int64_t *, bus_size_t);
137
138 /* read region */
139 void __C(CHIP,_mem_read_region_1)(void *, bus_space_handle_t,
140 bus_size_t, u_int8_t *, bus_size_t);
141 void __C(CHIP,_mem_read_region_2)(void *, bus_space_handle_t,
142 bus_size_t, u_int16_t *, bus_size_t);
143 void __C(CHIP,_mem_read_region_4)(void *, bus_space_handle_t,
144 bus_size_t, u_int32_t *, bus_size_t);
145 void __C(CHIP,_mem_read_region_8)(void *, bus_space_handle_t,
146 bus_size_t, u_int64_t *, bus_size_t);
147
148 /* write (single) */
149 inline void __C(CHIP,_mem_write_1)(void *, bus_space_handle_t,
150 bus_size_t, u_int8_t);
151 inline void __C(CHIP,_mem_write_2)(void *, bus_space_handle_t,
152 bus_size_t, u_int16_t);
153 inline void __C(CHIP,_mem_write_4)(void *, bus_space_handle_t,
154 bus_size_t, u_int32_t);
155 inline void __C(CHIP,_mem_write_8)(void *, bus_space_handle_t,
156 bus_size_t, u_int64_t);
157
158 /* write multiple */
159 void __C(CHIP,_mem_write_multi_1)(void *, bus_space_handle_t,
160 bus_size_t, const u_int8_t *, bus_size_t);
161 void __C(CHIP,_mem_write_multi_2)(void *, bus_space_handle_t,
162 bus_size_t, const u_int16_t *, bus_size_t);
163 void __C(CHIP,_mem_write_multi_4)(void *, bus_space_handle_t,
164 bus_size_t, const u_int32_t *, bus_size_t);
165 void __C(CHIP,_mem_write_multi_8)(void *, bus_space_handle_t,
166 bus_size_t, const u_int64_t *, bus_size_t);
167
168 /* write region */
169 void __C(CHIP,_mem_write_region_1)(void *, bus_space_handle_t,
170 bus_size_t, const u_int8_t *, bus_size_t);
171 void __C(CHIP,_mem_write_region_2)(void *, bus_space_handle_t,
172 bus_size_t, const u_int16_t *, bus_size_t);
173 void __C(CHIP,_mem_write_region_4)(void *, bus_space_handle_t,
174 bus_size_t, const u_int32_t *, bus_size_t);
175 void __C(CHIP,_mem_write_region_8)(void *, bus_space_handle_t,
176 bus_size_t, const u_int64_t *, bus_size_t);
177
178 /* set multiple */
179 void __C(CHIP,_mem_set_multi_1)(void *, bus_space_handle_t,
180 bus_size_t, u_int8_t, bus_size_t);
181 void __C(CHIP,_mem_set_multi_2)(void *, bus_space_handle_t,
182 bus_size_t, u_int16_t, bus_size_t);
183 void __C(CHIP,_mem_set_multi_4)(void *, bus_space_handle_t,
184 bus_size_t, u_int32_t, bus_size_t);
185 void __C(CHIP,_mem_set_multi_8)(void *, bus_space_handle_t,
186 bus_size_t, u_int64_t, bus_size_t);
187
188 /* set region */
189 void __C(CHIP,_mem_set_region_1)(void *, bus_space_handle_t,
190 bus_size_t, u_int8_t, bus_size_t);
191 void __C(CHIP,_mem_set_region_2)(void *, bus_space_handle_t,
192 bus_size_t, u_int16_t, bus_size_t);
193 void __C(CHIP,_mem_set_region_4)(void *, bus_space_handle_t,
194 bus_size_t, u_int32_t, bus_size_t);
195 void __C(CHIP,_mem_set_region_8)(void *, bus_space_handle_t,
196 bus_size_t, u_int64_t, bus_size_t);
197
198 /* copy */
199 void __C(CHIP,_mem_copy_region_1)(void *, bus_space_handle_t,
200 bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t);
201 void __C(CHIP,_mem_copy_region_2)(void *, bus_space_handle_t,
202 bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t);
203 void __C(CHIP,_mem_copy_region_4)(void *, bus_space_handle_t,
204 bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t);
205 void __C(CHIP,_mem_copy_region_8)(void *, bus_space_handle_t,
206 bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t);
207
208 #ifndef CHIP_MEM_EX_STORE
209 static long
210 __C(CHIP,_mem_ex_storage)[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)];
211 #define CHIP_MEM_EX_STORE(v) (__C(CHIP,_mem_ex_storage))
212 #define CHIP_MEM_EX_STORE_SIZE(v) (sizeof __C(CHIP,_mem_ex_storage))
213 #endif
214
215 void
216 __C(CHIP,_bus_mem_init)(t, v)
217 bus_space_tag_t t;
218 void *v;
219 {
220 struct extent *ex;
221
222 /*
223 * Initialize the bus space tag.
224 */
225
226 /* cookie */
227 t->abs_cookie = v;
228
229 /* mapping/unmapping */
230 t->abs_map = __C(CHIP,_mem_map);
231 t->abs_unmap = __C(CHIP,_mem_unmap);
232 t->abs_subregion = __C(CHIP,_mem_subregion);
233
234 t->abs_translate = __C(CHIP,_mem_translate);
235 t->abs_get_window = __C(CHIP,_mem_get_window);
236
237 /* allocation/deallocation */
238 t->abs_alloc = __C(CHIP,_mem_alloc);
239 t->abs_free = __C(CHIP,_mem_free);
240
241 /* get kernel virtual address */
242 t->abs_vaddr = __C(CHIP,_mem_vaddr);
243
244 /* mmap for user */
245 t->abs_mmap = __C(CHIP,_mem_mmap);
246
247 /* barrier */
248 t->abs_barrier = __C(CHIP,_mem_barrier);
249
250 /* read (single) */
251 t->abs_r_1 = __C(CHIP,_mem_read_1);
252 t->abs_r_2 = __C(CHIP,_mem_read_2);
253 t->abs_r_4 = __C(CHIP,_mem_read_4);
254 t->abs_r_8 = __C(CHIP,_mem_read_8);
255
256 /* read multiple */
257 t->abs_rm_1 = __C(CHIP,_mem_read_multi_1);
258 t->abs_rm_2 = __C(CHIP,_mem_read_multi_2);
259 t->abs_rm_4 = __C(CHIP,_mem_read_multi_4);
260 t->abs_rm_8 = __C(CHIP,_mem_read_multi_8);
261
262 /* read region */
263 t->abs_rr_1 = __C(CHIP,_mem_read_region_1);
264 t->abs_rr_2 = __C(CHIP,_mem_read_region_2);
265 t->abs_rr_4 = __C(CHIP,_mem_read_region_4);
266 t->abs_rr_8 = __C(CHIP,_mem_read_region_8);
267
268 /* write (single) */
269 t->abs_w_1 = __C(CHIP,_mem_write_1);
270 t->abs_w_2 = __C(CHIP,_mem_write_2);
271 t->abs_w_4 = __C(CHIP,_mem_write_4);
272 t->abs_w_8 = __C(CHIP,_mem_write_8);
273
274 /* write multiple */
275 t->abs_wm_1 = __C(CHIP,_mem_write_multi_1);
276 t->abs_wm_2 = __C(CHIP,_mem_write_multi_2);
277 t->abs_wm_4 = __C(CHIP,_mem_write_multi_4);
278 t->abs_wm_8 = __C(CHIP,_mem_write_multi_8);
279
280 /* write region */
281 t->abs_wr_1 = __C(CHIP,_mem_write_region_1);
282 t->abs_wr_2 = __C(CHIP,_mem_write_region_2);
283 t->abs_wr_4 = __C(CHIP,_mem_write_region_4);
284 t->abs_wr_8 = __C(CHIP,_mem_write_region_8);
285
286 /* set multiple */
287 t->abs_sm_1 = __C(CHIP,_mem_set_multi_1);
288 t->abs_sm_2 = __C(CHIP,_mem_set_multi_2);
289 t->abs_sm_4 = __C(CHIP,_mem_set_multi_4);
290 t->abs_sm_8 = __C(CHIP,_mem_set_multi_8);
291
292 /* set region */
293 t->abs_sr_1 = __C(CHIP,_mem_set_region_1);
294 t->abs_sr_2 = __C(CHIP,_mem_set_region_2);
295 t->abs_sr_4 = __C(CHIP,_mem_set_region_4);
296 t->abs_sr_8 = __C(CHIP,_mem_set_region_8);
297
298 /* copy */
299 t->abs_c_1 = __C(CHIP,_mem_copy_region_1);
300 t->abs_c_2 = __C(CHIP,_mem_copy_region_2);
301 t->abs_c_4 = __C(CHIP,_mem_copy_region_4);
302 t->abs_c_8 = __C(CHIP,_mem_copy_region_8);
303
304 ex = extent_create(__S(__C(CHIP,_bus_mem)), 0x0UL, 0xffffffffUL,
305 M_DEVBUF, (void *)CHIP_MEM_EX_STORE(v), CHIP_MEM_EX_STORE_SIZE(v),
306 EX_NOWAIT|EX_NOCOALESCE);
307
308 CHIP_MEM_EXTENT(v) = ex;
309 }
310
311 int
312 __C(CHIP,_mem_translate)(v, memaddr, memlen, flags, abst)
313 void *v;
314 bus_addr_t memaddr;
315 bus_size_t memlen;
316 int flags;
317 struct alpha_bus_space_translation *abst;
318 {
319
320 /* XXX */
321 return (EOPNOTSUPP);
322 }
323
324 int
325 __C(CHIP,_mem_get_window)(v, window, abst)
326 void *v;
327 int window;
328 struct alpha_bus_space_translation *abst;
329 {
330
331 switch (window) {
332 case 0:
333 abst->abst_bus_start = 0;
334 abst->abst_bus_end = 0xffffffffUL;
335 abst->abst_sys_start = CHIP_MEM_SYS_START(v);
336 abst->abst_sys_end = CHIP_MEM_SYS_START(v) + abst->abst_bus_end;
337 abst->abst_addr_shift = 0;
338 abst->abst_size_shift = 0;
339 abst->abst_flags = ABST_DENSE|ABST_BWX;
340 break;
341
342 default:
343 panic(__S(__C(CHIP,_mem_get_window)) ": invalid window %d",
344 window);
345 }
346
347 return (0);
348 }
349
350 int
351 __C(CHIP,_mem_map)(v, memaddr, memsize, flags, memhp, acct)
352 void *v;
353 bus_addr_t memaddr;
354 bus_size_t memsize;
355 int flags;
356 bus_space_handle_t *memhp;
357 int acct;
358 {
359 int error;
360
361 if (acct == 0)
362 goto mapit;
363
364 #ifdef EXTENT_DEBUG
365 printf("mem: allocating 0x%lx to 0x%lx\n", memaddr,
366 memaddr + memsize - 1);
367 #endif
368 error = extent_alloc_region(CHIP_MEM_EXTENT(v), memaddr, memsize,
369 EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0));
370 if (error) {
371 #ifdef EXTENT_DEBUG
372 printf("mem: allocation failed (%d)\n", error);
373 extent_print(CHIP_MEM_EXTENT(v));
374 #endif
375 return (error);
376 }
377
378 mapit:
379 *memhp = ALPHA_PHYS_TO_K0SEG(CHIP_MEM_SYS_START(v)) + memaddr;
380
381 return (0);
382 }
383
384 void
385 __C(CHIP,_mem_unmap)(v, memh, memsize, acct)
386 void *v;
387 bus_space_handle_t memh;
388 bus_size_t memsize;
389 int acct;
390 {
391 bus_addr_t memaddr;
392 int error;
393
394 if (acct == 0)
395 return;
396
397 #ifdef EXTENT_DEBUG
398 printf("mem: freeing handle 0x%lx for 0x%lx\n", memh, memsize);
399 #endif
400
401 memaddr = memh - ALPHA_PHYS_TO_K0SEG(CHIP_MEM_SYS_START(v));
402
403 #ifdef EXTENT_DEBUG
404 printf("mem: freeing 0x%lx to 0x%lx\n", memaddr, memaddr + memsize - 1);
405 #endif
406
407 error = extent_free(CHIP_MEM_EXTENT(v), memaddr, memsize,
408 EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0));
409 if (error) {
410 printf("%s: WARNING: could not unmap 0x%lx-0x%lx (error %d)\n",
411 __S(__C(CHIP,_mem_unmap)), memaddr, memaddr + memsize - 1,
412 error);
413 #ifdef EXTENT_DEBUG
414 extent_print(CHIP_MEM_EXTENT(v));
415 #endif
416 }
417 }
418
419 int
420 __C(CHIP,_mem_subregion)(v, memh, offset, size, nmemh)
421 void *v;
422 bus_space_handle_t memh, *nmemh;
423 bus_size_t offset, size;
424 {
425
426 *nmemh = memh + offset;
427 return (0);
428 }
429
430 int
431 __C(CHIP,_mem_alloc)(v, rstart, rend, size, align, boundary, flags,
432 addrp, bshp)
433 void *v;
434 bus_addr_t rstart, rend, *addrp;
435 bus_size_t size, align, boundary;
436 int flags;
437 bus_space_handle_t *bshp;
438 {
439 bus_addr_t memaddr;
440 int error;
441
442 /*
443 * Do the requested allocation.
444 */
445 #ifdef EXTENT_DEBUG
446 printf("mem: allocating from 0x%lx to 0x%lx\n", rstart, rend);
447 #endif
448 error = extent_alloc_subregion(CHIP_MEM_EXTENT(v), rstart, rend,
449 size, align, boundary,
450 EX_FAST | EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0),
451 &memaddr);
452 if (error) {
453 #ifdef EXTENT_DEBUG
454 printf("mem: allocation failed (%d)\n", error);
455 extent_print(CHIP_MEM_EXTENT(v));
456 #endif
457 }
458
459 #ifdef EXTENT_DEBUG
460 printf("mem: allocated 0x%lx to 0x%lx\n", memaddr, memaddr + size - 1);
461 #endif
462
463 *addrp = memaddr;
464 *bshp = ALPHA_PHYS_TO_K0SEG(CHIP_MEM_SYS_START(v)) + memaddr;
465
466 return (0);
467 }
468
469 void
470 __C(CHIP,_mem_free)(v, bsh, size)
471 void *v;
472 bus_space_handle_t bsh;
473 bus_size_t size;
474 {
475
476 /* Unmap does all we need to do. */
477 __C(CHIP,_mem_unmap)(v, bsh, size, 1);
478 }
479
480 void *
481 __C(CHIP,_mem_vaddr)(v, bsh)
482 void *v;
483 bus_space_handle_t bsh;
484 {
485
486 return ((void *)bsh);
487 }
488
489 paddr_t
490 __C(CHIP,_mem_mmap)(v, addr, off, prot, flags)
491 void *v;
492 bus_addr_t addr;
493 off_t off;
494 int prot;
495 int flags;
496 {
497
498 return (alpha_btop(CHIP_MEM_SYS_START(v) + addr + off));
499 }
500
501 inline void
502 __C(CHIP,_mem_barrier)(v, h, o, l, f)
503 void *v;
504 bus_space_handle_t h;
505 bus_size_t o, l;
506 int f;
507 {
508
509 if ((f & BUS_SPACE_BARRIER_READ) != 0)
510 alpha_mb();
511 else if ((f & BUS_SPACE_BARRIER_WRITE) != 0)
512 alpha_wmb();
513 }
514
515 inline u_int8_t
516 __C(CHIP,_mem_read_1)(v, memh, off)
517 void *v;
518 bus_space_handle_t memh;
519 bus_size_t off;
520 {
521 bus_addr_t addr;
522
523 addr = memh + off;
524 alpha_mb();
525 return (alpha_ldbu((u_int8_t *)addr));
526 }
527
528 inline u_int16_t
529 __C(CHIP,_mem_read_2)(v, memh, off)
530 void *v;
531 bus_space_handle_t memh;
532 bus_size_t off;
533 {
534 bus_addr_t addr;
535
536 addr = memh + off;
537 #ifdef DIAGNOSTIC
538 if (addr & 1)
539 panic(__S(__C(CHIP,_mem_read_2)) ": addr 0x%lx not aligned",
540 addr);
541 #endif
542 alpha_mb();
543 return (alpha_ldwu((u_int16_t *)addr));
544 }
545
546 inline u_int32_t
547 __C(CHIP,_mem_read_4)(v, memh, off)
548 void *v;
549 bus_space_handle_t memh;
550 bus_size_t off;
551 {
552 bus_addr_t addr;
553
554 addr = memh + off;
555 #ifdef DIAGNOSTIC
556 if (addr & 3)
557 panic(__S(__C(CHIP,_mem_read_4)) ": addr 0x%lx not aligned",
558 addr);
559 #endif
560 alpha_mb();
561 return (*(u_int32_t *)addr);
562 }
563
564 inline u_int64_t
565 __C(CHIP,_mem_read_8)(v, memh, off)
566 void *v;
567 bus_space_handle_t memh;
568 bus_size_t off;
569 {
570
571 alpha_mb();
572
573 /* XXX XXX XXX */
574 panic("%s not implemented", __S(__C(CHIP,_mem_read_8)));
575 }
576
577 #define CHIP_mem_read_multi_N(BYTES,TYPE) \
578 void \
579 __C(__C(CHIP,_mem_read_multi_),BYTES)(v, h, o, a, c) \
580 void *v; \
581 bus_space_handle_t h; \
582 bus_size_t o, c; \
583 TYPE *a; \
584 { \
585 \
586 while (c-- > 0) { \
587 __C(CHIP,_mem_barrier)(v, h, o, sizeof *a, \
588 BUS_SPACE_BARRIER_READ); \
589 *a++ = __C(__C(CHIP,_mem_read_),BYTES)(v, h, o); \
590 } \
591 }
592 CHIP_mem_read_multi_N(1,u_int8_t)
593 CHIP_mem_read_multi_N(2,u_int16_t)
594 CHIP_mem_read_multi_N(4,u_int32_t)
595 CHIP_mem_read_multi_N(8,u_int64_t)
596
597 #define CHIP_mem_read_region_N(BYTES,TYPE) \
598 void \
599 __C(__C(CHIP,_mem_read_region_),BYTES)(v, h, o, a, c) \
600 void *v; \
601 bus_space_handle_t h; \
602 bus_size_t o, c; \
603 TYPE *a; \
604 { \
605 \
606 while (c-- > 0) { \
607 *a++ = __C(__C(CHIP,_mem_read_),BYTES)(v, h, o); \
608 o += sizeof *a; \
609 } \
610 }
611 CHIP_mem_read_region_N(1,u_int8_t)
612 CHIP_mem_read_region_N(2,u_int16_t)
613 CHIP_mem_read_region_N(4,u_int32_t)
614 CHIP_mem_read_region_N(8,u_int64_t)
615
616 inline void
617 __C(CHIP,_mem_write_1)(v, memh, off, val)
618 void *v;
619 bus_space_handle_t memh;
620 bus_size_t off;
621 u_int8_t val;
622 {
623 bus_addr_t addr;
624
625 addr = memh + off;
626 alpha_stb((u_int8_t *)addr, val);
627 alpha_mb();
628 }
629
630 inline void
631 __C(CHIP,_mem_write_2)(v, memh, off, val)
632 void *v;
633 bus_space_handle_t memh;
634 bus_size_t off;
635 u_int16_t val;
636 {
637 bus_addr_t addr;
638
639 addr = memh + off;
640 #ifdef DIAGNOSTIC
641 if (addr & 1)
642 panic(__S(__C(CHIP,_mem_write_2)) ": addr 0x%lx not aligned",
643 addr);
644 #endif
645 alpha_stw((u_int16_t *)addr, val);
646 alpha_mb();
647 }
648
649 inline void
650 __C(CHIP,_mem_write_4)(v, memh, off, val)
651 void *v;
652 bus_space_handle_t memh;
653 bus_size_t off;
654 u_int32_t val;
655 {
656 bus_addr_t addr;
657
658 addr = memh + off;
659 #ifdef DIAGNOSTIC
660 if (addr & 3)
661 panic(__S(__C(CHIP,_mem_write_4)) ": addr 0x%lx not aligned",
662 addr);
663 #endif
664 *(u_int32_t *)addr = val;
665 alpha_mb();
666 }
667
668 inline void
669 __C(CHIP,_mem_write_8)(v, memh, off, val)
670 void *v;
671 bus_space_handle_t memh;
672 bus_size_t off;
673 u_int64_t val;
674 {
675
676 /* XXX XXX XXX */
677 panic("%s not implemented", __S(__C(CHIP,_mem_write_8)));
678 alpha_mb();
679 }
680
681 #define CHIP_mem_write_multi_N(BYTES,TYPE) \
682 void \
683 __C(__C(CHIP,_mem_write_multi_),BYTES)(v, h, o, a, c) \
684 void *v; \
685 bus_space_handle_t h; \
686 bus_size_t o, c; \
687 const TYPE *a; \
688 { \
689 \
690 while (c-- > 0) { \
691 __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, *a++); \
692 __C(CHIP,_mem_barrier)(v, h, o, sizeof *a, \
693 BUS_SPACE_BARRIER_WRITE); \
694 } \
695 }
696 CHIP_mem_write_multi_N(1,u_int8_t)
697 CHIP_mem_write_multi_N(2,u_int16_t)
698 CHIP_mem_write_multi_N(4,u_int32_t)
699 CHIP_mem_write_multi_N(8,u_int64_t)
700
701 #define CHIP_mem_write_region_N(BYTES,TYPE) \
702 void \
703 __C(__C(CHIP,_mem_write_region_),BYTES)(v, h, o, a, c) \
704 void *v; \
705 bus_space_handle_t h; \
706 bus_size_t o, c; \
707 const TYPE *a; \
708 { \
709 \
710 while (c-- > 0) { \
711 __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, *a++); \
712 o += sizeof *a; \
713 } \
714 }
715 CHIP_mem_write_region_N(1,u_int8_t)
716 CHIP_mem_write_region_N(2,u_int16_t)
717 CHIP_mem_write_region_N(4,u_int32_t)
718 CHIP_mem_write_region_N(8,u_int64_t)
719
720 #define CHIP_mem_set_multi_N(BYTES,TYPE) \
721 void \
722 __C(__C(CHIP,_mem_set_multi_),BYTES)(v, h, o, val, c) \
723 void *v; \
724 bus_space_handle_t h; \
725 bus_size_t o, c; \
726 TYPE val; \
727 { \
728 \
729 while (c-- > 0) { \
730 __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, val); \
731 __C(CHIP,_mem_barrier)(v, h, o, sizeof val, \
732 BUS_SPACE_BARRIER_WRITE); \
733 } \
734 }
735 CHIP_mem_set_multi_N(1,u_int8_t)
736 CHIP_mem_set_multi_N(2,u_int16_t)
737 CHIP_mem_set_multi_N(4,u_int32_t)
738 CHIP_mem_set_multi_N(8,u_int64_t)
739
740 #define CHIP_mem_set_region_N(BYTES,TYPE) \
741 void \
742 __C(__C(CHIP,_mem_set_region_),BYTES)(v, h, o, val, c) \
743 void *v; \
744 bus_space_handle_t h; \
745 bus_size_t o, c; \
746 TYPE val; \
747 { \
748 \
749 while (c-- > 0) { \
750 __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, val); \
751 o += sizeof val; \
752 } \
753 }
754 CHIP_mem_set_region_N(1,u_int8_t)
755 CHIP_mem_set_region_N(2,u_int16_t)
756 CHIP_mem_set_region_N(4,u_int32_t)
757 CHIP_mem_set_region_N(8,u_int64_t)
758
759 #define CHIP_mem_copy_region_N(BYTES) \
760 void \
761 __C(__C(CHIP,_mem_copy_region_),BYTES)(v, h1, o1, h2, o2, c) \
762 void *v; \
763 bus_space_handle_t h1, h2; \
764 bus_size_t o1, o2, c; \
765 { \
766 bus_size_t o; \
767 \
768 if ((h1 + o1) >= (h2 + o2)) { \
769 /* src after dest: copy forward */ \
770 for (o = 0; c != 0; c--, o += BYTES) { \
771 __C(__C(CHIP,_mem_write_),BYTES)(v, h2, o2 + o, \
772 __C(__C(CHIP,_mem_read_),BYTES)(v, h1, o1 + o)); \
773 } \
774 } else { \
775 /* dest after src: copy backwards */ \
776 for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES) { \
777 __C(__C(CHIP,_mem_write_),BYTES)(v, h2, o2 + o, \
778 __C(__C(CHIP,_mem_read_),BYTES)(v, h1, o1 + o)); \
779 } \
780 } \
781 }
782 CHIP_mem_copy_region_N(1)
783 CHIP_mem_copy_region_N(2)
784 CHIP_mem_copy_region_N(4)
785 CHIP_mem_copy_region_N(8)
NetBSD on the FriendlyARM MINI2440