sys/arch/alpha/pci/pci_kn8ae.c

   1 /* $NetBSD: pci_kn8ae.c,v 1.23 2009/03/14 15:35:59 dsl Exp $ */
   2
   3 /*
   4  * Copyright (c) 1997 by Matthew Jacob
   5  * NASA AMES Research Center.
   6  * All rights reserved.
   7  *
   8  * Redistribution and use in source and binary forms, with or without
   9  * modification, are permitted provided that the following conditions
  10  * are met:
  11  * 1. Redistributions of source code must retain the above copyright
  12  *    notice immediately at the beginning of the file, without modification,
  13  *    this list of conditions, and the following disclaimer.
  14  * 2. Redistributions in binary form must reproduce the above copyright
  15  *    notice, this list of conditions and the following disclaimer in the
  16  *    documentation and/or other materials provided with the distribution.
  17  * 3. The name of the author may not be used to endorse or promote products
  18  *    derived from this software without specific prior written permission.
  19  *
  20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  21  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  23  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
  24  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  25  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  26  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  27  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  28  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  29  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  30  * SUCH DAMAGE.
  31  */
  32
  33 #include <sys/cdefs.h>                  /* RCS ID & Copyright macro defns */
  34
  35 __KERNEL_RCSID(0, "$NetBSD: pci_kn8ae.c,v 1.23 2009/03/14 15:35:59 dsl Exp $");
  36
  37 #include <sys/types.h>
  38 #include <sys/param.h>
  39 #include <sys/time.h>
  40 #include <sys/systm.h>
  41 #include <sys/errno.h>
  42 #include <sys/malloc.h>
  43 #include <sys/device.h>
  44 #include <sys/syslog.h>
  45
  46 #include <uvm/uvm_extern.h>
  47
  48 #include <machine/autoconf.h>
  49
  50 #include <dev/pci/pcireg.h>
  51 #include <dev/pci/pcivar.h>
  52
  53 #include <alpha/pci/dwlpxreg.h>
  54 #include <alpha/pci/dwlpxvar.h>
  55 #include <alpha/pci/pci_kn8ae.h>
  56
  57 int     dec_kn8ae_intr_map(struct pci_attach_args *,
  58             pci_intr_handle_t *);
  59 const char *dec_kn8ae_intr_string(void *, pci_intr_handle_t);
  60 const struct evcnt *dec_kn8ae_intr_evcnt(void *, pci_intr_handle_t);
  61 void    *dec_kn8ae_intr_establish(void *, pci_intr_handle_t,
  62             int, int (*func)(void *), void *);
  63 void    dec_kn8ae_intr_disestablish(void *, void *);
  64
  65 static u_int32_t imaskcache[DWLPX_NIONODE][DWLPX_NHOSE][NHPC];
  66
  67 void    kn8ae_spurious(void *, u_long);
  68 void    kn8ae_enadis_intr(struct dwlpx_config *, pci_intr_handle_t, int);
  69
  70 void
  71 pci_kn8ae_pickintr(struct dwlpx_config *ccp, int first)
  72 {
  73         int io, hose, dev;
  74         pci_chipset_tag_t pc = &ccp->cc_pc;
  75
  76         pc->pc_intr_v = ccp;
  77         pc->pc_intr_map = dec_kn8ae_intr_map;
  78         pc->pc_intr_string = dec_kn8ae_intr_string;
  79         pc->pc_intr_evcnt = dec_kn8ae_intr_evcnt;
  80         pc->pc_intr_establish = dec_kn8ae_intr_establish;
  81         pc->pc_intr_disestablish = dec_kn8ae_intr_disestablish;
  82
  83         /* Not supported on KN8AE. */
  84         pc->pc_pciide_compat_intr_establish = NULL;
  85
  86         if (!first) {
  87                 return;
  88         }
  89
  90         for (io = 0; io < DWLPX_NIONODE; io++) {
  91                 for (hose = 0; hose < DWLPX_NHOSE; hose++) {
  92                         for (dev = 0; dev < NHPC; dev++) {
  93                                 imaskcache[io][hose][dev] = DWLPX_IMASK_DFLT;
  94                         }
  95                 }
  96         }
  97 }
  98
  99 #define IH_MAKE(vec, dev, pin)                                          \
 100         ((vec) | ((dev) << 16) | ((pin) << 24))
 101
 102 #define IH_VEC(ih)      ((ih) & 0xffff)
 103 #define IH_DEV(ih)      (((ih) >> 16) & 0xff)
 104 #define IH_PIN(ih)      (((ih) >> 24) & 0xff)
 105
 106 int
 107 dec_kn8ae_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
 108 {
 109         pcitag_t bustag = pa->pa_intrtag;
 110         int buspin = pa->pa_intrpin;
 111         pci_chipset_tag_t pc = pa->pa_pc;
 112         int device;
 113         u_long vec;
 114
 115         if (buspin == 0) {
 116                 /* No IRQ used. */
 117                 return 1;
 118         }
 119         if (buspin > 4) {
 120                 printf("dec_kn8ae_intr_map: bad interrupt pin %d\n", buspin);
 121                 return 1;
 122         }
 123         pci_decompose_tag(pc, bustag, NULL, &device, NULL);
 124
 125         vec = scb_alloc(kn8ae_spurious, NULL);
 126         if (vec == SCB_ALLOC_FAILED) {
 127                 printf("dec_kn8ae_intr_map: no vector available for "
 128                     "device %d pin %d\n", device, buspin);
 129                 return 1;
 130         }
 131
 132         *ihp = IH_MAKE(vec, device, buspin);
 133
 134         return (0);
 135 }
 136
 137 const char *
 138 dec_kn8ae_intr_string(void *ccv, pci_intr_handle_t ih)
 139 {
 140         static char irqstr[64];
 141
 142         sprintf(irqstr, "vector 0x%lx", IH_VEC(ih));
 143
 144         return (irqstr);
 145 }
 146
 147 const struct evcnt *
 148 dec_kn8ae_intr_evcnt(void *ccv, pci_intr_handle_t ih)
 149 {
 150
 151         /* XXX for now, no evcnt parent reported */
 152         return (NULL);
 153 }
 154
 155 void *
 156 dec_kn8ae_intr_establish(ccv, ih, level, func, arg)
 157         void *ccv;
 158         pci_intr_handle_t ih;
 159         int level;
 160         int (*func)(void *);
 161         void *arg;
 162 {
 163         struct dwlpx_config *ccp = ccv;
 164         void *cookie;
 165         struct scbvec *scb;
 166         u_long vec;
 167         int pin, device, hpc;
 168
 169         device = IH_DEV(ih);
 170         pin = IH_PIN(ih);
 171         vec = IH_VEC(ih);
 172
 173         scb = &scb_iovectab[SCB_VECTOIDX(vec - SCB_IOVECBASE)];
 174
 175         if (scb->scb_func != kn8ae_spurious) {
 176                 printf("dec_kn8ae_intr_establish: vector 0x%lx not mapped\n",
 177                     vec);
 178                 return (NULL);
 179         }
 180
 181         /*
 182          * NOTE: The PCIA hardware doesn't support interrupt sharing,
 183          * so we don't have to worry about it (in theory, at least).
 184          */
 185
 186         scb->scb_arg = arg;
 187         alpha_mb();
 188         scb->scb_func = (void (*)(void *, u_long))func;
 189         alpha_mb();
 190
 191         if (device < 4) {
 192                 hpc = 0;
 193         } else if (device < 8) {
 194                 device -= 4;
 195                 hpc = 1;
 196         } else {
 197                 device -= 8;
 198                 hpc = 2;
 199         }
 200         REGVAL(PCIA_DEVVEC(hpc, device, pin) + ccp->cc_sysbase) = vec;
 201
 202         kn8ae_enadis_intr(ccp, ih, 1);
 203
 204         cookie = (void *) ih;
 205
 206         return (cookie);
 207 }
 208
 209 void
 210 dec_kn8ae_intr_disestablish(void *ccv, void *cookie)
 211 {
 212         struct dwlpx_config *ccp = ccv;
 213         pci_intr_handle_t ih = (u_long) cookie;
 214         struct scbvec *scb;
 215         u_long vec;
 216
 217         vec = IH_VEC(ih);
 218
 219         scb = &scb_iovectab[SCB_VECTOIDX(vec - SCB_IOVECBASE)];
 220
 221         kn8ae_enadis_intr(ccp, ih, 0);
 222
 223         scb_free(vec);
 224 }
 225
 226 void
 227 kn8ae_spurious(void *arg, u_long vec)
 228 {
 229         printf("Spurious interrupt on temporary interrupt vector 0x%lx\n", vec);
 230 }
 231
 232 void
 233 kn8ae_enadis_intr(struct dwlpx_config *ccp, pci_intr_handle_t irq, int onoff)
 234 {
 235         struct dwlpx_softc *sc = ccp->cc_sc;
 236         unsigned long paddr;
 237         u_int32_t val;
 238         int ionode, hose, device, hpc, busp, s;
 239
 240         ionode = sc->dwlpx_node - 4;
 241         hose = sc->dwlpx_hosenum;
 242
 243         device = IH_DEV(irq);
 244         busp = (1 << (IH_PIN(irq) - 1));
 245
 246         paddr = (1LL << 39);
 247         paddr |= (unsigned long) ionode << 36;
 248         paddr |= (unsigned long) hose << 34;
 249
 250         if (device < 4) {
 251                 hpc = 0;
 252         } else if (device < 8) {
 253                 hpc = 1;
 254                 device -= 4;
 255         } else {
 256                 hpc = 2;
 257                 device -= 8;
 258         }
 259         busp <<= (device << 2);
 260         val = imaskcache[ionode][hose][hpc];
 261         if (onoff)
 262                 val |= busp;
 263         else
 264                 val &= ~busp;
 265         imaskcache[ionode][hose][hpc] = val;
 266 #if     0
 267         printf("kn8ae_%s_intr: irq %lx imsk 0x%x hpc %d TLSB node %d hose %d\n",
 268             onoff? "enable" : "disable", irq, val, hpc, ionode + 4, hose);
 269 #endif
 270         s = splhigh();
 271         REGVAL(PCIA_IMASK(hpc) + paddr) = val;
 272         alpha_mb();
 273         (void) splx(s);
 274 }