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[netbsd-mini2440.git] / sys / arch / alpha / pci / tsc.c
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1 /* $NetBSD: tsc.c,v 1.15 2009/03/14 15:35:59 dsl Exp $ */
3 /*-
4 * Copyright (c) 1999 by Ross Harvey. All rights reserved.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by Ross Harvey.
17 * 4. The name of Ross Harvey may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY ROSS HARVEY ``AS IS'' AND ANY EXPRESS
21 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
22 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP0SE
23 * ARE DISCLAIMED. IN NO EVENT SHALL ROSS HARVEY BE LIABLE FOR ANY
24 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
34 #include "opt_dec_6600.h"
36 #include <sys/cdefs.h>
38 __KERNEL_RCSID(0, "$NetBSD: tsc.c,v 1.15 2009/03/14 15:35:59 dsl Exp $");
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/device.h>
43 #include <sys/malloc.h>
45 #include <machine/autoconf.h>
46 #include <machine/rpb.h>
47 #include <machine/sysarch.h>
49 #include <dev/isa/isareg.h>
50 #include <dev/isa/isavar.h>
51 #include <dev/pci/pcireg.h>
52 #include <dev/pci/pcivar.h>
53 #include <alpha/pci/tsreg.h>
54 #include <alpha/pci/tsvar.h>
56 #ifdef DEC_6600
57 #include <alpha/pci/pci_6600.h>
58 #endif
60 #define tsc() { Generate ctags(1) key. }
62 int tscmatch(struct device *, struct cfdata *, void *);
63 void tscattach(struct device *, struct device *, void *);
65 CFATTACH_DECL(tsc, sizeof(struct tsc_softc),
66 tscmatch, tscattach, NULL, NULL);
68 extern struct cfdriver tsc_cd;
70 struct tsp_config tsp_configuration[2];
72 static int tscprint(void *, const char *pnp);
74 int tspmatch(struct device *, struct cfdata *, void *);
75 void tspattach(struct device *, struct device *, void *);
77 CFATTACH_DECL(tsp, sizeof(struct tsp_softc),
78 tspmatch, tspattach, NULL, NULL);
80 extern struct cfdriver tsp_cd;
82 static int tsp_bus_get_window(int, int,
83 struct alpha_bus_space_translation *);
85 /* There can be only one */
86 static int tscfound;
88 /* Which hose is the display console connected to? */
89 int tsp_console_hose;
91 int
92 tscmatch(struct device *parent, struct cfdata *match, void *aux)
94 struct mainbus_attach_args *ma = aux;
96 return cputype == ST_DEC_6600
97 && strcmp(ma->ma_name, tsc_cd.cd_name) == 0
98 && !tscfound;
101 void tscattach(parent, self, aux)
102 struct device *parent, *self;
103 void *aux;
105 int i;
106 int nbus;
107 u_int64_t csc, aar;
108 struct tsp_attach_args tsp;
109 struct mainbus_attach_args *ma = aux;
111 tscfound = 1;
113 csc = LDQP(TS_C_CSC);
115 nbus = 1 + (CSC_BC(csc) >= 2);
116 printf(": 21272 Core Logic Chipset, Cchip rev %d\n"
117 "%s%d: %c Dchips, %d memory bus%s of %d bytes\n",
118 (int)MISC_REV(LDQP(TS_C_MISC)),
119 ma->ma_name, ma->ma_slot, "2448"[CSC_BC(csc)],
120 nbus, nbus > 1 ? "es" : "", 16 + 16 * ((csc & CSC_AW) != 0));
121 printf("%s%d: arrays present: ", ma->ma_name, ma->ma_slot);
122 for(i = 0; i < 4; ++i) {
123 aar = LDQP(TS_C_AAR0 + i * TS_STEP);
124 printf("%s%dMB%s", i ? ", " : "", (8 << AAR_ASIZ(aar)) & ~0xf,
125 aar & AAR_SPLIT ? " (split)" : "");
127 printf(", Dchip 0 rev %d\n", (int)LDQP(TS_D_DREV) & 0xf);
129 memset(&tsp, 0, sizeof tsp);
130 tsp.tsp_name = "tsp";
131 config_found(self, &tsp, NULL);
133 if(LDQP(TS_C_CSC) & CSC_P1P) {
134 ++tsp.tsp_slot;
135 config_found(self, &tsp, tscprint);
139 static int
140 tscprint(void *aux, const char *p)
142 register struct tsp_attach_args *tsp = aux;
144 if(p)
145 aprint_normal("%s%d at %s", tsp->tsp_name, tsp->tsp_slot, p);
146 return UNCONF;
149 #define tsp() { Generate ctags(1) key. }
152 tspmatch(struct device *parent, struct cfdata *match, void *aux)
154 struct tsp_attach_args *t = aux;
156 return cputype == ST_DEC_6600
157 && strcmp(t->tsp_name, tsp_cd.cd_name) == 0;
160 void
161 tspattach(struct device *parent, struct device *self, void *aux)
163 struct pcibus_attach_args pba;
164 struct tsp_attach_args *t = aux;
165 struct tsp_config *pcp;
167 printf("\n");
168 pcp = tsp_init(1, t->tsp_slot);
170 tsp_dma_init(pcp);
173 * Do PCI memory initialization that needs to be deferred until
174 * malloc is safe. On the Tsunami, we need to do this after
175 * DMA is initialized, as well.
177 tsp_bus_mem_init2(&pcp->pc_memt, pcp);
179 pci_6600_pickintr(pcp);
181 pba.pba_iot = &pcp->pc_iot;
182 pba.pba_memt = &pcp->pc_memt;
183 pba.pba_dmat =
184 alphabus_dma_get_tag(&pcp->pc_dmat_direct, ALPHA_BUS_PCI);
185 pba.pba_dmat64 = NULL;
186 pba.pba_pc = &pcp->pc_pc;
187 pba.pba_bus = 0;
188 pba.pba_bridgetag = NULL;
189 pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED |
190 PCI_FLAGS_MRL_OKAY | PCI_FLAGS_MRM_OKAY | PCI_FLAGS_MWI_OKAY;
191 config_found_ia(self, "pcibus", &pba, pcibusprint);
194 struct tsp_config *
195 tsp_init(int mallocsafe, int n)
196 /* n: Pchip number */
198 struct tsp_config *pcp;
200 KASSERT((n | 1) == 1);
201 pcp = &tsp_configuration[n];
202 pcp->pc_pslot = n;
203 pcp->pc_iobase = TS_Pn(n, 0);
204 pcp->pc_csr = S_PAGE(TS_Pn(n, P_CSRBASE));
205 if (!pcp->pc_initted) {
206 tsp_bus_io_init(&pcp->pc_iot, pcp);
207 tsp_bus_mem_init(&pcp->pc_memt, pcp);
209 alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_IO] = 1;
210 alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_MEM] = 1;
212 alpha_bus_get_window = tsp_bus_get_window;
214 pcp->pc_mallocsafe = mallocsafe;
215 tsp_pci_init(&pcp->pc_pc, pcp);
216 pcp->pc_initted = 1;
217 return pcp;
220 static int
221 tsp_bus_get_window(int type, int window, struct alpha_bus_space_translation *abst)
223 struct tsp_config *tsp = &tsp_configuration[tsp_console_hose];
224 bus_space_tag_t st;
225 int error;
227 switch (type) {
228 case ALPHA_BUS_TYPE_PCI_IO:
229 st = &tsp->pc_iot;
230 break;
232 case ALPHA_BUS_TYPE_PCI_MEM:
233 st = &tsp->pc_memt;
234 break;
236 default:
237 panic("tsp_bus_get_window");
240 error = alpha_bus_space_get_window(st, window, abst);
241 if (error)
242 return (error);
244 abst->abst_sys_start = TS_PHYSADDR(abst->abst_sys_start);
245 abst->abst_sys_end = TS_PHYSADDR(abst->abst_sys_end);
247 return (0);