sys/arch/alpha/tc/tc_3000_300.c

   1 /* $NetBSD: tc_3000_300.c,v 1.29 2009/03/14 15:36:00 dsl Exp $ */
   2
   3 /*
   4  * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
   5  * All rights reserved.
   6  *
   7  * Author: Chris G. Demetriou
   8  *
   9  * Permission to use, copy, modify and distribute this software and
  10  * its documentation is hereby granted, provided that both the copyright
  11  * notice and this permission notice appear in all copies of the
  12  * software, derivative works or modified versions, and any portions
  13  * thereof, and that both notices appear in supporting documentation.
  14  *
  15  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
  16  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
  17  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
  18  *
  19  * Carnegie Mellon requests users of this software to return to
  20  *
  21  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
  22  *  School of Computer Science
  23  *  Carnegie Mellon University
  24  *  Pittsburgh PA 15213-3890
  25  *
  26  * any improvements or extensions that they make and grant Carnegie the
  27  * rights to redistribute these changes.
  28  */
  29
  30 #include <sys/cdefs.h>                  /* RCS ID & Copyright macro defns */
  31
  32 __KERNEL_RCSID(0, "$NetBSD: tc_3000_300.c,v 1.29 2009/03/14 15:36:00 dsl Exp $");
  33
  34 #include <sys/param.h>
  35 #include <sys/systm.h>
  36 #include <sys/device.h>
  37 #include <sys/malloc.h>
  38
  39 #include <machine/autoconf.h>
  40 #include <machine/pte.h>
  41
  42 #include <dev/tc/tcvar.h>
  43 #include <dev/tc/ioasicreg.h>
  44 #include <alpha/tc/tc_conf.h>
  45 #include <alpha/tc/tc_3000_300.h>
  46
  47 #include "wsdisplay.h"
  48 #include "sfb.h"
  49
  50 #if NSFB > 0
  51 extern int      sfb_cnattach(tc_addr_t);
  52 #endif
  53
  54 int     tc_3000_300_intrnull(void *);
  55
  56 #define C(x)    ((void *)(u_long)x)
  57 #define KV(x)   (ALPHA_PHYS_TO_K0SEG(x))
  58
  59 /*
  60  * We have to read and modify the IOASIC registers directly, because
  61  * the TC option slot interrupt request and mask bits are stored there,
  62  * and the ioasic code isn't initted when we need to frob some interrupt
  63  * bits.
  64  */
  65 #define DEC_3000_300_IOASIC_ADDR        KV(0x1a0000000)
  66
  67 struct tc_slotdesc tc_3000_300_slots[] = {
  68         { KV(0x100000000), C(TC_3000_300_DEV_OPT0), },  /* 0 - opt slot 0 */
  69         { KV(0x120000000), C(TC_3000_300_DEV_OPT1), },  /* 1 - opt slot 1 */
  70         { KV(0x140000000), C(TC_3000_300_DEV_BOGUS), }, /* 2 - unused */
  71         { KV(0x160000000), C(TC_3000_300_DEV_BOGUS), }, /* 3 - unused */
  72         { KV(0x180000000), C(TC_3000_300_DEV_BOGUS), }, /* 4 - TCDS ASIC */
  73         { KV(0x1a0000000), C(TC_3000_300_DEV_BOGUS), }, /* 5 - IOCTL ASIC */
  74         { KV(0x1c0000000), C(TC_3000_300_DEV_BOGUS), }, /* 6 - CXTurbo */
  75 };
  76 int tc_3000_300_nslots =
  77     sizeof(tc_3000_300_slots) / sizeof(tc_3000_300_slots[0]);
  78
  79 struct tc_builtin tc_3000_300_builtins[] = {
  80         { "PMAGB-BA",   6, 0x02000000, C(TC_3000_300_DEV_CXTURBO),      },
  81         { "FLAMG-IO",   5, 0x00000000, C(TC_3000_300_DEV_IOASIC),       },
  82         { "PMAZ-DS ",   4, 0x00000000, C(TC_3000_300_DEV_TCDS),         },
  83 };
  84 int tc_3000_300_nbuiltins =
  85     sizeof(tc_3000_300_builtins) / sizeof(tc_3000_300_builtins[0]);
  86
  87 struct tcintr {
  88         int     (*tci_func)(void *);
  89         void    *tci_arg;
  90         struct evcnt tci_evcnt;
  91 } tc_3000_300_intr[TC_3000_300_NCOOKIES];
  92
  93 void
  94 tc_3000_300_intr_setup()
  95 {
  96         volatile u_int32_t *imskp;
  97         char *cp;
  98         u_long i;
  99
 100         /*
 101          * Disable all interrupts that we can (can't disable builtins).
 102          */
 103         imskp = (volatile u_int32_t *)(DEC_3000_300_IOASIC_ADDR + IOASIC_IMSK);
 104         *imskp &= ~(IOASIC_INTR_300_OPT0 | IOASIC_INTR_300_OPT1);
 105
 106         /*
 107          * Set up interrupt handlers.
 108          */
 109         for (i = 0; i < TC_3000_300_NCOOKIES; i++) {
 110                 tc_3000_300_intr[i].tci_func = tc_3000_300_intrnull;
 111                 tc_3000_300_intr[i].tci_arg = (void *)i;
 112
 113                 cp = malloc(12, M_DEVBUF, M_NOWAIT);
 114                 if (cp == NULL)
 115                         panic("tc_3000_300_intr_setup");
 116                 sprintf(cp, "slot %lu", i);
 117                 evcnt_attach_dynamic(&tc_3000_300_intr[i].tci_evcnt,
 118                     EVCNT_TYPE_INTR, NULL, "tc", cp);
 119         }
 120 }
 121
 122 const struct evcnt *
 123 tc_3000_300_intr_evcnt(struct device *tcadev, void *cookie)
 124 {
 125         u_long dev = (u_long)cookie;
 126
 127 #ifdef DIAGNOSTIC
 128         /* XXX bounds-check cookie. */
 129 #endif
 130
 131         return (&tc_3000_300_intr[dev].tci_evcnt);
 132 }
 133
 134 void
 135 tc_3000_300_intr_establish(struct device *tcadev, void *cookie, tc_intrlevel_t level, int (*func)(void *), void *arg)
 136 {
 137         volatile u_int32_t *imskp;
 138         u_long dev = (u_long)cookie;
 139
 140 #ifdef DIAGNOSTIC
 141         /* XXX bounds-check cookie. */
 142 #endif
 143
 144         if (tc_3000_300_intr[dev].tci_func != tc_3000_300_intrnull)
 145                 panic("tc_3000_300_intr_establish: cookie %lu twice", dev);
 146
 147         tc_3000_300_intr[dev].tci_func = func;
 148         tc_3000_300_intr[dev].tci_arg = arg;
 149
 150         imskp = (volatile u_int32_t *)(DEC_3000_300_IOASIC_ADDR + IOASIC_IMSK);
 151         switch (dev) {
 152         case TC_3000_300_DEV_OPT0:
 153                 *imskp |= IOASIC_INTR_300_OPT0;
 154                 break;
 155         case TC_3000_300_DEV_OPT1:
 156                 *imskp |= IOASIC_INTR_300_OPT1;
 157                 break;
 158         default:
 159                 /* interrupts for builtins always enabled */
 160                 break;
 161         }
 162 }
 163
 164 void
 165 tc_3000_300_intr_disestablish(struct device *tcadev, void *cookie)
 166 {
 167         volatile u_int32_t *imskp;
 168         u_long dev = (u_long)cookie;
 169
 170 #ifdef DIAGNOSTIC
 171         /* XXX bounds-check cookie. */
 172 #endif
 173
 174         if (tc_3000_300_intr[dev].tci_func == tc_3000_300_intrnull)
 175                 panic("tc_3000_300_intr_disestablish: cookie %lu bad intr",
 176                     dev);
 177
 178         imskp = (volatile u_int32_t *)(DEC_3000_300_IOASIC_ADDR + IOASIC_IMSK);
 179         switch (dev) {
 180         case TC_3000_300_DEV_OPT0:
 181                 *imskp &= ~IOASIC_INTR_300_OPT0;
 182                 break;
 183         case TC_3000_300_DEV_OPT1:
 184                 *imskp &= ~IOASIC_INTR_300_OPT1;
 185                 break;
 186         default:
 187                 /* interrupts for builtins always enabled */
 188                 break;
 189         }
 190
 191         tc_3000_300_intr[dev].tci_func = tc_3000_300_intrnull;
 192         tc_3000_300_intr[dev].tci_arg = (void *)dev;
 193 }
 194
 195 int
 196 tc_3000_300_intrnull(void *val)
 197 {
 198
 199         panic("tc_3000_300_intrnull: uncaught TC intr for cookie %ld",
 200             (u_long)val);
 201 }
 202
 203 void
 204 tc_3000_300_iointr(void *arg, unsigned long vec)
 205 {
 206         u_int32_t tcir, ioasicir, ioasicimr;
 207         int ifound;
 208
 209 #ifdef DIAGNOSTIC
 210         int s;
 211         if (vec != 0x800)
 212                 panic("INVALID ASSUMPTION: vec 0x%lx, not 0x800", vec);
 213         s = splhigh();
 214         if (s != ALPHA_PSL_IPL_IO)
 215                 panic("INVALID ASSUMPTION: IPL %d, not %d", s,
 216                     ALPHA_PSL_IPL_IO);
 217         splx(s);
 218 #endif
 219
 220         do {
 221                 tc_syncbus();
 222
 223                 /* find out what interrupts/errors occurred */
 224                 tcir = *(volatile u_int32_t *)TC_3000_300_IR;
 225                 ioasicir = *(volatile u_int32_t *)
 226                     (DEC_3000_300_IOASIC_ADDR + IOASIC_INTR);
 227                 ioasicimr = *(volatile u_int32_t *)
 228                     (DEC_3000_300_IOASIC_ADDR + IOASIC_IMSK);
 229                 tc_mb();
 230
 231                 /* Ignore interrupts that aren't enabled out. */
 232                 ioasicir &= ioasicimr;
 233
 234                 /* clear the interrupts/errors we found. */
 235                 *(volatile u_int32_t *)TC_3000_300_IR = tcir;
 236                 /* XXX can't clear TC option slot interrupts here? */
 237                 tc_wmb();
 238
 239                 ifound = 0;
 240
 241 #define INCRINTRCNT(slot)       tc_3000_300_intr[slot].tci_evcnt.ev_count++
 242
 243 #define CHECKINTR(slot, flag)                                           \
 244                 if (flag) {                                             \
 245                         ifound = 1;                                     \
 246                         INCRINTRCNT(slot);                              \
 247                         (*tc_3000_300_intr[slot].tci_func)              \
 248                             (tc_3000_300_intr[slot].tci_arg);           \
 249                 }
 250                 /* Do them in order of priority; highest slot # first. */
 251                 CHECKINTR(TC_3000_300_DEV_CXTURBO,
 252                     tcir & TC_3000_300_IR_CXTURBO);
 253                 CHECKINTR(TC_3000_300_DEV_IOASIC,
 254                     (tcir & TC_3000_300_IR_IOASIC) &&
 255                     (ioasicir & ~(IOASIC_INTR_300_OPT1|IOASIC_INTR_300_OPT0)));
 256                 CHECKINTR(TC_3000_300_DEV_TCDS, tcir & TC_3000_300_IR_TCDS);
 257                 CHECKINTR(TC_3000_300_DEV_OPT1,
 258                     ioasicir & IOASIC_INTR_300_OPT1);
 259                 CHECKINTR(TC_3000_300_DEV_OPT0,
 260                     ioasicir & IOASIC_INTR_300_OPT0);
 261 #undef CHECKINTR
 262
 263 #ifdef DIAGNOSTIC
 264 #define PRINTINTR(msg, bits)                                            \
 265         if (tcir & bits)                                                \
 266                 printf(msg);
 267                 PRINTINTR("BCache tag parity error\n",
 268                     TC_3000_300_IR_BCTAGPARITY);
 269                 PRINTINTR("TC overrun error\n", TC_3000_300_IR_TCOVERRUN);
 270                 PRINTINTR("TC I/O timeout\n", TC_3000_300_IR_TCTIMEOUT);
 271                 PRINTINTR("Bcache parity error\n",
 272                     TC_3000_300_IR_BCACHEPARITY);
 273                 PRINTINTR("Memory parity error\n", TC_3000_300_IR_MEMPARITY);
 274 #undef PRINTINTR
 275 #endif
 276         } while (ifound);
 277 }
 278
 279 #if NWSDISPLAY > 0
 280 /*
 281  * tc_3000_300_fb_cnattach --
 282  *      Attempt to map the CTB output device to a slot and attach the
 283  * framebuffer as the output side of the console.
 284  */
 285 int
 286 tc_3000_300_fb_cnattach(u_int64_t turbo_slot)
 287 {
 288         u_int32_t output_slot;
 289
 290         output_slot = turbo_slot & 0xffffffff;
 291
 292         if (output_slot >= tc_3000_300_nslots) {
 293                 return EINVAL;
 294         }
 295
 296         if (output_slot == 0) {
 297 #if NSFB > 0
 298                 sfb_cnattach(KV(0x1c0000000) + 0x02000000);
 299                 return 0;
 300 #else
 301                 return ENXIO;
 302 #endif
 303         }
 304
 305         return tc_fb_cnattach(tc_3000_300_slots[output_slot-1].tcs_addr);
 306 }
 307 #endif /* NWSDISPLAY */