sys/arch/alpha/tc/tc_3000_300.h

   1 /* $NetBSD: tc_3000_300.h,v 1.4 1998/10/22 01:03:09 briggs Exp $ */
   2
   3 /*
   4  * Copyright (c) 1994, 1995 Carnegie-Mellon University.
   5  * All rights reserved.
   6  *
   7  * Author: Chris G. Demetriou
   8  *
   9  * Permission to use, copy, modify and distribute this software and
  10  * its documentation is hereby granted, provided that both the copyright
  11  * notice and this permission notice appear in all copies of the
  12  * software, derivative works or modified versions, and any portions
  13  * thereof, and that both notices appear in supporting documentation.
  14  *
  15  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
  16  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
  17  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
  18  *
  19  * Carnegie Mellon requests users of this software to return to
  20  *
  21  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
  22  *  School of Computer Science
  23  *  Carnegie Mellon University
  24  *  Pittsburgh PA 15213-3890
  25  *
  26  * any improvements or extensions that they make and grant Carnegie the
  27  * rights to redistribute these changes.
  28  */
  29
  30 /*
  31  * TurboChannel-specific functions and structures for 3000_500.
  32  */
  33
  34 /*
  35  * TURBOchannel Interface Registers.
  36  */
  37 #define TC_3000_300_IR                  KV(0x00000001e0000000)  /* Dense */
  38 #define TC_3000_300_CSR                 KV(0x00000001e0000008)  /* Dense */
  39 #define TC_3000_300_MCR                 KV(0x00000001e0000010)  /* Dense */
  40 #define TC_3000_300_LED                 KV(0x00000001e0000018)  /* Dense */
  41
  42 /* Interrupt bits. */
  43 #define TC_3000_300_IR_CXTURBO          0x00000004      /* TC CXTURBO */
  44 #define TC_3000_300_IR_TCDS             0x00000008      /* TC Dual SCSI */
  45 #define TC_3000_300_IR_IOASIC           0x00000010      /* TC IOASIC */
  46 #define TC_3000_300_IR_BCTAGPARITY      0x08000000      /* BC tag par. err. */
  47 #define TC_3000_300_IR_TCOVERRUN        0x10000000      /* TC overrun */
  48 #define TC_3000_300_IR_TCTIMEOUT        0x20000000      /* TC timeout on I/O */
  49 #define TC_3000_300_IR_BCACHEPARITY     0x40000000      /* Bcache par. err. */
  50 #define TC_3000_300_IR_MEMPARITY        0x80000000      /* Memory par. err. */
  51
  52 /* Device number "cookies." */
  53 #define TC_3000_300_DEV_OPT0    0
  54 #define TC_3000_300_DEV_OPT1    1
  55 #define TC_3000_300_DEV_TCDS    2
  56 #define TC_3000_300_DEV_IOASIC  3
  57 #define TC_3000_300_DEV_CXTURBO 4
  58
  59 #define TC_3000_300_DEV_BOGUS   -1
  60
  61 #define TC_3000_300_NCOOKIES    5
  62
  63 extern int      tc_3000_300_fb_cnattach(u_int64_t);