1 /* $NetBSD: isa_machdep.h,v 1.13 2006/06/12 15:39:01 tsutsui Exp $ */
2 /* $OpenBSD: isa_machdep.h,v 1.5 1997/04/19 17:20:00 pefo Exp $ */
5 * Copyright (c) 1996 Per Fogelstrom
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by Per Fogelstrom
19 * 4. The name of the author may not be used to endorse or promote products
20 * derived from this software without specific prior written permission
22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 #ifndef _ISA_MACHDEP_H_
34 #define _ISA_MACHDEP_H_
36 #include <dev/isa/isadmavar.h>
38 typedef struct arc_isa_bus
*isa_chipset_tag_t
;
41 * I/O macros to access isa bus ports/memory.
42 * At the first glance theese macros may seem inefficient.
43 * However, the CPU executes an instruction every 7.5ns
44 * so the bus is much slower so it doesn't matter, really.
46 #define isa_outb(x,y) outb(arc_bus_io.bs_vbase + (x)- arc_bus_io.bs_start, y)
47 #define isa_inb(x) inb(arc_bus_io.bs_vbase + (x) - arc_bus_io.bs_start)
52 struct isa_dma_state ic_dmastate
;
54 void (*ic_attach_hook
)(struct device
*, struct device
*,
55 struct isabus_attach_args
*);
56 const struct evcnt
*(*ic_intr_evcnt
)(isa_chipset_tag_t
, int);
57 void *(*ic_intr_establish
)(isa_chipset_tag_t
, int, int, int,
58 int (*)(void *), void *);
59 void (*ic_intr_disestablish
)(isa_chipset_tag_t
, void *);
60 void (*ic_detach_hook
)(isa_chipset_tag_t
, device_t
);
65 * Functions provided to machine-independent ISA code.
67 #define isa_attach_hook(p, s, a) /* \
68 (*(a)->iba_ic->ic_attach_hook)((p), (s), (a)) */
69 #define isa_detach_hook(c, s) \
70 (*(c)->ic_detach_hook)((c), (s))
71 #define isa_intr_evcnt(c, i) \
72 (*(c)->ic_intr_evcnt)((c)->ic_data, (i))
73 #define isa_intr_establish(c, i, t, l, f, a) \
74 (*(c)->ic_intr_establish)((c)->ic_data, (i), (t), (l), (f), (a))
75 #define isa_intr_disestablish(c, h) \
76 (*(c)->ic_intr_disestablish)((c)->ic_data, (h))
78 #define isa_dmainit(ic, bst, dmat, d) \
79 _isa_dmainit(&(ic)->ic_dmastate, (bst), (dmat), (d))
80 #define isa_dmadestroy(ic) \
81 _isa_dmadestroy(&(ic)->ic_dmastate)
82 #define isa_dmacascade(ic, c) \
83 _isa_dmacascade(&(ic)->ic_dmastate, (c))
84 #define isa_dmamaxsize(ic, c) \
85 _isa_dmamaxsize(&(ic)->ic_dmastate, (c))
86 #define isa_dmamap_create(ic, c, s, f) \
87 _isa_dmamap_create(&(ic)->ic_dmastate, (c), (s), (f))
88 #define isa_dmamap_destroy(ic, c) \
89 _isa_dmamap_destroy(&(ic)->ic_dmastate, (c))
90 #define isa_dmastart(ic, c, a, n, p, f, bf) \
91 _isa_dmastart(&(ic)->ic_dmastate, (c), (a), (n), (p), (f), (bf))
92 #define isa_dmaabort(ic, c) \
93 _isa_dmaabort(&(ic)->ic_dmastate, (c))
94 #define isa_dmacount(ic, c) \
95 _isa_dmacount(&(ic)->ic_dmastate, (c))
96 #define isa_dmafinished(ic, c) \
97 _isa_dmafinished(&(ic)->ic_dmastate, (c))
98 #define isa_dmadone(ic, c) \
99 _isa_dmadone(&(ic)->ic_dmastate, (c))
100 #define isa_dmafreeze(ic) \
101 _isa_dmafreeze(&(ic)->ic_dmastate)
102 #define isa_dmathaw(ic) \
103 _isa_dmathaw(&(ic)->ic_dmastate)
104 #define isa_dmamem_alloc(ic, c, s, ap, f) \
105 _isa_dmamem_alloc(&(ic)->ic_dmastate, (c), (s), (ap), (f))
106 #define isa_dmamem_free(ic, c, a, s) \
107 _isa_dmamem_free(&(ic)->ic_dmastate, (c), (a), (s))
108 #define isa_dmamem_map(ic, c, a, s, kp, f) \
109 _isa_dmamem_map(&(ic)->ic_dmastate, (c), (a), (s), (kp), (f))
110 #define isa_dmamem_unmap(ic, c, k, s) \
111 _isa_dmamem_unmap(&(ic)->ic_dmastate, (c), (k), (s))
112 #define isa_dmamem_mmap(ic, c, a, s, o, p, f) \
113 _isa_dmamem_mmap(&(ic)->ic_dmastate, (c), (a), (s), (o), (p), (f))
114 #define isa_drq_alloc(ic, c) \
115 _isa_drq_alloc(&(ic)->ic_dmastate, c)
116 #define isa_drq_free(ic, c) \
117 _isa_drq_free(&(ic)->ic_dmastate, c)
118 #define isa_drq_isfree(ic, c) \
119 _isa_drq_isfree(&(ic)->ic_dmastate, (c))
120 #define isa_malloc(ic, c, s, p, f) \
121 _isa_malloc(&(ic)->ic_dmastate, (c), (s), (p), (f))
122 #define isa_free(a, p) \
124 #define isa_mappage(m, o, p) \
125 _isa_mappage((m), (o), (p))
127 int isa_intr_alloc(isa_chipset_tag_t
, int, int, int *);
129 void sysbeepstop(void *);
130 void sysbeep(int, int);
134 * Interrupt control struct used to control the ICU setup.
137 struct isa_intrhand
{
138 struct isa_intrhand
*ih_next
;
139 int (*ih_fun
)(void *);
144 struct evcnt ih_evcnt
;
148 #endif /* _ISA_MACHDEP_H_ */