sys/arch/arc/jazz/pica.h

   1 /*      $NetBSD: pica.h,v 1.2 2001/06/13 15:11:38 soda Exp $    */
   2 /*      $OpenBSD: pica.h,v 1.4 1996/09/14 15:58:28 pefo Exp $ */
   3
   4 /*
   5  * Copyright (c) 1994, 1995, 1996 Per Fogelstrom
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  * 3. All advertising materials mentioning features or use of this software
  16  *    must display the following acknowledgement:
  17  *      This product includes software developed under OpenBSD by
  18  *      Per Fogelstrom.
  19  * 4. The name of the author may not be used to endorse or promote products
  20  *    derived from this software without specific prior written permission.
  21  *
  22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
  23  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  24  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  26  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  32  * SUCH DAMAGE.
  33  *
  34  */
  35 #ifndef _PICA_H_
  36 #define _PICA_H_ 1
  37
  38 /*
  39  * PICA's Physical address space
  40  */
  41
  42 #define PICA_PHYS_MIN           0x00000000      /* 256 Meg */
  43 #define PICA_PHYS_MAX           0x0fffffff
  44
  45 /*
  46  * Memory map
  47  */
  48
  49 #define PICA_PHYS_MEMORY_START  0x00000000
  50 #define PICA_PHYS_MEMORY_END    0x0fffffff      /* 256 Meg in 8 slots */
  51
  52 #define PICA_MEMORY_SIZE_REG    0xe00fffe0      /* Memory size register */
  53 #define PICA_CONFIG_REG         0xe00ffff0      /* Hardware config reg  */
  54
  55 /*
  56  * I/O map
  57  */
  58
  59 #define R4030_P_LOCAL_IO_BASE   0x80000000      /* I/O Base address */
  60 #define R4030_V_LOCAL_IO_BASE   0xe0000000
  61 #define R4030_S_LOCAL_IO_BASE   0x00040000      /* Size */
  62 #define R4030 R4030_V_LOCAL_IO_BASE
  63
  64 #define R4030_SYS_CONFIG        (R4030+0x0000)  /* Global config register */
  65 #define R4030_SYS_TL_BASE       (R4030+0x0018)  /* DMA transl. table base */
  66 #define R4030_SYS_TL_LIMIT      (R4030+0x0020)  /* DMA transl. table limit */
  67 #define R4030_SYS_TL_IVALID     (R4030+0x0028)  /* DMA transl. cache inval */
  68 #define R4030_SYS_DMA0_REGS     (R4030+0x0100)  /* DMA ch0 base address */
  69 #define R4030_SYS_DMA1_REGS     (R4030+0x0120)  /* DMA ch0 base address */
  70 #define R4030_SYS_DMA2_REGS     (R4030+0x0140)  /* DMA ch0 base address */
  71 #define R4030_SYS_DMA3_REGS     (R4030+0x0160)  /* DMA ch0 base address */
  72 #define R4030_SYS_DMA_INT_SRC   (R4030+0x0200)  /* DMA int source status reg */
  73 #define R4030_SYS_NVRAM_PROT    (R4030+0x0220)  /* NV ram protect register */
  74 #define R4030_SYS_IT_VALUE      (R4030+0x0228)  /* Interval timer reload */
  75 #define R4030_SYS_IT_STAT       (R4030+0x0230)  /* Interval timer count */
  76 #define R4030_SYS_ISA_VECTOR    (R4030+0x0238)  /* ISA Interrupt vector */
  77 #define R4030_SYS_EXT_IMASK     (R4030+0x00e8)  /* External int enable mask */
  78
  79 #define PVLB R4030_V_LOCAL_IO_BASE
  80 #define PICA_SYS_SONIC          (PVLB+0x1000)   /* SONIC base address */
  81 #define PICA_SYS_SCSI           (PVLB+0x2000)   /* SCSI base address */
  82 #define PICA_SYS_FLOPPY         (PVLB+0x3000)   /* Floppy base address */
  83 #define PICA_SYS_CLOCK          (PVLB+0x4000)   /* Clock base address */
  84 #define PICA_SYS_KBD            (PVLB+0x5000)   /* Keybrd/mouse base address */
  85 #define PICA_SYS_COM1           (PVLB+0x6000)   /* Com port 1 */
  86 #define PICA_SYS_COM2           (PVLB+0x7000)   /* Com port 2 */
  87 #define PICA_SYS_PAR1           (PVLB+0x8000)   /* Parallel port 1 */
  88 #define PICA_SYS_NVRAM          (PVLB+0x9000)   /* Unprotected NV-ram */
  89 #define PICA_SYS_PNVRAM         (PVLB+0xa000)   /* Protected NV-ram */
  90 #define PICA_SYS_NVPROM         (PVLB+0xb000)   /* Read only NV-ram */
  91 #define PICA_SYS_SOUND          (PVLB+0xc000)   /* Sound port */
  92
  93 #define C_JAZZ_EISA_TODCLOCK_AS 0x70            /* address select for clock */
  94
  95 #define PICA_P_DRAM_CONF        0x800e0000      /* Dram config registers */
  96 #define PICA_V_DRAM_CONF        0xe00e0000
  97 #define PICA_S_DRAM_CONF        0x00020000
  98
  99 #define PICA_P_INT_SOURCE       0xf0000000      /* Interrupt src registers */
 100 #define PICA_V_INT_SOURCE       R4030_V_LOCAL_IO_BASE+R4030_S_LOCAL_IO_BASE
 101 #define PICA_S_INT_SOURCE       0x00001000
 102 #define PVIS PICA_V_INT_SOURCE
 103 #define PICA_SYS_LB_IS          (PVIS+0x0000)   /* Local bus int source */
 104 #define PICA_SYS_LB_IE          (PVIS+0x0002)   /* Local bus int enables */
 105
 106 #define PICA_P_LOCAL_VIDEO_CTRL 0x60000000      /* Local video control */
 107 #define PICA_V_LOCAL_VIDEO_CTRL 0xe0200000
 108 #define PICA_S_LOCAL_VIDEO_CTRL 0x00200000
 109
 110 #define PICA_P_EXTND_VIDEO_CTRL 0x60200000      /* Extended video control */
 111 #define PICA_V_EXTND_VIDEO_CTRL 0xe0400000
 112 #define PICA_S_EXTND_VIDEO_CTRL 0x00200000
 113
 114 #define PICA_P_LOCAL_VIDEO      0x40000000      /* Local video memory */
 115 #define PICA_V_LOCAL_VIDEO      0xe0800000
 116 #define PICA_S_LOCAL_VIDEO      0x00800000
 117
 118 #define PICA_P_ISA_IO           0x90000000      /* ISA I/O control */
 119 #define PICA_V_ISA_IO           0xe2000000
 120 #define PICA_S_ISA_IO           0x01000000
 121
 122 #define PICA_P_ISA_MEM          0x91000000      /* ISA Memory control */
 123 #define PICA_V_ISA_MEM          0xe3000000
 124 #define PICA_S_ISA_MEM          0x01000000
 125
 126 /*
 127  *  Addresses used by various display drivers.
 128  */
 129 #define PICA_MONO_BASE  (PICA_V_LOCAL_VIDEO_CTRL + 0x3B4)
 130 #define PICA_MONO_BUF   (PICA_V_LOCAL_VIDEO + 0xB0000)
 131 #define PICA_CGA_BASE   (PICA_V_LOCAL_VIDEO_CTRL + 0x3D4)
 132 #define PICA_CGA_BUF    (PICA_V_LOCAL_VIDEO + 0xB8000)
 133 #endif  /* _PICA_H_ */