1 /* $NetBSD: isa_milan.c,v 1.13 2009/03/16 23:11:10 dsl Exp $ */
4 * Copyright (c) 2001 The NetBSD Foundation, Inc.
7 * This code is derived from software contributed to The NetBSD Foundation
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: isa_milan.c,v 1.13 2009/03/16 23:11:10 dsl Exp $");
35 #include <sys/types.h>
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/device.h>
40 #include <dev/isa/isavar.h>
41 #include <dev/isa/isareg.h>
43 #include <machine/iomap.h>
45 void isa_bus_init(void);
47 static void new_imask(void);
48 static void isa_callback(int);
51 * Bitmask of currently enabled isa interrupts. Used by new_imask().
53 static u_int16_t imask_enable
= 0xffff;
55 #define IRQ_SLAVE 2 /* Slave at level 2 */
56 #define MILAN_MAX_ISA_INTS 16 /* Max. number of vectors */
57 #define ICU_OFFSET 0 /* Interrupt vector base */
59 #define WICU(icu, val) *(volatile u_int8_t*)(icu) = val
61 static isa_intr_info_t milan_isa_iinfo
[MILAN_MAX_ISA_INTS
];
66 volatile u_int8_t
*icu
;
69 * Initialize both the icu's:
70 * - enter Special Mask Mode
71 * - Block all interrupts
73 icu
= (u_int8_t
*)(AD_8259_MASTER
);
75 icu
[0] = 0x11; /* reset; program device, four bytes */
76 icu
[1] = ICU_OFFSET
; /* starting at this vector index */
77 icu
[1] = (1 << IRQ_SLAVE
); /* slave on line 2 */
78 icu
[1] = 1; /* 8086 mode */
79 icu
[1] = 0xff; /* leave interrupts masked */
80 icu
[0] = 0x68; /* special mask mode */
81 icu
[0] = 0x0a; /* Read IRR by default. */
83 icu
= (u_int8_t
*)(AD_8259_SLAVE
);
85 icu
[0] = 0x11; /* reset; program device, four bytes */
86 icu
[1] = ICU_OFFSET
+ 8; /* starting at this vector index */
87 icu
[1] = IRQ_SLAVE
; /* slave on line 2 */
88 icu
[1] = 1; /* 8086 mode */
89 icu
[1] = 0xff; /* leave interrupts masked */
90 icu
[0] = 0x68; /* special mask mode */
91 icu
[0] = 0x0a; /* Read IRR by default. */
95 * Determine and activate new interrupt mask by scanning the milan_isa_iinfo
96 * array for enabled interrupts.
104 for (irq
= 0; irq
< MILAN_MAX_ISA_INTS
; irq
++) {
105 if (milan_isa_iinfo
[irq
].ifunc
!= NULL
)
108 nmask
|= 1 << IRQ_SLAVE
;
110 imask_enable
= ~nmask
;
111 WICU(AD_8259_MASTER
+1, imask_enable
& 0xff);
112 WICU(AD_8259_SLAVE
+1 , (imask_enable
>> 8) & 0xff);
116 isa_callback(int vector
)
118 isa_intr_info_t
*iinfo_p
;
121 iinfo_p
= &milan_isa_iinfo
[vector
];
123 s
= splx(iinfo_p
->ipl
);
124 (void) (iinfo_p
->ifunc
)(iinfo_p
->iarg
);
126 WICU(AD_8259_SLAVE
, 0x60 | (vector
& 7));
127 else WICU(AD_8259_MASTER
, 0x60 | (vector
& 7));
131 void milan_isa_intr(int, int);
133 milan_isa_intr(int vector
, int sr
)
135 isa_intr_info_t
*iinfo_p
;
138 if (vector
>= MILAN_MAX_ISA_INTS
) {
139 printf("milan_isa_intr: Bogus vector %d\n", vector
);
143 /* Ack cascade 0x60 == Specific EOI */
145 WICU(AD_8259_MASTER
, 0x60|IRQ_SLAVE
);
147 iinfo_p
= &milan_isa_iinfo
[vector
];
148 if (iinfo_p
->ifunc
== NULL
) {
149 printf("milan_isa_intr: Stray interrupt: %d (mask:%04x)\n",
150 vector
, imask_enable
);
153 if ((sr
& PSL_IPL
) >= (iinfo_p
->ipl
& PSL_IPL
)) {
155 * We're running at a too high priority now.
157 add_sicallback((si_farg
)isa_callback
, (void*)vector
, 0);
160 s
= splx(iinfo_p
->ipl
);
161 (void) (iinfo_p
->ifunc
)(iinfo_p
->iarg
);
163 WICU(AD_8259_SLAVE
, 0x60 | (vector
& 7));
164 else WICU(AD_8259_MASTER
, 0x60 | (vector
& 7));
170 * Try to allocate a free interrupt... On the Milan, we have available:
171 * 5, 9, 10, 11, 13. Or in a bitmask: 0x1720.
173 #define MILAN_AVAIL_ISA_INTS 0x1720
176 isa_intr_alloc(isa_chipset_tag_t ic
, int mask
, int type
, int *irq
)
181 * Say no to impossible questions...
183 if (!(mask
&= MILAN_AVAIL_ISA_INTS
))
186 for (i
= 0; i
< MILAN_MAX_ISA_INTS
; i
++) {
188 if (milan_isa_iinfo
[i
].ifunc
== NULL
) {
198 isa_intr_establish(isa_chipset_tag_t ic
, int irq
, int type
, int level
, int (*ih_fun
)(void *), void *ih_arg
)
200 isa_intr_info_t
*iinfo_p
;
202 iinfo_p
= &milan_isa_iinfo
[irq
];
204 if (iinfo_p
->ifunc
!= NULL
) {
205 printf("isa_intr_establish: interrupt %d was already "
206 "established\n", irq
);
210 iinfo_p
->slot
= 0; /* Unused on Milan */
211 iinfo_p
->ihand
= NULL
; /* Unused on Milan */
212 iinfo_p
->ipl
= level
;
213 iinfo_p
->ifunc
= ih_fun
;
214 iinfo_p
->iarg
= ih_arg
;
221 isa_intr_disestablish(isa_chipset_tag_t ic
, void *handler
)
223 isa_intr_info_t
*iinfo_p
= (isa_intr_info_t
*)handler
;
225 if (iinfo_p
->ifunc
== NULL
)
226 panic("isa_intr_disestablish: interrupt was not established");
228 iinfo_p
->ifunc
= NULL
;