sys/arch/cobalt/stand/boot/ns16550.c

   1 /*      $NetBSD: ns16550.c,v 1.4 2008/03/23 17:19:57 tsutsui Exp $      */
   2
   3 /*-
   4  * Copyright (c) 2008 Izumi Tsutsui.  All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  *
  15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  25  */
  26
  27 #ifdef CONS_SERIAL
  28
  29 #include <lib/libsa/stand.h>
  30 #include <lib/libkern/libkern.h>
  31
  32 #include <dev/ic/comreg.h>
  33
  34 #include <machine/cpu.h>
  35
  36 #include "boot.h"
  37 #include "ns16550.h"
  38
  39 #define CSR_READ(base, reg)             (*(volatile uint8_t *)((base) + (reg)))
  40 #define CSR_WRITE(base, reg, val)                                       \
  41         do {                                                            \
  42                 *(volatile uint8_t *)((base) + (reg)) = (val);          \
  43         } while (/* CONSTCOND */ 0)
  44
  45 void *
  46 com_init(int addr, int speed)
  47 {
  48         uint8_t *com_port;
  49
  50         com_port = (void *)MIPS_PHYS_TO_KSEG1(COM_BASE + addr);
  51
  52         CSR_WRITE(com_port, com_lctl, LCR_DLAB);
  53         speed = comspeed(speed);
  54         CSR_WRITE(com_port, com_dlbl, speed);
  55         CSR_WRITE(com_port, com_dlbh, speed >> 8);
  56
  57         CSR_WRITE(com_port, com_lctl, LCR_PNONE | LCR_8BITS);
  58         CSR_WRITE(com_port, com_mcr, MCR_RTS | MCR_DTR);
  59         CSR_WRITE(com_port, com_fifo,
  60             FIFO_XMT_RST | FIFO_RCV_RST | FIFO_ENABLE);
  61         CSR_WRITE(com_port, com_ier, 0);
  62
  63         return com_port;
  64 }
  65
  66 void
  67 com_putc(void *dev, int c)
  68 {
  69         volatile uint8_t *com_port = dev;
  70
  71         while ((CSR_READ(com_port, com_lsr) & LSR_TXRDY) == 0)
  72                 ;
  73
  74         CSR_WRITE(com_port, com_data, c);
  75 }
  76
  77 int
  78 com_getc(void *dev)
  79 {
  80         volatile uint8_t *com_port = dev;
  81
  82         while ((CSR_READ(com_port, com_lsr) & LSR_RXRDY) == 0)
  83                 ;
  84
  85         return CSR_READ(com_port, com_data);
  86 }
  87
  88 int
  89 com_scankbd(void *dev)
  90 {
  91         volatile uint8_t *com_port = dev;
  92
  93         if ((CSR_READ(com_port, com_lsr) & LSR_RXRDY) == 0)
  94                 return -1;
  95
  96         return CSR_READ(com_port, com_data);
  97 }
  98 #endif /* CONS_SERIAL */