sys/arch/evbarm/mpcsa/mpcsa_io.h

   1 /* $Id: mpcsa_io.h,v 1.2 2008/07/03 01:15:39 matt Exp $ */
   2
   3 #ifndef _mpcsa_io_h_
   4 #define _mpcsa_io_h_    1
   5
   6 /* port A pins (bit numbers): */
   7 #define PA_RTSD         29U
   8 #define PA_CTSD         28U
   9 #define PA_GSMOFF       27U
  10 #define PA_SCL          26U
  11 #define PA_SDA          25U
  12 #define PA_GSMON        24U
  13 #define PA_EXP1         9U
  14 #define PA_EXP0         8U
  15 #define PA_TXD4         5U
  16 #define PA_SPICS1       4U
  17 #define PA_SPICS0       3U
  18 #define PA_SPCK         2U
  19 #define PA_MOSI         1U
  20 #define PA_MISO         0U
  21
  22 /* port B pins: */
  23 #define PB_CTS4         29U
  24 #define PB_CTS3         28U
  25 #define PB_CTS2         27U
  26 #define PB_CTS1         26U
  27 #define PB_RTS4         25U
  28 #define PB_RTS3         24U
  29 #define PB_RTS2         23U
  30 #define PB_RTS1         22U
  31 #define PB_DIN4         14U
  32 #define PB_DIN3         13U
  33 #define PB_DIN2         12U
  34 #define PB_DIN1         11U
  35 #define PB_RXD6         10U
  36 #define PB_TXE6         9U
  37 #define PB_TXE5         7U
  38 #define PB_RXD5         6U
  39 #define PB_S_RF         5U
  40 #define PB_S_RK         4U
  41 #define PB_S_RD         3U
  42 #define PB_S_TD         2U
  43 #define PB_S_TK         1U
  44 #define PB_S_TF         0U
  45
  46 /* port C pins: */
  47 #define PC_CFRESET      5U
  48 #define PC_CFCD         4U
  49 #define PC_CFIRQ        3U
  50 #define PC_DSRD         1U
  51 #define PC_DTRD         0U
  52
  53 /* port D pins: */
  54 #define PD_DSR4         27U
  55 #define PD_DSR3         26U
  56 #define PD_DSR2         25U
  57 #define PD_DSR1         24U
  58 #define PD_DTR4         23U
  59 #define PD_DTR3         22U
  60 #define PD_DTR2         21U
  61 #define PD_DTR1         20U
  62 #define PD_SPICS2       19U
  63 #define PD_DCD4         18U
  64 #define PD_K702         17U
  65 #define PD_K701         16U
  66 #define PD_SW1          15U
  67 #define PD_SW2          14U
  68 #define PD_SW3          13U
  69 #define PD_SW4          12U
  70 #define PD_RESET_OUT    6U
  71
  72 /* Leds behind SPI: */
  73 #define PSPI_ELED43     11U
  74 #define PSPI_ELED33     10U
  75 #define PSPI_ELED23     9U
  76 #define PSPI_ELED13     8U
  77 #define PSPI_RLED1      7U
  78 #define PSPI_GLED2      6U
  79 #define PSPI_GLED1      5U
  80 #define PSPI_SLED5      4U
  81 #define PSPI_SLED4      3U
  82 #define PSPI_SLED3      2U
  83 #define PSPI_SLED2      1U
  84 #define PSPI_SLED1      0U
  85
  86
  87 /* led numbers: */
  88 enum {
  89   LED_SER1 = 1,
  90   LED_SER2,
  91   LED_SER3,
  92   LED_SER4,
  93   LED_SER5,
  94   LED_SER_MAX = LED_SER5,
  95   LED_GSM,
  96   LED_GSM_LINK,
  97   LED_HB,
  98   LED_ETH1,
  99   LED_ETH2,
 100   LED_ETH3,
 101   LED_ETH4,
 102   LED_MAX
 103 };
 104
 105 #define NUM_ETH_PORTS   4       // amount of ethernet ports
 106
 107 #endif /* _mpcsa_io_h_ */