3 * Copyright (c) 2007, S. Kantoluoto <sami.kantoluoto@iki.fi>
6 * Based on vx115_vep_start.S
7 * Copyright (c) 2007, J. Sevy <jsevy@cs.drexel.edu>
9 * Based on g42xxeb_start.S
10 * Copyright (c) 2002, 2003 Genetec Corporation. All rights reserved.
11 * Written by Hiroyuki Bessho for Genetec Corporation.
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
16 * 1. Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 * 2. Redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution.
21 * 3. The name of Genetec Corporation may not be used to endorse or
22 * promote products derived from this software without specific prior
25 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
38 #include <machine/asm.h>
39 #include <arm/armreg.h>
40 #include <arm/arm32/pte.h>
41 #include <arm/arm32/pmap.h> /* for PMAP_DOMAIN_KERNEL */
44 #define FLASH_START 0x10020000
48 #define SDRAM_START 0x20000000
51 #define MODBASE 0x20200000
54 * CPWAIT -- Canonical method to wait for CP15 update.
55 * NOTE: Clobbers the specified temp reg.
56 * copied from arm/arm/cpufunc_asm_xscale.S
57 * XXX: better be in a common header file.
59 #define CPWAIT_BRANCH \
63 mrc p15, 0, tmp, c2, c0, 0 /* arbitrary read of CP15 */ ;\
64 mov tmp, tmp /* wait for it to complete */ ;\
65 CPWAIT_BRANCH /* branch to next insn */
68 * Kernel start routine for MPCSA board.
69 * This code is executed from Flash when the bootloader jumps to it.
73 .global _C_LABEL(mpcsa_start)
74 _C_LABEL(mpcsa_start):
76 /* make sure we're in supervisor mode */
78 msr CPSR_c,#I32_bit | F32_bit | PSR_SVC32_MODE
81 /* move code to RAM */
83 adr r0, _C_LABEL(mpcsa_start)
85 mov r1, r1, LSR #2 /* get size of code in words */
87 add r2, r2, #0x200000 /* code placed 2MB above kernel base */
90 /* copy kernel to RAM */
101 Lcopy_size: .word _edata-_C_LABEL(mpcsa_start)
102 Lstart_off: .word mpcsa_start_ram-_C_LABEL(mpcsa_start)
106 * Kernel is loaded in SDRAM (0x20200000), and is expected to run
110 /* build page table from scratch */
111 ldr r0, Lstartup_pagetable
112 adr r4, mmu_init_table
118 add r3, r3, #(L1_S_SIZE)
122 ldmia r4!, {r1,r2,r3} /* # of sections, PA|attr, VA */
127 mcr p15, 0, r0, c2, c0, 0 /* Set TTB */
128 mcr p15, 0, r0, c8, c7, 0 /* Flush TLB */
130 /* Set the Domain Access register. Very important! */
131 mov r0, #((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT)
132 mcr p15, 0, r0, c3, c0, 0
135 mrc p15, 0, r0, c1, c0, 0
136 orr r0, r0, #CPU_CONTROL_MMU_ENABLE
137 mcr p15, 0, r0, c1, c0, 0
140 /* Jump to kernel code in TRUE VA */
148 #define MMU_INIT(va,pa,n_sec,attr) \
150 .word 4*((va)>>L1_S_SHIFT) ;\
153 #define STARTUP_PAGETABLE_ADDR 0x20100000 + 0x4000
156 .word STARTUP_PAGETABLE_ADDR
159 /* fill all table VA==PA */
160 MMU_INIT(0x00000000, 0x00000000, 1<<(32-L1_S_SHIFT), L1_TYPE_S|L1_S_AP(AP_KRW))
161 /* map in peripheral space */
162 MMU_INIT(0xfff00000, 0xfff00000, 1, L1_TYPE_S|L1_S_AP(AP_KRW))
163 /* map SDRAM VA==PA, WT cacheable */
164 MMU_INIT(0x20100000, 0x20100000, 63, L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW))
165 /* map VA 0xc0000000..0xc0efffff to PA 0x20100000..0x23ffffff */
166 MMU_INIT(0xc0000000, 0x20000000, 63, L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW))
167 .word 0 /* end of table */
171 .word 0xe990510e /* magic number */
172 .string "NetBSD/mpcsa\0\0\0" /* module name */
173 .short 0 /* build flags */
175 .word 0 /* version */
176 .word 0 /* compile / link timestamp */
177 .word MODBASE /* pointer to init routine */
178 .word MODBASE /* start address */
179 .word (_edata-(_C_LABEL(mpcsa_start))) /* length of module */
180 .word (jme_module_header-_C_LABEL(mpcsa_start)+MODBASE) /* back pointer to module struct*/
181 .word 0 /* data pointer (ignored but SBZ)*/
182 .word 0 /* data length (ignored but SBZ)*/
183 .word 0x20200000 /* alternate address */
184 .word 0 /* reserved, SBZ */
187 .word 0xe000301e /* magic number */
188 .string "JME kernel\0\0\0\0\0" /* module name */
189 .short 0 /* build flags */
191 .word 0 /* version */
192 .word 0 /* compile / link timestamp */
193 .word MODBASE /* pointer to init routine */
194 .word MODBASE /* start address */
195 .word (_edata-(_C_LABEL(mpcsa_start))) /* length of module */
196 .word (jme_kmodule_header-_C_LABEL(mpcsa_start)+MODBASE) /* back pointer to module struct*/
197 .word 0 /* data pointer (ignored but SBZ)*/
198 .word 0 /* data length (ignored but SBZ)*/
199 .word 0x20200000 /* alternate address */
200 .word 0 /* reserved, SBZ */