sys/arch/evbarm/nslu2/nslu2reg.h

   1 /*      $NetBSD: nslu2reg.h,v 1.1 2006/02/28 20:40:33 scw Exp $ */
   2
   3 /*-
   4  * Copyright (c) 2006 The NetBSD Foundation, Inc.
   5  * All rights reserved.
   6  *
   7  * This code is derived from software contributed to The NetBSD Foundation
   8  * by Steve C. Woodford.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions
  12  * are met:
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  29  * POSSIBILITY OF SUCH DAMAGE.
  30  */
  31
  32 #ifndef _NSLU2REG_H_
  33 #define _NSLU2REG_H_
  34
  35 /*
  36  * PCI GPIO Assignments
  37  */
  38 #define GPIO_PCI_INTC   9       /* GPIO[9]:  PCI INTC [Input] */
  39 #define  PCI_INT_C      IXP425_INT_GPIO_9
  40 #define GPIO_PCI_INTB   10      /* GPIO[10]: PCI INTB [Input] */
  41 #define  PCI_INT_B      IXP425_INT_GPIO_10
  42 #define GPIO_PCI_INTA   11      /* GPIO[11]: PCI INTA [Input] */
  43 #define  PCI_INT_A      IXP425_INT_GPIO_11
  44 #define GPIO_PCI_RESET  13      /* GPIO[13]: PCI Reset [Output] */
  45 #define GPIO_PCI_CLK    14      /* GPIO[14]: 33MHz PCI Clock [Output] */
  46
  47 /*
  48  * I2C Bus GPIO Assignments
  49  */
  50 #define GPIO_I2C_SCL    6       /* GPIO[6]: I2c Clock [Output] */
  51 #define  GPIO_I2C_SCL_BIT (1u << 6)
  52 #define GPIO_I2C_SDA    7       /* GPIO[7]: I2C Data [Tristate] */
  53 #define  GPIO_I2C_SDA_BIT (1u << 7)
  54
  55 /*
  56  * LED GPIO Assignments
  57  */
  58 #define GPIO_LED_STATUS 0       /* GPIO[0]: Status LED [Output, active high] */
  59 #define GPIO_LED_READY  1       /* GPIO[1]: Ready LED [Output, active high] */
  60 #define GPIO_LED_DISK2  2       /* GPIO[2]: Disk 2 LED [Output, active low] */
  61 #define GPIO_LED_DISK1  3       /* GPIO[3]: Disk 1 LED [Output, active low] */
  62
  63 /*
  64  * Button GPIO Assignments
  65  */
  66 #define GPIO_BUTTON_PWR 5       /* GPIO[5]:  Power button [Input, pulsed] */
  67 #define  BUTTON_PWR_INT IXP425_INT_GPIO_5
  68 #define GPIO_BUTTON_RST 12      /* GPIO[12]: Reset button [Input, active low] */
  69 #define  BUTTON_RST_INT IXP425_INT_GPIO_12
  70
  71 /*
  72  * Miscellaneous GPIO Assignments
  73  */
  74 #define GPIO_BUZZER     4       /* GPIO[4]: Buzzer [Output] */
  75 #define GPIO_POWER_OFF  8       /* GPIO[8]: Power Off [Output, Active high] */
  76 #define GPIO_EXP_CLOCK  15      /* GPIO[15]: Expandion bus clock [Output] */
  77
  78
  79 /*
  80  * Flash memory
  81  */
  82 #define NSLU2_FLASH_HWBASE      0x50000000
  83 #define NSLU2_FLASH_VBASE       0xfc000000
  84 #define NSLU2_FLASH_SIZE        0x00800000
  85
  86 /*
  87  * Interesting locations in Flash
  88  */
  89 #define NSLU2_FLASH_ETHERNET_MAC        (NSLU2_FLASH_VBASE + 0x3ffb0)
  90
  91 #endif  /* _NSLU2REG_H_ */