sys/arch/evbmips/alchemy/mach_intr.c

   1 /*      $NetBSD: mach_intr.c,v 1.2 2006/02/09 18:03:12 gdamore Exp $    */
   2
   3 /*-
   4  * Copyright (c) 2001 The NetBSD Foundation, Inc.
   5  * All rights reserved.
   6  *
   7  * This code is derived from software contributed to The NetBSD Foundation
   8  * by Jason R. Thorpe.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions
  12  * are met:
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  29  * POSSIBILITY OF SUCH DAMAGE.
  30  */
  31
  32 /*
  33  * Platform-specific interrupt support for the Alchemy parts.
  34  *
  35  * These boards just use the interrupt controller built into the
  36  * Alchemy processors, so we just provide evbmips-compliant wrapper
  37  * routines.
  38  */
  39
  40 #include <sys/cdefs.h>
  41 __KERNEL_RCSID(0, "$NetBSD: mach_intr.c,v 1.2 2006/02/09 18:03:12 gdamore Exp $");
  42
  43 #include "opt_ddb.h"
  44
  45 #include <sys/param.h>
  46 #include <sys/queue.h>
  47 #include <sys/malloc.h>
  48 #include <sys/systm.h>
  49 #include <sys/device.h>
  50 #include <sys/kernel.h>
  51
  52 #include <machine/bus.h>
  53 #include <machine/intr.h>
  54
  55 #include <mips/locore.h>
  56 #include <mips/alchemy/include/auvar.h>
  57 #include <mips/alchemy/include/aubusvar.h>
  58
  59 void
  60 evbmips_intr_init(void)
  61 {
  62         au_intr_init();
  63 }
  64
  65 void
  66 evbmips_iointr(uint32_t status, uint32_t cause, uint32_t pc, uint32_t ipending)
  67 {
  68
  69         au_iointr(status, cause, pc, ipending);
  70 }