sys/arch/evbppc/virtex/dev/pstworeg.h

   1 /*      $NetBSD$ */
   2
   3 /*
   4  * Copyright (c) 2006 Jachym Holecek
   5  * All rights reserved.
   6  *
   7  * Written for DFC Design, s.r.o.
   8  *
   9  * Redistribution and use in source and binary forms, with or without
  10  * modification, are permitted provided that the following conditions
  11  * are met:
  12  *
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  *
  16  * 2. Redistributions in binary form must reproduce the above copyright
  17  *    notice, this list of conditions and the following disclaimer in the
  18  *    documentation and/or other materials provided with the distribution.
  19  *
  20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  21  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  22  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  23  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  24  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  25  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  26  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  27  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  28  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  29  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  30  */
  31
  32 #ifndef _VIRTEX_DEV_PSTWOREG_H_
  33 #define _VIRTEX_DEV_PSTWOREG_H_
  34
  35 /*
  36  * PeeCee style PS2 serdes core. Doesn't save us much work, really.
  37  * Each instance handles one PS2 port, the user has to know if it's
  38  * mouse or keyboard.
  39  */
  40
  41 #define PSTWO_SIZE              0x1c
  42
  43 /* Deal with inconsistent notation in Xilinx datasheets. Whee. */
  44 #define PSTWO_BIT(n)            (0x80000000U >> (n))
  45
  46 #define PSTWO_CTRL              0x0000          /* wo */
  47 #define CTRL_RESET              PSTWO_BIT(7)    /* Component reset when set */
  48
  49 #define PSTWO_STAT              0x0004          /* ro */
  50 #define STAT_TX_BUSY            PSTWO_BIT(6)    /* Transmitting byte */
  51 #define STAT_RX_DONE            PSTWO_BIT(7)    /* Received a byte */
  52
  53 #define PSTWO_RX_DATA           0x0008          /* ro */
  54 #define PSTWO_TX_DATA           0x000c          /* wo */
  55 #define DATA_RECV(x)            ((x) >> 24)     /* RX */
  56 #define DATA_SEND(x)            ((x) << 24)     /* TX */
  57
  58 #define PSTWO_INTR_STAT         0x0010          /* ro */
  59 #define PSTWO_INTR_ACK          0x0014          /* wo (reads as STAT) */
  60 #define PSTWO_INTR_MSET         0x0018          /* wo (reads as MASK) */
  61 #define PSTWO_INTR_MCLR         0x001c          /* wo (reads as MASK) */
  62 #define PSTWO_INTR_MASK         PSTWO_INTR_MSET
  63
  64 /* PSTWO_INTR_ bits */
  65 #define INTR_RX_FULL            PSTWO_BIT(2)    /* Received byte */
  66 #define INTR_RX_ERR             PSTWO_BIT(3)    /* Received corrupt packet */
  67 #define INTR_RX_OVER            PSTWO_BIT(4)    /* RX overrun */
  68 #define INTR_TX_DONE            PSTWO_BIT(5)    /* TX packet acknowledged */
  69 #define INTR_TX_SENT            PSTWO_BIT(6)    /* TX packet sent */
  70 #define INTR_TX_TIMO            PSTWO_BIT(7)    /* Clock lost while TX */
  71 #define INTR_ANY                (INTR_RX_FULL | INTR_RX_ERR | INTR_RX_OVER | \
  72                                  INTR_TX_DONE | INTR_TX_SENT | INTR_TX_TIMO)
  73
  74 #endif /*_VIRTEX_DEV_PSTWOREG_H_*/