sys/arch/evbppc/virtex/idcr.h

   1 /*      $NetBSD$ */
   2
   3 /*
   4  * Copyright (c) 2006 Jachym Holecek
   5  * All rights reserved.
   6  *
   7  * Written for DFC Design, s.r.o.
   8  *
   9  * Redistribution and use in source and binary forms, with or without
  10  * modification, are permitted provided that the following conditions
  11  * are met:
  12  *
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  *
  16  * 2. Redistributions in binary form must reproduce the above copyright
  17  *    notice, this list of conditions and the following disclaimer in the
  18  *    documentation and/or other materials provided with the distribution.
  19  *
  20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  21  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  22  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  23  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  24  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  25  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  26  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  27  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  28  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  29  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  30  */
  31
  32 #include "opt_virtex.h"
  33
  34 #ifndef IDCR_BASE
  35 #error "Internal DCR base address not defined"
  36 #endif
  37
  38 #include <powerpc/cpu.h>
  39
  40 #ifndef _VIRTEX_IDCR_H_
  41 #define _VIRTEX_IDCR_H_
  42
  43 /* Instruction OCM control */
  44 #define IDCR_ISINIT             0x0000
  45 #define IDCR_ISFILL             0x0001
  46 #define IDCR_ISARC              0x0002
  47 #define IDCR_ISCNT              0x0003
  48
  49 /* APU control */
  50 #define IDCR_UDICFG             0x0004
  51 #define IDCR_APUCFG             0x0005
  52
  53 /* Data OCM control */
  54 #define IDCR_DSARC              0x0006
  55 #define IDCR_DSCNT              0x0007
  56
  57 /* 8...11 reserved */
  58
  59 /* Temac HIF-to-GMI communication: arguments, ... */
  60 #define IDCR_HIF_ARG1           0x000c
  61 #define IDCR_HIF_ARG0           0x000d
  62
  63 /* ... control, ... */
  64 #define IDCR_HIF_CTRL           0x000e
  65 #define HIF_CTRL_GMIADDR        0x000003ff
  66 #define HIF_CTRL_SEL            0x00000400      /* Keep this bit zero! */
  67 #define HIF_CTRL_WRITE          0x00008000      /* Read otherwise */
  68
  69 /* ... status. */
  70 #define IDCR_HIF_STAT           0x000f
  71 #define HIF_STAT_STATS          0x00000001
  72 #define HIF_STAT_MIIRR          0x00000002      /* MII read ready */
  73 #define HIF_STAT_MIIWR          0x00000004      /* MII write ready */
  74 #define HIF_STAT_AFRR           0x00000008      /* Address filter read ready */
  75 #define HIF_STAT_AFWR           0x00000010      /* Address filter write ready */
  76 #define HIF_STAT_GMIRR          0x00000020      /* GMI read ready */
  77 #define HIF_STAT_GMIWR          0x00000040      /* GMI write ready */
  78
  79 #define mtidcr(addr, val)       mtdcr(IDCR_BASE + (addr), (val))
  80 #define mfidcr(addr)            mfdcr(IDCR_BASE + (addr))
  81
  82 #endif /*_VIRTEX_IDCR_H_*/