sys/arch/hp300/dev/dcmreg.h

   1 /*      $NetBSD: dcmreg.h,v 1.6.2.3 2004/09/21 13:15:13 skrll Exp $     */
   2
   3 /*
   4  * Copyright (c) 1982, 1986, 1990, 1993
   5  *      The Regents of the University of California.  All rights reserved.
   6  *
   7  * This code is derived from software contributed to Berkeley by
   8  * the Systems Programming Group of the University of Utah Computer
   9  * Science Department.
  10  *
  11  * Redistribution and use in source and binary forms, with or without
  12  * modification, are permitted provided that the following conditions
  13  * are met:
  14  * 1. Redistributions of source code must retain the above copyright
  15  *    notice, this list of conditions and the following disclaimer.
  16  * 2. Redistributions in binary form must reproduce the above copyright
  17  *    notice, this list of conditions and the following disclaimer in the
  18  *    documentation and/or other materials provided with the distribution.
  19  * 3. Neither the name of the University nor the names of its contributors
  20  *    may be used to endorse or promote products derived from this software
  21  *    without specific prior written permission.
  22  *
  23  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  26  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  27  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  33  * SUCH DAMAGE.
  34  *
  35  * from: Utah $Hdr: dcmreg.h 1.7 92/01/21$
  36  *
  37  *      @(#)dcmreg.h    8.1 (Berkeley) 6/10/93
  38  */
  39 /*
  40  * Copyright (c) 1988 University of Utah.
  41  *
  42  * This code is derived from software contributed to Berkeley by
  43  * the Systems Programming Group of the University of Utah Computer
  44  * Science Department.
  45  *
  46  * Redistribution and use in source and binary forms, with or without
  47  * modification, are permitted provided that the following conditions
  48  * are met:
  49  * 1. Redistributions of source code must retain the above copyright
  50  *    notice, this list of conditions and the following disclaimer.
  51  * 2. Redistributions in binary form must reproduce the above copyright
  52  *    notice, this list of conditions and the following disclaimer in the
  53  *    documentation and/or other materials provided with the distribution.
  54  * 3. All advertising materials mentioning features or use of this software
  55  *    must display the following acknowledgement:
  56  *      This product includes software developed by the University of
  57  *      California, Berkeley and its contributors.
  58  * 4. Neither the name of the University nor the names of its contributors
  59  *    may be used to endorse or promote products derived from this software
  60  *    without specific prior written permission.
  61  *
  62  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  63  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  64  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  65  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  66  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  67  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  68  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  69  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  70  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  71  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  72  * SUCH DAMAGE.
  73  *
  74  * from: Utah $Hdr: dcmreg.h 1.7 92/01/21$
  75  *
  76  *      @(#)dcmreg.h    8.1 (Berkeley) 6/10/93
  77  */
  78
  79 #include <hp300/dev/iotypes.h>          /* XXX */
  80
  81 struct dcmdevice {         /* host address, only odd bytes addressed */
  82         u_char  dcm_pad0;
  83         vu_char dcm_rsid;               /* Reset / ID                   0001 */
  84         u_char  dcm_pad1;
  85         vu_char dcm_ic;                 /* Interrupt control register   0003 */
  86         u_char  dcm_pad2;
  87         vu_char dcm_sem;                /* Semaphore register           0005 */
  88         u_char  dcm_pad3[0x7ffa];       /* Unaddressable        0006-7fff */
  89         u_char  dcm_pad4;
  90         vu_char dcm_iir;                /* Interrupt ident register     8001 */
  91         u_char  dcm_pad5;
  92         vu_char dcm_cr;                 /* Command register             8003 */
  93         u_char  dcm_pad6[0x3fc];        /* Card scratch         8004-83ff */
  94         struct  dcmrfifo {
  95                 u_char  ptr_pad1;
  96                 vu_char data_char;
  97                 u_char  ptr_pad2;
  98                 vu_char data_stat;
  99         } dcm_rfifos[4][0x80];          /* Receive queues               8400 */
 100         struct  {
 101                 u_char  ptr_pad1;
 102                 vu_char data_data;
 103         } dcm_bmap[0x100];              /* Bitmap table                 8c00 */
 104         struct  {
 105                 u_char  ptr_pad;
 106                 vu_char ptr;
 107         } dcm_rhead[4];                 /* Fifo head - receive          8e00 */
 108         struct  {
 109                 u_char  ptr_pad;
 110                 vu_char  ptr;
 111         } dcm_rtail[4];                 /* Fifo tail - receive          8e08 */
 112         struct  {
 113                 u_char  ptr_pad;
 114                 vu_char ptr;
 115         } dcm_thead[4];                 /* Fifo head - transmit         8e10 */
 116         struct  {
 117                 u_char  ptr_pad;
 118                 vu_char ptr;
 119         } dcm_ttail[4];                 /* Fifo tail - transmit         8e18 */
 120         struct  {
 121                 u_char  pad1;
 122                 vu_char dcm_conf;
 123                 u_char  pad2;
 124                 vu_char dcm_baud;
 125         } dcm_data[4];                  /* Configuration registers      8e20 */
 126         struct  modemreg {
 127                 u_char  pad0;
 128                 vu_char mdmin;          /* Modem in                     8e31 */
 129                 u_char  pad1;
 130                 vu_char mdmout;         /* Modem out                    8e33 */
 131                 u_char  pad2;
 132                 vu_char mdmmsk;         /* Modem mask                   8e35 */
 133         } dcm_modem0;
 134         struct  {
 135                 u_char pad1;
 136                 vu_char dcm_data;
 137         } dcm_cmdtab[4];                /* Command tables               8e36 */
 138         struct  {
 139                 u_char pad1;
 140                 vu_char dcm_data;
 141         } dcm_icrtab[4];                /* Interrupt data               8e3e */
 142         u_char  dcm_pad10;
 143         vu_char dcm_stcon;              /* Self test condition          8e47 */
 144         struct modemreg dcm_modem1;     /* 638 Modem port1              8e48 */
 145         struct modemreg dcm_modem2;     /* 638 Modem port2              8e4e */
 146         struct modemreg dcm_modem3;     /* 638 Modem port3              8e54 */
 147         u_char  dcm_pad11;
 148         vu_char dcm_modemchng;          /* 638 Modem change mask        8e5b */
 149         u_char  dcm_pad12;
 150         vu_char dcm_modemintr;          /* 638 Modem interrupt mask     8e5d */
 151         u_char  dcm_pad13[0x82];        /* Undef Shared Ram     8e5e-8edf */
 152         struct  dcmtfifo {
 153             u_char  ptr_pad1;
 154             vu_char  data_char;
 155         } dcm_tfifos[4][0x10];          /* Transmit queues              8ee0 */
 156 };
 157
 158 /*
 159  * Overlay structure for port specific queue "registers".
 160  * Starts at offset 0x8E00+(port*2).
 161  */
 162 struct  dcmpreg {
 163         u_char          pad0;           /* +00 */
 164         vu_char r_head;                 /* +01 */
 165         u_char          pad1[7];        /* +02 */
 166         vu_char r_tail;                 /* +09 */
 167         u_char          pad2[7];        /* +0A */
 168         vu_char t_head;                 /* +11 */
 169         u_char          pad3[7];        /* +12 */
 170         vu_char t_tail;                 /* +19 */
 171 };
 172 #define dcm_preg(d, p)  ((struct dcmpreg *)((u_int)(d)+0x8e00+(p)*2))
 173
 174 /* interface reset/id */
 175 #define DCMCON          0x80    /* REMOTE/LOCAL switch, read */
 176 #define DCMID           0x5     /* hardwired card id, read */
 177 #define DCMRS           0x80    /* software reset, write */
 178
 179 /* interrupt control */
 180 #define DCMIPL(x)       ((((x) >> 4) & 3) + 3)  /* interrupt level, read */
 181 #define IC_IR           0x40    /* interrupt request, read */
 182 #define IC_IE           0x80    /* interrupt enable, write */
 183 #define IC_ID           0x00    /* interrupt disable, write */
 184
 185
 186 /* Semaphore control */
 187 #define SEM_BSY         0x80    /* read */
 188 #define SEM_CLR         0xFF    /* write */
 189 #define SEM_LOCK(dcm)   while ((dcm)->dcm_sem & SEM_BSY)
 190 #define SEM_UNLOCK(dcm) (dcm)->dcm_sem = SEM_CLR
 191
 192 /* command register */
 193 #define CR_PORT0        0x1
 194 #define CR_PORT1        0x2
 195 #define CR_PORT2        0x4
 196 #define CR_PORT3        0x8
 197 #define CR_MODM         0x10    /* change modem output lines */
 198 #define CR_TIMER        0x20    /* 16ms interrupt timer toggle */
 199 #define CR_SELFT        0x40    /* run self test */
 200 #define CR_MASK         0x7f
 201
 202 /* interrupt ident register */
 203 #define IIR_PORT0       0x1
 204 #define IIR_PORT1       0x2
 205 #define IIR_PORT2       0x4
 206 #define IIR_PORT3       0x8
 207 #define IIR_SELFT       0x10    /* self test completed */
 208 #define IIR_MODM        0x20    /* change in modem input lines */
 209 #define IIR_TIMEO       0x40    /* Time out */
 210 #define IIR_MASK        0x7f
 211
 212 /* self test cond reg */
 213 #define ST_OK           0xe0
 214
 215 /* Line configuration register */
 216 #define LC_PNO          0x00
 217 #define LC_PODD         0x01
 218 #define LC_PEVEN        0x02
 219 #define LC_PMSK         0x03
 220
 221 #define LC_1STOP        0x00
 222 #define LC_1HSTOP       0x04
 223 #define LC_2STOP        0x08
 224 #define LC_STOPMSK      0x0b
 225
 226 #define LC_8BITS        0x30
 227 #define LC_7BITS        0x20
 228 #define LC_6BITS        0x10
 229 #define LC_5BITS        0x00
 230 #define LC_BITMSK       0x30
 231
 232 /* baud reg */
 233 #define BR_0            0x00
 234 #define BR_50           0x01
 235 #define BR_75           0x02
 236 #define BR_110          0x03
 237 #define BR_134          0x04
 238 #define BR_150          0x05
 239 #define BR_300          0x06
 240 #define BR_600          0x07
 241 #define BR_900          0x08
 242 #define BR_1200         0x09
 243 #define BR_1800         0x0a
 244 #define BR_2400         0x0b
 245 #define BR_3600         0x0c
 246 #define BR_4800         0x0d
 247 #define BR_7200         0x0e
 248 #define BR_9600         0x0f
 249 #define BR_19200        0x10
 250 #define BR_38400        0x11
 251
 252 /* modem input register */
 253 #define MI_CTS          0x08
 254 #define MI_DM           0x04
 255 #define MI_CD           0x02
 256 #define MI_RI           0x01
 257
 258 /* modem output register */
 259 #define MO_SR           0x04
 260 #define MO_DTR          0x02
 261 #define MO_RTS          0x01
 262 #define MO_ON           ((MO_DTR) | (MO_RTS))
 263 #define MO_OFF          0x00
 264
 265 /* cmd-tab values, write */
 266 #define CT_CON          0x1     /* configuration change */
 267 #define CT_TX           0x2     /* transmit buffer not empty */
 268 #define CT_BRK          0x4     /* toggle BREAK */
 269
 270 /* icr-tab values, read */
 271 #define IT_TX           0x1     /* transmit buffer empty */
 272 #define IT_SPEC         0x2     /* special character received */
 273
 274 /* data errors */
 275 #define RD_OVF          0x08
 276 #define RD_BD           0x10
 277 #define RD_PE           0x20
 278 #define RD_OE           0x40
 279 #define RD_FE           0x80
 280 #define RD_MASK         0xf8
 281
 282 /* Transmit/Receive masks */
 283 #define TX_MASK         0x0f
 284 #define RX_MASK         0xff
 285
 286 /*
 287  * DCM console caveat: only port 1 is affected by the remote switch, and
 288  * thus the only supported console port on a given DCM card.
 289  */
 290 #define DCMCONSPORT     1