sys/arch/hp300/dev/hilreg.h

   1 /*      $NetBSD: hilreg.h,v 1.8 2005/12/11 12:17:14 christos Exp $      */
   2
   3 /*
   4  * Copyright (c) 1990, 1993
   5  *      The Regents of the University of California.  All rights reserved.
   6  *
   7  * This code is derived from software contributed to Berkeley by
   8  * the Systems Programming Group of the University of Utah Computer
   9  * Science Department.
  10  *
  11  * Redistribution and use in source and binary forms, with or without
  12  * modification, are permitted provided that the following conditions
  13  * are met:
  14  * 1. Redistributions of source code must retain the above copyright
  15  *    notice, this list of conditions and the following disclaimer.
  16  * 2. Redistributions in binary form must reproduce the above copyright
  17  *    notice, this list of conditions and the following disclaimer in the
  18  *    documentation and/or other materials provided with the distribution.
  19  * 3. Neither the name of the University nor the names of its contributors
  20  *    may be used to endorse or promote products derived from this software
  21  *    without specific prior written permission.
  22  *
  23  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  26  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  27  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  33  * SUCH DAMAGE.
  34  *
  35  * from: Utah $Hdr: hilreg.h 1.10 92/01/21$
  36  *
  37  *      @(#)hilreg.h    8.1 (Berkeley) 6/10/93
  38  */
  39 /*
  40  * Copyright (c) 1988 University of Utah.
  41  *
  42  * This code is derived from software contributed to Berkeley by
  43  * the Systems Programming Group of the University of Utah Computer
  44  * Science Department.
  45  *
  46  * Redistribution and use in source and binary forms, with or without
  47  * modification, are permitted provided that the following conditions
  48  * are met:
  49  * 1. Redistributions of source code must retain the above copyright
  50  *    notice, this list of conditions and the following disclaimer.
  51  * 2. Redistributions in binary form must reproduce the above copyright
  52  *    notice, this list of conditions and the following disclaimer in the
  53  *    documentation and/or other materials provided with the distribution.
  54  * 3. All advertising materials mentioning features or use of this software
  55  *    must display the following acknowledgement:
  56  *      This product includes software developed by the University of
  57  *      California, Berkeley and its contributors.
  58  * 4. Neither the name of the University nor the names of its contributors
  59  *    may be used to endorse or promote products derived from this software
  60  *    without specific prior written permission.
  61  *
  62  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  63  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  64  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  65  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  66  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  67  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  68  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  69  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  70  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  71  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  72  * SUCH DAMAGE.
  73  *
  74  * from: Utah $Hdr: hilreg.h 1.10 92/01/21$
  75  *
  76  *      @(#)hilreg.h    8.1 (Berkeley) 6/10/93
  77  */
  78
  79 #include <hp300/dev/iotypes.h>          /* XXX */
  80
  81 #ifdef hp300
  82 struct  hil_dev {
  83         char    hil_pad0;
  84         vu_char hil_data;
  85         char    hil_pad1;
  86         vu_char hil_cmd;
  87 };
  88
  89 #define HILADDR                 ((struct hil_dev *)IIOV(0x428000))
  90 #define BBCADDR                 ((struct hil_dev *)IIOV(0x420000))
  91 #endif
  92
  93 #ifdef hp800
  94 #ifdef hp700
  95 struct hil_dev {
  96         vu_char hil_rsthold;    /* (WO) reset hold (and Serial #3) */
  97         vu_char hil_resv1[2047];
  98         vu_char hil_data;       /* send/receive data to/from 8042 */
  99         vu_char hil_cmd;        /* status/control to/from 8042 */
 100         vu_char hil_resv2[1022];
 101         vu_char hil_rstrel;     /* (WO) reset release (and Serial #3) */
 102
 103 };
 104 #else
 105 struct  hil_dev {
 106         vu_int hil_data;
 107         vu_int hil_pad;
 108         vu_int hil_cmd;
 109 };
 110 #endif
 111 #endif
 112 #define hil_stat hil_cmd
 113
 114 #if defined(hp300) || defined(hp700)
 115 #define READHILDATA(x)          ((x)->hil_data)
 116 #define READHILSTAT(x)          ((x)->hil_stat)
 117 #define READHILCMD(x)           ((x)->hil_cmd)
 118 #define WRITEHILDATA(x, y)      ((x)->hil_data = (y))
 119 #define WRITEHILSTAT(x, y)      ((x)->hil_stat = (y))
 120 #define WRITEHILCMD(x, y)       ((x)->hil_cmd  = (y))
 121 #else
 122 #define READHILDATA(x)          ((x)->hil_data >> 24)
 123 #define READHILSTAT(x)          ((x)->hil_stat >> 24)
 124 #define READHILCMD(x)           ((x)->hil_cmd  >> 24)
 125 #define WRITEHILDATA(x, y)      ((x)->hil_data = ((y) << 24))
 126 #define WRITEHILSTAT(x, y)      ((x)->hil_stat = ((y) << 24))
 127 #define WRITEHILCMD(x, y)       ((x)->hil_cmd  = ((y) << 24))
 128 #endif
 129
 130 #define HIL_BUSY                0x02
 131 #define HIL_DATA_RDY            0x01
 132
 133 #define HILWAIT(hil_dev)        while ((READHILSTAT(hil_dev) & HIL_BUSY))
 134 #define HILDATAWAIT(hil_dev)    while (!(READHILSTAT(hil_dev) & HIL_DATA_RDY))
 135
 136 /* HIL status bits */
 137 #define HIL_POLLDATA    0x10            /* HIL poll data follows */
 138 #define HIL_COMMAND     0x08            /* Start of original command */
 139 #define HIL_ERROR       0x080           /* HIL error */
 140 #define HIL_RECONFIG    0x080           /* HIL has reconfigured */
 141 #define HIL_STATMASK    (HIL_DATA | HIL_COMMAND)
 142
 143 #define HIL_SSHIFT      4               /* Bits to shift status over */
 144 #define HIL_SMASK       0xF             /* Service request status mask */
 145 #define HIL_DEVMASK     0x07
 146
 147 /* HIL status types */
 148 #define HIL_STATUS      0x5             /* HIL status in data register */
 149 #define HIL_DATA        0x6             /* HIL data in data register */
 150 #define HIL_CTRLSHIFT   0x8             /* key + CTRL + SHIFT */
 151 #define HIL_CTRL        0x9             /* key + CTRL */
 152 #define HIL_SHIFT       0xA             /* key + SHIFT */
 153 #define HIL_KEY         0xB             /* key only */
 154 #define HIL_68K         0x4             /* Data from the 68k is ready */
 155
 156 /* HIL commands */
 157 #define HIL_SETARD      0xA0            /* set auto-repeat delay */
 158 #define HIL_SETARR      0xA2            /* set auto-repeat rate */
 159 #define HIL_SETTONE     0xA3            /* set tone generator */
 160 #define HIL_CNMT        0xB2            /* clear nmi */
 161 #define HIL_INTON       0x5C            /* Turn on interrupts. */
 162 #define HIL_INTOFF      0x5D            /* Turn off interrupts. */
 163 #define HIL_TRIGGER     0xC5            /* trigger command */
 164 #define HIL_STARTCMD    0xE0            /* start loop command */
 165 #define HIL_TIMEOUT     0xFE            /* timeout */
 166 #define HIL_READTIME    0x13            /* Read real time register */
 167
 168 /* Read/write various registers on the 8042. */
 169 #define HIL_READBUSY            0x02    /* internal "busy" register */
 170 #define HIL_READKBDLANG         0x12    /* read keyboard language code */
 171 #define HIL_READKBDSADR         0xF9
 172 #define HIL_WRITEKBDSADR        0xE9
 173 #define HIL_READLPSTAT          0xFA
 174 #define HIL_WRITELPSTAT         0xEA
 175 #define HIL_READLPCTRL          0xFB
 176 #define HIL_WRITELPCTRL         0xEB
 177
 178 /* BUSY bits */
 179 #define BSY_LOOPBUSY    0x04
 180
 181 /* LPCTRL bits */
 182 #define LPC_AUTOPOLL    0x01    /* enable auto-polling */
 183 #define LPC_NOERROR     0x02    /* don't report errors */
 184 #define LPC_NORECONF    0x04    /* don't report reconfigure */
 185 #define LPC_KBDCOOK     0x10    /* cook all keyboards */
 186 #define LPC_RECONF      0x80    /* reconfigure the loop */
 187
 188 /* LPSTAT bits */
 189 #define LPS_DEVMASK     0x07    /* number of loop devices */
 190 #define LPS_CONFGOOD    0x08    /* reconfiguration worked */
 191 #define LPS_CONFFAIL    0x80    /* reconfiguration failed */
 192
 193 /* HIL packet headers */
 194 #define HIL_MOUSEDATA   0x2
 195 #define HIL_KBDDATA     0x40
 196
 197 #define HIL_MOUSEMOTION 0x02    /* mouse movement event */
 198 #define HIL_KBDBUTTON   0x40    /* keyboard button event */
 199 #define HIL_MOUSEBUTTON 0x40    /* mouse button event */
 200 #define HIL_BUTTONBOX   0x60    /* button box event */
 201 #define HIL_TABLET      0x02    /* tablet motion event */
 202 #define HIL_KNOBBOX     0x03    /* knob box motion data */
 203
 204 /* For setting auto repeat on the keyboard */
 205 #define ar_format(x)    ~((x - 10) / 10)
 206 #define KBD_ARD         400     /* initial delay in msec (10 - 2560) */
 207 #define KBD_ARR         60      /* rate (10 - 2550 msec, 2551 == off) */
 208
 209 #ifdef hp300
 210 /* Magic */
 211 #define KBDNMISTAT      ((volatile char *)IIOV(0x478005))
 212 #define KBDNMI          0x04
 213 #endif