sys/arch/hp700/dev/cpu.c

   1 /*      $NetBSD: cpu.c,v 1.12 2009/05/07 15:34:49 skrll Exp $   */
   2
   3 /*      $OpenBSD: cpu.c,v 1.28 2004/12/28 05:18:25 mickey Exp $ */
   4
   5 /*
   6  * Copyright (c) 1998-2003 Michael Shalayeff
   7  * All rights reserved.
   8  *
   9  * Redistribution and use in source and binary forms, with or without
  10  * modification, are permitted provided that the following conditions
  11  * are met:
  12  * 1. Redistributions of source code must retain the above copyright
  13  *    notice, this list of conditions and the following disclaimer.
  14  * 2. Redistributions in binary form must reproduce the above copyright
  15  *    notice, this list of conditions and the following disclaimer in the
  16  *    documentation and/or other materials provided with the distribution.
  17  *
  18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  19  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  20  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  21  * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
  22  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  23  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  24  * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  26  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
  27  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  28  * THE POSSIBILITY OF SUCH DAMAGE.
  29  */
  30
  31 #include <sys/cdefs.h>
  32 __KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.12 2009/05/07 15:34:49 skrll Exp $");
  33
  34 #include <sys/param.h>
  35 #include <sys/systm.h>
  36 #include <sys/device.h>
  37 #include <sys/reboot.h>
  38
  39 #include <machine/cpufunc.h>
  40 #include <machine/pdc.h>
  41 #include <machine/iomod.h>
  42 #include <machine/autoconf.h>
  43
  44 #include <hp700/hp700/intr.h>
  45 #include <hp700/hp700/machdep.h>
  46 #include <hp700/dev/cpudevs.h>
  47
  48 struct cpu_softc {
  49         device_t sc_dev;
  50         hppa_hpa_t sc_hpa;
  51         void *sc_ih;
  52 };
  53
  54 int     cpumatch(device_t, cfdata_t, void *);
  55 void    cpuattach(device_t, device_t, void *);
  56
  57 CFATTACH_DECL_NEW(cpu, sizeof(struct cpu_softc),
  58     cpumatch, cpuattach, NULL, NULL);
  59
  60 static int cpu_attached;
  61
  62 int
  63 cpumatch(device_t parent, cfdata_t cf, void *aux)
  64 {
  65         struct confargs *ca = aux;
  66
  67         /* there will be only one for now XXX */
  68         /* probe any 1.0, 1.1 or 2.0 */
  69         if (cpu_attached ||
  70             ca->ca_type.iodc_type != HPPA_TYPE_NPROC ||
  71             ca->ca_type.iodc_sv_model != HPPA_NPROC_HPPA)
  72                 return 0;
  73
  74         return 1;
  75 }
  76
  77 void
  78 cpuattach(device_t parent, device_t self, void *aux)
  79 {
  80         /* machdep.c */
  81         extern struct pdc_cache pdc_cache;
  82         extern struct pdc_btlb pdc_btlb;
  83         extern struct pdc_model pdc_model;
  84         extern u_int cpu_ticksnum, cpu_ticksdenom;
  85
  86         struct cpu_softc *sc = device_private(self);
  87         struct confargs *ca = aux;
  88         const char lvls[4][4] = { "0", "1", "1.5", "2" };
  89         u_int mhz = 100 * cpu_ticksnum / cpu_ticksdenom;
  90
  91         sc->sc_dev = self;
  92         cpu_attached = 1;
  93
  94         /* Print the CPU chip name, nickname, and rev. */
  95         aprint_normal(": %s", hppa_cpu_info->hci_chip_name);
  96         if (hppa_cpu_info->hci_chip_nickname != NULL)
  97                 aprint_normal(" (%s)", hppa_cpu_info->hci_chip_nickname);
  98         aprint_normal(" rev %d", cpu_revision);
  99
 100         /* Print the CPU type, spec, level, category, and speed. */
 101         aprint_normal("\n%s: %s, PA-RISC %s", self->dv_xname,
 102             hppa_cpu_info->hci_chip_type,
 103             hppa_cpu_info->hci_chip_spec);
 104         aprint_normal(", lev %s, cat %c, ",
 105             lvls[pdc_model.pa_lvl], "AB"[pdc_model.mc]);
 106
 107         aprint_normal("%d", mhz / 100);
 108         if (mhz % 100 > 9)
 109                 aprint_normal(".%02d", mhz % 100);
 110
 111         aprint_normal(" MHz clk\n%s: %s", self->dv_xname,
 112             pdc_model.sh? "shadows, ": "");
 113
 114         if (pdc_cache.dc_conf.cc_sh)
 115                 aprint_normal("%uK cache", pdc_cache.dc_size / 1024);
 116         else
 117                 aprint_normal("%uK/%uK D/I caches", pdc_cache.dc_size / 1024,
 118                     pdc_cache.ic_size / 1024);
 119         if (pdc_cache.dt_conf.tc_sh)
 120                 aprint_normal(", %u shared TLB", pdc_cache.dt_size);
 121         else
 122                 aprint_normal(", %u/%u D/I TLBs", pdc_cache.dt_size,
 123                     pdc_cache.it_size);
 124
 125         if (pdc_btlb.finfo.num_c)
 126                 aprint_normal(", %u shared BTLB", pdc_btlb.finfo.num_c);
 127         else {
 128                 aprint_normal(", %u/%u D/I BTLBs", pdc_btlb.finfo.num_i,
 129                     pdc_btlb.finfo.num_d);
 130         }
 131
 132         /*
 133          * Describe the floating-point support.
 134          */
 135 #ifndef FPEMUL
 136         if (!fpu_present)
 137                 aprint_normal("\n%s: no floating point support",
 138                     self->dv_xname);
 139         else
 140 #endif /* !FPEMUL */
 141         {
 142                 aprint_normal("\n%s: %s floating point, rev %d", self->dv_xname,
 143                     hppa_mod_info(HPPA_TYPE_FPU, (fpu_version >> 16) & 0x1f),
 144                     (fpu_version >> 11) & 0x1f);
 145         }
 146
 147         aprint_normal("\n");
 148
 149         /* sanity against luser amongst config editors */
 150         if (ca->ca_irq == 31) {
 151                 sc->sc_ih = hp700_intr_establish(sc->sc_dev, IPL_CLOCK,
 152                     clock_intr, NULL /*trapframe*/, &int_reg_cpu,
 153                     ca->ca_irq);
 154         } else {
 155                 aprint_error_dev(self, "bad irq number %d\n", ca->ca_irq);
 156         }
 157
 158         /*
 159          * Set the allocatable bits in the CPU interrupt registers.
 160          * These should only be used by major chipsets, like ASP and
 161          * LASI, and the bits used appear to be important - the
 162          * ASP doesn't seem to like to use interrupt bits above 28
 163          * or below 27.
 164          */
 165         int_reg_cpu.int_reg_allocatable_bits =
 166                 (1 << 28) | (1 << 27) | (1 << 26);
 167 }