1 /* $NetBSD: harmonyreg.h,v 1.2 2005/12/11 12:17:24 christos Exp $ */
3 /* $OpenBSD: harmonyreg.h,v 1.5 2003/06/02 19:54:29 jason Exp $ */
6 * Copyright (c) 2003 Jason L. Wright (jason@thought.net)
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
20 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
21 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
22 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
23 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
26 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
27 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
32 * Harmony CS4215/AD1849 register definitions based on:
33 * "712 I/O Subsystem ERS", Revision 1.1, 12 February 1993
36 /* harmony always uses a 4K buffer */
37 #define HARMONY_BUFSIZE 4096
39 #define HARMONY_NREGS 0x40
41 #define HARMONY_ID 0x00 /* identification */
42 #define HARMONY_RESET 0x04 /* reset */
43 #define HARMONY_CNTL 0x08 /* control */
44 #define HARMONY_GAINCTL 0x0c /* gain control */
45 #define HARMONY_PNXTADD 0x10 /* play next address */
46 #define HARMONY_PCURADD 0x14 /* play current address */
47 #define HARMONY_RNXTADD 0x18 /* record next address */
48 #define HARMONY_RCURADD 0x1c /* record current address */
49 #define HARMONY_DSTATUS 0x20 /* device status */
50 #define HARMONY_OV 0x24 /* overrange input */
51 #define HARMONY_PIO 0x28 /* general purpose i/o */
52 #define HARMONY_DIAG 0x3c /* chi diagnostic */
55 #define ID_REV_MASK 0x00ff0000 /* revision mask: */
56 #define ID_REV_SHIFT 16
57 #define ID_REV_TS 0x00150000 /* teleshare installed */
58 #define ID_REV_NOTS 0x00140000 /* teleshare not installed */
59 #define ID_CHIID 0x0000f000 /* CHI identification */
60 #define ID_CHIID_SHIFT 12
63 #define RESET_RST 0x00000001 /* reset codec */
66 #define CNTL_C 0x80000000 /* control mode */
67 #define CNTL_CODEC_REV_MASK 0x0ff00000 /* codec revision */
68 #define CNTL_CODEC_REV_SHIFT 20
69 #define CNTL_EXP_3 0x00020000 /* expansion bit 3 */
70 #define CNTL_EXP_2 0x00010000 /* expansion bit 2 */
71 #define CNTL_EXP_1 0x00008000 /* expansion bit 1 */
72 #define CNTL_EXP_0 0x00004000 /* expansion bit 0 */
73 #define CNTL_AC 0x00002000 /* autocalibration ad1849 */
74 #define CNTL_AD 0x00001000 /* ad1849 compat? */
75 #define CNTL_OLB 0x00000800 /* output level */
76 #define CNTL_ITS 0x00000400 /* codec immediate tristate */
77 #define CNTL_LS_MASK 0x00000300 /* loopback select: */
78 #define CNTL_LS_NONE 0x00000000 /* none */
79 #define CNTL_LS_INTERNAL 0x00000100 /* internal */
80 #define CNTL_LS_DIGITAL 0x00000200 /* digital */
81 #define CNTL_LS_ANALOG 0x00000300 /* analog */
82 #define CNTL_FORMAT_MASK 0x000000c0 /* encoding format: */
83 #define CNTL_FORMAT_SLINEAR16BE 0x00000000 /* 16 bit signed linear be */
84 #define CNTL_FORMAT_ULAW 0x00000040 /* 8 bit ulaw */
85 #define CNTL_FORMAT_ALAW 0x00000080 /* 8 bit alaw */
86 #define CNTL_FORMAT_ULINEAR8 0x000000c0 /* 8 bit unsigned linear */
87 #define CNTL_CHANS_MASK 0x00000020 /* number of channels: */
88 #define CNTL_CHANS_MONO 0x00000000 /* mono */
89 #define CNTL_CHANS_STEREO 0x00000020 /* stereo */
90 #define CNTL_RATE_MASK 0x0000001f /* sample rate (kHz): */
91 #define CNTL_RATE_5125 0x00000010 /* 5.5125 */
92 #define CNTL_RATE_6615 0x00000017 /* 6.615 */
93 #define CNTL_RATE_8000 0x00000008 /* 8 */
94 #define CNTL_RATE_9600 0x0000000f /* 9.6 */
95 #define CNTL_RATE_11025 0x00000011 /* 11.025 */
96 #define CNTL_RATE_16000 0x00000009 /* 16 */
97 #define CNTL_RATE_18900 0x00000012 /* 18.9 */
98 #define CNTL_RATE_22050 0x00000013 /* 22.05 */
99 #define CNTL_RATE_27428 0x0000000a /* 27.42857 */
100 #define CNTL_RATE_32000 0x0000000b /* 32 */
101 #define CNTL_RATE_33075 0x00000016 /* 33.075 */
102 #define CNTL_RATE_37800 0x00000014 /* 37.8 */
103 #define CNTL_RATE_44100 0x00000015 /* 44.1 */
104 #define CNTL_RATE_48000 0x0000000e /* 48 */
106 /* HARMONY_GAINCTL */
107 #define GAINCTL_HE 0x08000000 /* headphones enable */
108 #define GAINCTL_LE 0x04000000 /* line output enable */
109 #define GAINCTL_SE 0x02000000 /* speaker enable */
110 #define GAINCTL_IS_MASK 0x01000000 /* input select: */
111 #define GAINCTL_IS_LINE 0x00000000 /* line input */
112 #define GAINCTL_IS_MICROPHONE 0x01000000 /* microphone */
113 #define GAINCTL_INPUT_LEFT_M 0x0000f000 /* left input gain */
114 #define GAINCTL_INPUT_LEFT_S 12
115 #define GAINCTL_INPUT_RIGHT_M 0x000f0000 /* left input gain */
116 #define GAINCTL_INPUT_RIGHT_S 16
117 #define GAINCTL_INPUT_BITS 4
118 #define GAINCTL_MONITOR_M 0x00f00000 /* monitor gain (inverted) */
119 #define GAINCTL_MONITOR_S 20
120 #define GAINCTL_MONITOR_BITS 4
121 #define GAINCTL_OUTPUT_LEFT_M 0x00000fc0 /* left out gain (inverted) */
122 #define GAINCTL_OUTPUT_LEFT_S 6
123 #define GAINCTL_OUTPUT_RIGHT_M 0x0000003f /* right out gain (inverted) */
124 #define GAINCTL_OUTPUT_RIGHT_S 0
125 #define GAINCTL_OUTPUT_BITS 6
127 /* HARMONY_PCURADD */
128 #define PCURADD_BUFMASK (~(HARMONY_BUFSIZE - 1))
130 /* HARMONY_RCURADD */
131 #define RCURADD_BUFMASK (~(HARMONY_BUFSIZE - 1))
133 /* HARMONY_DSTATUS */
134 #define DSTATUS_IE 0x80000000 /* interrupt enable */
135 #define DSTATUS_PN 0x00000200 /* playback next empty */
136 #define DSTATUS_PC 0x00000100 /* playback dma active */
137 #define DSTATUS_RN 0x00000002 /* record next empty */
138 #define DSTATUS_RC 0x00000001 /* record dma active */
141 #define OV_OV 0x00000001 /* input over range */
144 #define PIO_PO 0x00000002 /* parallel output */
145 #define PIO_PI 0x00000001 /* parallel input */
148 #define DIAG_CO 0x00000001 /* sclk from codec */
151 #define CS4215_REV_VER 0x0f
152 #define CS4215_REV_VER_C 0x00 /* CS4215 rev C */
153 #define CS4215_REV_VER_D 0x01 /* CS4215 rev D */
154 #define CS4215_REV_VER_E 0x02 /* CS4215 rev E/AD1849K */
