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[netbsd-mini2440.git] / sys / arch / ia64 / disasm / disasm_extract.c
blob1b91ba9db269c08a54aad00130b27a81a8c7843d
1 /* $NetBSD$ */
2
3 /*-
4 * Copyright (c) 2000-2003 Marcel Moolenaar
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #include <sys/cdefs.h>
30 /* __FBSDID("$FreeBSD: src/sys/ia64/disasm/disasm_extract.c,v 1.2 2005/01/06 22:18:22 imp Exp $"); */
31
32 #include <sys/param.h>
33 #include <sys/systm.h>
34
35 #include <machine/stdarg.h>
36
37 #include <ia64/disasm/disasm_int.h>
38 #include <ia64/disasm/disasm.h>
39
40 #define FRAG(o,l) ((int)((o << 8) | (l & 0xff)))
41 #define FRAG_OFS(f) (f >> 8)
42 #define FRAG_LEN(f) (f & 0xff)
43
44 /*
45 * Support functions.
46 */
47 static void
48 asm_cmpltr_add(struct asm_inst *i, enum asm_cmpltr_class c,
49 enum asm_cmpltr_type t)
50 {
51
52 i->i_cmpltr[i->i_ncmpltrs].c_class = c;
53 i->i_cmpltr[i->i_ncmpltrs].c_type = t;
54 i->i_ncmpltrs++;
55 KASSERT(i->i_ncmpltrs < 6);
56 }
57
58 static void
59 asm_hint(struct asm_inst *i, enum asm_cmpltr_class c)
60 {
61
62 switch (FIELD(i->i_bits, 28, 2)) { /* hint */
63 case 0:
64 asm_cmpltr_add(i, c, ASM_CT_NONE);
65 break;
66 case 1:
67 asm_cmpltr_add(i, c, ASM_CT_NT1);
68 break;
69 case 2:
70 asm_cmpltr_add(i, c, ASM_CT_NT2);
71 break;
72 case 3:
73 asm_cmpltr_add(i, c, ASM_CT_NTA);
74 break;
75 }
76 }
77
78 static void
79 asm_sf(struct asm_inst *i)
80 {
81
82 switch (FIELD(i->i_bits, 34, 2)) {
83 case 0:
84 asm_cmpltr_add(i, ASM_CC_SF, ASM_CT_S0);
85 break;
86 case 1:
87 asm_cmpltr_add(i, ASM_CC_SF, ASM_CT_S1);
88 break;
89 case 2:
90 asm_cmpltr_add(i, ASM_CC_SF, ASM_CT_S2);
91 break;
92 case 3:
93 asm_cmpltr_add(i, ASM_CC_SF, ASM_CT_S3);
94 break;
95 }
96 }
97
98 static void
99 asm_brhint(struct asm_inst *i)
100 {
101 uint64_t bits = i->i_bits;
102
103 switch (FIELD(bits, 33, 2)) { /* bwh */
104 case 0:
105 asm_cmpltr_add(i, ASM_CC_BWH, ASM_CT_SPTK);
106 break;
107 case 1:
108 asm_cmpltr_add(i, ASM_CC_BWH, ASM_CT_SPNT);
109 break;
110 case 2:
111 asm_cmpltr_add(i, ASM_CC_BWH, ASM_CT_DPTK);
112 break;
113 case 3:
114 asm_cmpltr_add(i, ASM_CC_BWH, ASM_CT_DPNT);
115 break;
116 }
117
118 if (FIELD(bits, 12, 1)) /* ph */
119 asm_cmpltr_add(i, ASM_CC_PH, ASM_CT_MANY);
120 else
121 asm_cmpltr_add(i, ASM_CC_PH, ASM_CT_FEW);
122
123 if (FIELD(bits, 35, 1)) /* dh */
124 asm_cmpltr_add(i, ASM_CC_DH, ASM_CT_CLR);
125 else
126 asm_cmpltr_add(i, ASM_CC_DH, ASM_CT_NONE);
127 }
128
129 static void
130 asm_brphint(struct asm_inst *i)
131 {
132 uint64_t bits = i->i_bits;
133
134 switch (FIELD(bits, 3, 2)) { /* ipwh, indwh */
135 case 0:
136 asm_cmpltr_add(i, ASM_CC_IPWH, ASM_CT_SPTK);
137 break;
138 case 1:
139 asm_cmpltr_add(i, ASM_CC_IPWH, ASM_CT_LOOP);
140 break;
141 case 2:
142 asm_cmpltr_add(i, ASM_CC_IPWH, ASM_CT_DPTK);
143 break;
144 case 3:
145 asm_cmpltr_add(i, ASM_CC_IPWH, ASM_CT_EXIT);
146 break;
147 }
148
149 if (FIELD(bits, 5, 1)) /* ph */
150 asm_cmpltr_add(i, ASM_CC_PH, ASM_CT_MANY);
151 else
152 asm_cmpltr_add(i, ASM_CC_PH, ASM_CT_FEW);
153
154 switch (FIELD(bits, 0, 3)) { /* pvec */
155 case 0:
156 asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_DC_DC);
157 break;
158 case 1:
159 asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_DC_NT);
160 break;
161 case 2:
162 asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_TK_DC);
163 break;
164 case 3:
165 asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_TK_TK);
166 break;
167 case 4:
168 asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_TK_NT);
169 break;
170 case 5:
171 asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_NT_DC);
172 break;
173 case 6:
174 asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_NT_TK);
175 break;
176 case 7:
177 asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_NT_NT);
178 break;
179 }
180
181 if (FIELD(bits, 35, 1)) /* ih */
182 asm_cmpltr_add(i, ASM_CC_IH, ASM_CT_IMP);
183 else
184 asm_cmpltr_add(i, ASM_CC_IH, ASM_CT_NONE);
185 }
186
187 static enum asm_oper_type
188 asm_normalize(struct asm_inst *i, enum asm_op op)
189 {
190 enum asm_oper_type ot = ASM_OPER_NONE;
191
192 switch (op) {
193 case ASM_OP_BR_CALL:
194 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_CALL);
195 op = ASM_OP_BR;
196 break;
197 case ASM_OP_BR_CEXIT:
198 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_CEXIT);
199 op = ASM_OP_BR;
200 break;
201 case ASM_OP_BR_CLOOP:
202 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_CLOOP);
203 op = ASM_OP_BR;
204 break;
205 case ASM_OP_BR_COND:
206 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_COND);
207 op = ASM_OP_BR;
208 break;
209 case ASM_OP_BR_CTOP:
210 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_CTOP);
211 op = ASM_OP_BR;
212 break;
213 case ASM_OP_BR_IA:
214 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_IA);
215 op = ASM_OP_BR;
216 break;
217 case ASM_OP_BR_RET:
218 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_RET);
219 op = ASM_OP_BR;
220 break;
221 case ASM_OP_BR_WEXIT:
222 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_WEXIT);
223 op = ASM_OP_BR;
224 break;
225 case ASM_OP_BR_WTOP:
226 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_WTOP);
227 op = ASM_OP_BR;
228 break;
229 case ASM_OP_BREAK_B:
230 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_B);
231 op = ASM_OP_BREAK;
232 break;
233 case ASM_OP_BREAK_F:
234 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_F);
235 op = ASM_OP_BREAK;
236 break;
237 case ASM_OP_BREAK_I:
238 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_I);
239 op = ASM_OP_BREAK;
240 break;
241 case ASM_OP_BREAK_M:
242 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_M);
243 op = ASM_OP_BREAK;
244 break;
245 case ASM_OP_BREAK_X:
246 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_X);
247 op = ASM_OP_BREAK;
248 break;
249 case ASM_OP_BRL_COND:
250 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_COND);
251 op = ASM_OP_BRL;
252 break;
253 case ASM_OP_BRL_CALL:
254 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_CALL);
255 op = ASM_OP_BRL;
256 break;
257 case ASM_OP_BRP_:
258 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_NONE);
259 op = ASM_OP_BRP;
260 break;
261 case ASM_OP_BRP_RET:
262 asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_RET);
263 op = ASM_OP_BRP;
264 break;
265 case ASM_OP_BSW_0:
266 asm_cmpltr_add(i, ASM_CC_BSW, ASM_CT_0);
267 op = ASM_OP_BSW;
268 break;
269 case ASM_OP_BSW_1:
270 asm_cmpltr_add(i, ASM_CC_BSW, ASM_CT_1);
271 op = ASM_OP_BSW;
272 break;
273 case ASM_OP_CHK_A_CLR:
274 asm_cmpltr_add(i, ASM_CC_CHK, ASM_CT_A);
275 asm_cmpltr_add(i, ASM_CC_ACLR, ASM_CT_CLR);
276 op = ASM_OP_CHK;
277 break;
278 case ASM_OP_CHK_A_NC:
279 asm_cmpltr_add(i, ASM_CC_CHK, ASM_CT_A);
280 asm_cmpltr_add(i, ASM_CC_ACLR, ASM_CT_NC);
281 op = ASM_OP_CHK;
282 break;
283 case ASM_OP_CHK_S:
284 asm_cmpltr_add(i, ASM_CC_CHK, ASM_CT_S);
285 op = ASM_OP_CHK;
286 break;
287 case ASM_OP_CHK_S_I:
288 asm_cmpltr_add(i, ASM_CC_CHK, ASM_CT_S);
289 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_I);
290 op = ASM_OP_CHK;
291 break;
292 case ASM_OP_CHK_S_M:
293 asm_cmpltr_add(i, ASM_CC_CHK, ASM_CT_S);
294 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_M);
295 op = ASM_OP_CHK;
296 break;
297 case ASM_OP_CLRRRB_:
298 asm_cmpltr_add(i, ASM_CC_CLRRRB, ASM_CT_NONE);
299 op = ASM_OP_CLRRRB;
300 break;
301 case ASM_OP_CLRRRB_PR:
302 asm_cmpltr_add(i, ASM_CC_CLRRRB, ASM_CT_PR);
303 op = ASM_OP_CLRRRB;
304 break;
305 case ASM_OP_CMP_EQ:
306 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
307 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE);
308 op = ASM_OP_CMP;
309 break;
310 case ASM_OP_CMP_EQ_AND:
311 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
312 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
313 op = ASM_OP_CMP;
314 break;
315 case ASM_OP_CMP_EQ_OR:
316 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
317 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
318 op = ASM_OP_CMP;
319 break;
320 case ASM_OP_CMP_EQ_OR_ANDCM:
321 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
322 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
323 op = ASM_OP_CMP;
324 break;
325 case ASM_OP_CMP_EQ_UNC:
326 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
327 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC);
328 op = ASM_OP_CMP;
329 break;
330 case ASM_OP_CMP_GE_AND:
331 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GE);
332 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
333 op = ASM_OP_CMP;
334 break;
335 case ASM_OP_CMP_GE_OR:
336 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GE);
337 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
338 op = ASM_OP_CMP;
339 break;
340 case ASM_OP_CMP_GE_OR_ANDCM:
341 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GE);
342 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
343 op = ASM_OP_CMP;
344 break;
345 case ASM_OP_CMP_GT_AND:
346 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GT);
347 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
348 op = ASM_OP_CMP;
349 break;
350 case ASM_OP_CMP_GT_OR:
351 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GT);
352 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
353 op = ASM_OP_CMP;
354 break;
355 case ASM_OP_CMP_GT_OR_ANDCM:
356 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GT);
357 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
358 op = ASM_OP_CMP;
359 break;
360 case ASM_OP_CMP_LE_AND:
361 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LE);
362 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
363 op = ASM_OP_CMP;
364 break;
365 case ASM_OP_CMP_LE_OR:
366 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LE);
367 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
368 op = ASM_OP_CMP;
369 break;
370 case ASM_OP_CMP_LE_OR_ANDCM:
371 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LE);
372 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
373 op = ASM_OP_CMP;
374 break;
375 case ASM_OP_CMP_LT:
376 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
377 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE);
378 op = ASM_OP_CMP;
379 break;
380 case ASM_OP_CMP_LT_AND:
381 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
382 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
383 op = ASM_OP_CMP;
384 break;
385 case ASM_OP_CMP_LT_OR:
386 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
387 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
388 op = ASM_OP_CMP;
389 break;
390 case ASM_OP_CMP_LT_OR_ANDCM:
391 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
392 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
393 op = ASM_OP_CMP;
394 break;
395 case ASM_OP_CMP_LT_UNC:
396 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
397 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC);
398 op = ASM_OP_CMP;
399 break;
400 case ASM_OP_CMP_LTU:
401 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LTU);
402 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE);
403 op = ASM_OP_CMP;
404 break;
405 case ASM_OP_CMP_LTU_UNC:
406 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LTU);
407 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC);
408 op = ASM_OP_CMP;
409 break;
410 case ASM_OP_CMP_NE_AND:
411 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_NE);
412 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
413 op = ASM_OP_CMP;
414 break;
415 case ASM_OP_CMP_NE_OR:
416 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_NE);
417 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
418 op = ASM_OP_CMP;
419 break;
420 case ASM_OP_CMP_NE_OR_ANDCM:
421 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_NE);
422 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
423 op = ASM_OP_CMP;
424 break;
425 case ASM_OP_CMP4_EQ:
426 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
427 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE);
428 op = ASM_OP_CMP4;
429 break;
430 case ASM_OP_CMP4_EQ_AND:
431 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
432 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
433 op = ASM_OP_CMP4;
434 break;
435 case ASM_OP_CMP4_EQ_OR:
436 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
437 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
438 op = ASM_OP_CMP4;
439 break;
440 case ASM_OP_CMP4_EQ_OR_ANDCM:
441 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
442 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
443 op = ASM_OP_CMP4;
444 break;
445 case ASM_OP_CMP4_EQ_UNC:
446 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
447 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC);
448 op = ASM_OP_CMP4;
449 break;
450 case ASM_OP_CMP4_GE_AND:
451 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GE);
452 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
453 op = ASM_OP_CMP4;
454 break;
455 case ASM_OP_CMP4_GE_OR:
456 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GE);
457 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
458 op = ASM_OP_CMP4;
459 break;
460 case ASM_OP_CMP4_GE_OR_ANDCM:
461 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GE);
462 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
463 op = ASM_OP_CMP4;
464 break;
465 case ASM_OP_CMP4_GT_AND:
466 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GT);
467 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
468 op = ASM_OP_CMP4;
469 break;
470 case ASM_OP_CMP4_GT_OR:
471 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GT);
472 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
473 op = ASM_OP_CMP4;
474 break;
475 case ASM_OP_CMP4_GT_OR_ANDCM:
476 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GT);
477 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
478 op = ASM_OP_CMP4;
479 break;
480 case ASM_OP_CMP4_LE_AND:
481 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LE);
482 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
483 op = ASM_OP_CMP4;
484 break;
485 case ASM_OP_CMP4_LE_OR:
486 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LE);
487 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
488 op = ASM_OP_CMP4;
489 break;
490 case ASM_OP_CMP4_LE_OR_ANDCM:
491 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LE);
492 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
493 op = ASM_OP_CMP4;
494 break;
495 case ASM_OP_CMP4_LT:
496 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
497 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE);
498 op = ASM_OP_CMP4;
499 break;
500 case ASM_OP_CMP4_LT_AND:
501 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
502 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
503 op = ASM_OP_CMP4;
504 break;
505 case ASM_OP_CMP4_LT_OR:
506 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
507 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
508 op = ASM_OP_CMP4;
509 break;
510 case ASM_OP_CMP4_LT_OR_ANDCM:
511 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
512 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
513 op = ASM_OP_CMP4;
514 break;
515 case ASM_OP_CMP4_LT_UNC:
516 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
517 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC);
518 op = ASM_OP_CMP4;
519 break;
520 case ASM_OP_CMP4_LTU:
521 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LTU);
522 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE);
523 op = ASM_OP_CMP4;
524 break;
525 case ASM_OP_CMP4_LTU_UNC:
526 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LTU);
527 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC);
528 op = ASM_OP_CMP4;
529 break;
530 case ASM_OP_CMP4_NE_AND:
531 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_NE);
532 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
533 op = ASM_OP_CMP4;
534 break;
535 case ASM_OP_CMP4_NE_OR:
536 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_NE);
537 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
538 op = ASM_OP_CMP4;
539 break;
540 case ASM_OP_CMP4_NE_OR_ANDCM:
541 asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_NE);
542 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
543 op = ASM_OP_CMP4;
544 break;
545 case ASM_OP_CMP8XCHG16_ACQ:
546 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_ACQ);
547 op = ASM_OP_CMP8XCHG16;
548 break;
549 case ASM_OP_CMP8XCHG16_REL:
550 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_REL);
551 op = ASM_OP_CMP8XCHG16;
552 break;
553 case ASM_OP_CMPXCHG1_ACQ:
554 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_ACQ);
555 op = ASM_OP_CMPXCHG1;
556 break;
557 case ASM_OP_CMPXCHG1_REL:
558 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_REL);
559 op = ASM_OP_CMPXCHG1;
560 break;
561 case ASM_OP_CMPXCHG2_ACQ:
562 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_ACQ);
563 op = ASM_OP_CMPXCHG2;
564 break;
565 case ASM_OP_CMPXCHG2_REL:
566 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_REL);
567 op = ASM_OP_CMPXCHG2;
568 break;
569 case ASM_OP_CMPXCHG4_ACQ:
570 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_ACQ);
571 op = ASM_OP_CMPXCHG4;
572 break;
573 case ASM_OP_CMPXCHG4_REL:
574 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_REL);
575 op = ASM_OP_CMPXCHG4;
576 break;
577 case ASM_OP_CMPXCHG8_ACQ:
578 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_ACQ);
579 op = ASM_OP_CMPXCHG8;
580 break;
581 case ASM_OP_CMPXCHG8_REL:
582 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_REL);
583 op = ASM_OP_CMPXCHG8;
584 break;
585 case ASM_OP_CZX1_L:
586 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L);
587 op = ASM_OP_CZX1;
588 break;
589 case ASM_OP_CZX1_R:
590 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R);
591 op = ASM_OP_CZX1;
592 break;
593 case ASM_OP_CZX2_L:
594 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L);
595 op = ASM_OP_CZX2;
596 break;
597 case ASM_OP_CZX2_R:
598 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R);
599 op = ASM_OP_CZX2;
600 break;
601 case ASM_OP_DEP_:
602 asm_cmpltr_add(i, ASM_CC_DEP, ASM_CT_NONE);
603 op = ASM_OP_DEP;
604 break;
605 case ASM_OP_DEP_Z:
606 asm_cmpltr_add(i, ASM_CC_DEP, ASM_CT_Z);
607 op = ASM_OP_DEP;
608 break;
609 case ASM_OP_FC_:
610 asm_cmpltr_add(i, ASM_CC_FC, ASM_CT_NONE);
611 op = ASM_OP_FC;
612 break;
613 case ASM_OP_FC_I:
614 asm_cmpltr_add(i, ASM_CC_FC, ASM_CT_I);
615 op = ASM_OP_FC;
616 break;
617 case ASM_OP_FCLASS_M:
618 asm_cmpltr_add(i, ASM_CC_FCREL, ASM_CT_M);
619 op = ASM_OP_FCLASS;
620 break;
621 case ASM_OP_FCVT_FX:
622 asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FX);
623 asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_NONE);
624 op = ASM_OP_FCVT;
625 break;
626 case ASM_OP_FCVT_FX_TRUNC:
627 asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FX);
628 asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_TRUNC);
629 op = ASM_OP_FCVT;
630 break;
631 case ASM_OP_FCVT_FXU:
632 asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FXU);
633 asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_NONE);
634 op = ASM_OP_FCVT;
635 break;
636 case ASM_OP_FCVT_FXU_TRUNC:
637 asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FXU);
638 asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_TRUNC);
639 op = ASM_OP_FCVT;
640 break;
641 case ASM_OP_FCVT_XF:
642 asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_XF);
643 asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_NONE);
644 op = ASM_OP_FCVT;
645 break;
646 case ASM_OP_FETCHADD4_ACQ:
647 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_ACQ);
648 op = ASM_OP_FETCHADD4;
649 break;
650 case ASM_OP_FETCHADD4_REL:
651 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_REL);
652 op = ASM_OP_FETCHADD4;
653 break;
654 case ASM_OP_FETCHADD8_ACQ:
655 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_ACQ);
656 op = ASM_OP_FETCHADD8;
657 break;
658 case ASM_OP_FETCHADD8_REL:
659 asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_REL);
660 op = ASM_OP_FETCHADD8;
661 break;
662 case ASM_OP_FMA_:
663 asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_NONE);
664 op = ASM_OP_FMA;
665 break;
666 case ASM_OP_FMA_D:
667 asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_D);
668 op = ASM_OP_FMA;
669 break;
670 case ASM_OP_FMA_S:
671 asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_S);
672 op = ASM_OP_FMA;
673 break;
674 case ASM_OP_FMERGE_NS:
675 asm_cmpltr_add(i, ASM_CC_FMERGE, ASM_CT_NS);
676 op = ASM_OP_FMERGE;
677 break;
678 case ASM_OP_FMERGE_S:
679 asm_cmpltr_add(i, ASM_CC_FMERGE, ASM_CT_S);
680 op = ASM_OP_FMERGE;
681 break;
682 case ASM_OP_FMERGE_SE:
683 asm_cmpltr_add(i, ASM_CC_FMERGE, ASM_CT_SE);
684 op = ASM_OP_FMERGE;
685 break;
686 case ASM_OP_FMIX_L:
687 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L);
688 op = ASM_OP_FMIX;
689 break;
690 case ASM_OP_FMIX_LR:
691 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_LR);
692 op = ASM_OP_FMIX;
693 break;
694 case ASM_OP_FMIX_R:
695 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R);
696 op = ASM_OP_FMIX;
697 break;
698 case ASM_OP_FMS_:
699 asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_NONE);
700 op = ASM_OP_FMS;
701 break;
702 case ASM_OP_FMS_D:
703 asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_D);
704 op = ASM_OP_FMS;
705 break;
706 case ASM_OP_FMS_S:
707 asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_S);
708 op = ASM_OP_FMS;
709 break;
710 case ASM_OP_FNMA_:
711 asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_NONE);
712 op = ASM_OP_FNMA;
713 break;
714 case ASM_OP_FNMA_D:
715 asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_D);
716 op = ASM_OP_FNMA;
717 break;
718 case ASM_OP_FNMA_S:
719 asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_S);
720 op = ASM_OP_FNMA;
721 break;
722 case ASM_OP_FPCMP_EQ:
723 asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_EQ);
724 op = ASM_OP_FPCMP;
725 break;
726 case ASM_OP_FPCMP_LE:
727 asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_LE);
728 op = ASM_OP_FPCMP;
729 break;
730 case ASM_OP_FPCMP_LT:
731 asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_LT);
732 op = ASM_OP_FPCMP;
733 break;
734 case ASM_OP_FPCMP_NEQ:
735 asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_NEQ);
736 op = ASM_OP_FPCMP;
737 break;
738 case ASM_OP_FPCMP_NLE:
739 asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_NLE);
740 op = ASM_OP_FPCMP;
741 break;
742 case ASM_OP_FPCMP_NLT:
743 asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_NLT);
744 op = ASM_OP_FPCMP;
745 break;
746 case ASM_OP_FPCMP_ORD:
747 asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_ORD);
748 op = ASM_OP_FPCMP;
749 break;
750 case ASM_OP_FPCMP_UNORD:
751 asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_UNORD);
752 op = ASM_OP_FPCMP;
753 break;
754 case ASM_OP_FPCVT_FX:
755 asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FX);
756 asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_NONE);
757 op = ASM_OP_FPCVT;
758 break;
759 case ASM_OP_FPCVT_FX_TRUNC:
760 asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FX);
761 asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_TRUNC);
762 op = ASM_OP_FPCVT;
763 break;
764 case ASM_OP_FPCVT_FXU:
765 asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FXU);
766 asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_NONE);
767 op = ASM_OP_FPCVT;
768 break;
769 case ASM_OP_FPCVT_FXU_TRUNC:
770 asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FXU);
771 asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_TRUNC);
772 op = ASM_OP_FPCVT;
773 break;
774 case ASM_OP_FPMERGE_NS:
775 asm_cmpltr_add(i, ASM_CC_FMERGE, ASM_CT_NS);
776 op = ASM_OP_FPMERGE;
777 break;
778 case ASM_OP_FPMERGE_S:
779 asm_cmpltr_add(i, ASM_CC_FMERGE, ASM_CT_S);
780 op = ASM_OP_FPMERGE;
781 break;
782 case ASM_OP_FPMERGE_SE:
783 asm_cmpltr_add(i, ASM_CC_FMERGE, ASM_CT_SE);
784 op = ASM_OP_FPMERGE;
785 break;
786 case ASM_OP_FSWAP_:
787 asm_cmpltr_add(i, ASM_CC_FSWAP, ASM_CT_NONE);
788 op = ASM_OP_FSWAP;
789 break;
790 case ASM_OP_FSWAP_NL:
791 asm_cmpltr_add(i, ASM_CC_FSWAP, ASM_CT_NL);
792 op = ASM_OP_FSWAP;
793 break;
794 case ASM_OP_FSWAP_NR:
795 asm_cmpltr_add(i, ASM_CC_FSWAP, ASM_CT_NR);
796 op = ASM_OP_FSWAP;
797 break;
798 case ASM_OP_FSXT_L:
799 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L);
800 op = ASM_OP_FSXT;
801 break;
802 case ASM_OP_FSXT_R:
803 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R);
804 op = ASM_OP_FSXT;
805 break;
806 case ASM_OP_GETF_D:
807 asm_cmpltr_add(i, ASM_CC_GETF, ASM_CT_D);
808 op = ASM_OP_GETF;
809 break;
810 case ASM_OP_GETF_EXP:
811 asm_cmpltr_add(i, ASM_CC_GETF, ASM_CT_EXP);
812 op = ASM_OP_GETF;
813 break;
814 case ASM_OP_GETF_S:
815 asm_cmpltr_add(i, ASM_CC_GETF, ASM_CT_S);
816 op = ASM_OP_GETF;
817 break;
818 case ASM_OP_GETF_SIG:
819 asm_cmpltr_add(i, ASM_CC_GETF, ASM_CT_SIG);
820 op = ASM_OP_GETF;
821 break;
822 case ASM_OP_INVALA_:
823 asm_cmpltr_add(i, ASM_CC_INVALA, ASM_CT_NONE);
824 op = ASM_OP_INVALA;
825 break;
826 case ASM_OP_INVALA_E:
827 asm_cmpltr_add(i, ASM_CC_INVALA, ASM_CT_E);
828 op = ASM_OP_INVALA;
829 break;
830 case ASM_OP_ITC_D:
831 asm_cmpltr_add(i, ASM_CC_ITC, ASM_CT_D);
832 op = ASM_OP_ITC;
833 break;
834 case ASM_OP_ITC_I:
835 asm_cmpltr_add(i, ASM_CC_ITC, ASM_CT_I);
836 op = ASM_OP_ITC;
837 break;
838 case ASM_OP_ITR_D:
839 asm_cmpltr_add(i, ASM_CC_ITR, ASM_CT_D);
840 ot = ASM_OPER_DTR;
841 op = ASM_OP_ITR;
842 break;
843 case ASM_OP_ITR_I:
844 asm_cmpltr_add(i, ASM_CC_ITR, ASM_CT_I);
845 ot = ASM_OPER_ITR;
846 op = ASM_OP_ITR;
847 break;
848 case ASM_OP_LD1_:
849 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_NONE);
850 op = ASM_OP_LD1;
851 break;
852 case ASM_OP_LD1_A:
853 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_A);
854 op = ASM_OP_LD1;
855 break;
856 case ASM_OP_LD1_ACQ:
857 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_ACQ);
858 op = ASM_OP_LD1;
859 break;
860 case ASM_OP_LD1_BIAS:
861 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_BIAS);
862 op = ASM_OP_LD1;
863 break;
864 case ASM_OP_LD1_C_CLR:
865 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR);
866 op = ASM_OP_LD1;
867 break;
868 case ASM_OP_LD1_C_CLR_ACQ:
869 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR_ACQ);
870 op = ASM_OP_LD1;
871 break;
872 case ASM_OP_LD1_C_NC:
873 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_NC);
874 op = ASM_OP_LD1;
875 break;
876 case ASM_OP_LD1_S:
877 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_S);
878 op = ASM_OP_LD1;
879 break;
880 case ASM_OP_LD1_SA:
881 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_SA);
882 op = ASM_OP_LD1;
883 break;
884 case ASM_OP_LD16_:
885 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_NONE);
886 op = ASM_OP_LD16;
887 break;
888 case ASM_OP_LD16_ACQ:
889 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_ACQ);
890 op = ASM_OP_LD16;
891 break;
892 case ASM_OP_LD2_:
893 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_NONE);
894 op = ASM_OP_LD2;
895 break;
896 case ASM_OP_LD2_A:
897 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_A);
898 op = ASM_OP_LD2;
899 break;
900 case ASM_OP_LD2_ACQ:
901 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_ACQ);
902 op = ASM_OP_LD2;
903 break;
904 case ASM_OP_LD2_BIAS:
905 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_BIAS);
906 op = ASM_OP_LD2;
907 break;
908 case ASM_OP_LD2_C_CLR:
909 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR);
910 op = ASM_OP_LD2;
911 break;
912 case ASM_OP_LD2_C_CLR_ACQ:
913 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR_ACQ);
914 op = ASM_OP_LD2;
915 break;
916 case ASM_OP_LD2_C_NC:
917 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_NC);
918 op = ASM_OP_LD2;
919 break;
920 case ASM_OP_LD2_S:
921 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_S);
922 op = ASM_OP_LD2;
923 break;
924 case ASM_OP_LD2_SA:
925 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_SA);
926 op = ASM_OP_LD2;
927 break;
928 case ASM_OP_LD4_:
929 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_NONE);
930 op = ASM_OP_LD4;
931 break;
932 case ASM_OP_LD4_A:
933 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_A);
934 op = ASM_OP_LD4;
935 break;
936 case ASM_OP_LD4_ACQ:
937 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_ACQ);
938 op = ASM_OP_LD4;
939 break;
940 case ASM_OP_LD4_BIAS:
941 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_BIAS);
942 op = ASM_OP_LD4;
943 break;
944 case ASM_OP_LD4_C_CLR:
945 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR);
946 op = ASM_OP_LD4;
947 break;
948 case ASM_OP_LD4_C_CLR_ACQ:
949 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR_ACQ);
950 op = ASM_OP_LD4;
951 break;
952 case ASM_OP_LD4_C_NC:
953 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_NC);
954 op = ASM_OP_LD4;
955 break;
956 case ASM_OP_LD4_S:
957 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_S);
958 op = ASM_OP_LD4;
959 break;
960 case ASM_OP_LD4_SA:
961 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_SA);
962 op = ASM_OP_LD4;
963 break;
964 case ASM_OP_LD8_:
965 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_NONE);
966 op = ASM_OP_LD8;
967 break;
968 case ASM_OP_LD8_A:
969 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_A);
970 op = ASM_OP_LD8;
971 break;
972 case ASM_OP_LD8_ACQ:
973 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_ACQ);
974 op = ASM_OP_LD8;
975 break;
976 case ASM_OP_LD8_BIAS:
977 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_BIAS);
978 op = ASM_OP_LD8;
979 break;
980 case ASM_OP_LD8_C_CLR:
981 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR);
982 op = ASM_OP_LD8;
983 break;
984 case ASM_OP_LD8_C_CLR_ACQ:
985 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR_ACQ);
986 op = ASM_OP_LD8;
987 break;
988 case ASM_OP_LD8_C_NC:
989 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_NC);
990 op = ASM_OP_LD8;
991 break;
992 case ASM_OP_LD8_FILL:
993 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_FILL);
994 op = ASM_OP_LD8;
995 break;
996 case ASM_OP_LD8_S:
997 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_S);
998 op = ASM_OP_LD8;
999 break;
1000 case ASM_OP_LD8_SA:
1001 asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_SA);
1002 op = ASM_OP_LD8;
1003 break;
1004 case ASM_OP_LDF_FILL:
1005 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_FILL);
1006 op = ASM_OP_LDF;
1007 break;
1008 case ASM_OP_LDF8_:
1009 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_NONE);
1010 op = ASM_OP_LDF8;
1011 break;
1012 case ASM_OP_LDF8_A:
1013 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_A);
1014 op = ASM_OP_LDF8;
1015 break;
1016 case ASM_OP_LDF8_C_CLR:
1017 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_CLR);
1018 op = ASM_OP_LDF8;
1019 break;
1020 case ASM_OP_LDF8_C_NC:
1021 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_NC);
1022 op = ASM_OP_LDF8;
1023 break;
1024 case ASM_OP_LDF8_S:
1025 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_S);
1026 op = ASM_OP_LDF8;
1027 break;
1028 case ASM_OP_LDF8_SA:
1029 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_SA);
1030 op = ASM_OP_LDF8;
1031 break;
1032 case ASM_OP_LDFD_:
1033 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_NONE);
1034 op = ASM_OP_LDFD;
1035 break;
1036 case ASM_OP_LDFD_A:
1037 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_A);
1038 op = ASM_OP_LDFD;
1039 break;
1040 case ASM_OP_LDFD_C_CLR:
1041 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_CLR);
1042 op = ASM_OP_LDFD;
1043 break;
1044 case ASM_OP_LDFD_C_NC:
1045 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_NC);
1046 op = ASM_OP_LDFD;
1047 break;
1048 case ASM_OP_LDFD_S:
1049 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_S);
1050 op = ASM_OP_LDFD;
1051 break;
1052 case ASM_OP_LDFD_SA:
1053 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_SA);
1054 op = ASM_OP_LDFD;
1055 break;
1056 case ASM_OP_LDFE_:
1057 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_NONE);
1058 op = ASM_OP_LDFE;
1059 break;
1060 case ASM_OP_LDFE_A:
1061 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_A);
1062 op = ASM_OP_LDFE;
1063 break;
1064 case ASM_OP_LDFE_C_CLR:
1065 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_CLR);
1066 op = ASM_OP_LDFE;
1067 break;
1068 case ASM_OP_LDFE_C_NC:
1069 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_NC);
1070 op = ASM_OP_LDFE;
1071 break;
1072 case ASM_OP_LDFE_S:
1073 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_S);
1074 op = ASM_OP_LDFE;
1075 break;
1076 case ASM_OP_LDFE_SA:
1077 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_SA);
1078 op = ASM_OP_LDFE;
1079 break;
1080 case ASM_OP_LDFP8_:
1081 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_NONE);
1082 op = ASM_OP_LDFP8;
1083 break;
1084 case ASM_OP_LDFP8_A:
1085 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_A);
1086 op = ASM_OP_LDFP8;
1087 break;
1088 case ASM_OP_LDFP8_C_CLR:
1089 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_CLR);
1090 op = ASM_OP_LDFP8;
1091 break;
1092 case ASM_OP_LDFP8_C_NC:
1093 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_NC);
1094 op = ASM_OP_LDFP8;
1095 break;
1096 case ASM_OP_LDFP8_S:
1097 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_S);
1098 op = ASM_OP_LDFP8;
1099 break;
1100 case ASM_OP_LDFP8_SA:
1101 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_SA);
1102 op = ASM_OP_LDFP8;
1103 break;
1104 case ASM_OP_LDFPD_:
1105 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_NONE);
1106 op = ASM_OP_LDFPD;
1107 break;
1108 case ASM_OP_LDFPD_A:
1109 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_A);
1110 op = ASM_OP_LDFPD;
1111 break;
1112 case ASM_OP_LDFPD_C_CLR:
1113 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_CLR);
1114 op = ASM_OP_LDFPD;
1115 break;
1116 case ASM_OP_LDFPD_C_NC:
1117 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_NC);
1118 op = ASM_OP_LDFPD;
1119 break;
1120 case ASM_OP_LDFPD_S:
1121 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_S);
1122 op = ASM_OP_LDFPD;
1123 break;
1124 case ASM_OP_LDFPD_SA:
1125 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_SA);
1126 op = ASM_OP_LDFPD;
1127 break;
1128 case ASM_OP_LDFPS_:
1129 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_NONE);
1130 op = ASM_OP_LDFPS;
1131 break;
1132 case ASM_OP_LDFPS_A:
1133 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_A);
1134 op = ASM_OP_LDFPS;
1135 break;
1136 case ASM_OP_LDFPS_C_CLR:
1137 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_CLR);
1138 op = ASM_OP_LDFPS;
1139 break;
1140 case ASM_OP_LDFPS_C_NC:
1141 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_NC);
1142 op = ASM_OP_LDFPS;
1143 break;
1144 case ASM_OP_LDFPS_S:
1145 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_S);
1146 op = ASM_OP_LDFPS;
1147 break;
1148 case ASM_OP_LDFPS_SA:
1149 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_SA);
1150 op = ASM_OP_LDFPS;
1151 break;
1152 case ASM_OP_LDFS_:
1153 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_NONE);
1154 op = ASM_OP_LDFS;
1155 break;
1156 case ASM_OP_LDFS_A:
1157 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_A);
1158 op = ASM_OP_LDFS;
1159 break;
1160 case ASM_OP_LDFS_C_CLR:
1161 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_CLR);
1162 op = ASM_OP_LDFS;
1163 break;
1164 case ASM_OP_LDFS_C_NC:
1165 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_NC);
1166 op = ASM_OP_LDFS;
1167 break;
1168 case ASM_OP_LDFS_S:
1169 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_S);
1170 op = ASM_OP_LDFS;
1171 break;
1172 case ASM_OP_LDFS_SA:
1173 asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_SA);
1174 op = ASM_OP_LDFS;
1175 break;
1176 case ASM_OP_LFETCH_:
1177 asm_cmpltr_add(i, ASM_CC_LFTYPE, ASM_CT_NONE);
1178 asm_cmpltr_add(i, ASM_CC_LFETCH, ASM_CT_NONE);
1179 op = ASM_OP_LFETCH;
1180 break;
1181 case ASM_OP_LFETCH_EXCL:
1182 asm_cmpltr_add(i, ASM_CC_LFTYPE, ASM_CT_NONE);
1183 asm_cmpltr_add(i, ASM_CC_LFETCH, ASM_CT_EXCL);
1184 op = ASM_OP_LFETCH;
1185 break;
1186 case ASM_OP_LFETCH_FAULT:
1187 asm_cmpltr_add(i, ASM_CC_LFTYPE, ASM_CT_FAULT);
1188 asm_cmpltr_add(i, ASM_CC_LFETCH, ASM_CT_NONE);
1189 op = ASM_OP_LFETCH;
1190 break;
1191 case ASM_OP_LFETCH_FAULT_EXCL:
1192 asm_cmpltr_add(i, ASM_CC_LFTYPE, ASM_CT_FAULT);
1193 asm_cmpltr_add(i, ASM_CC_LFETCH, ASM_CT_EXCL);
1194 op = ASM_OP_LFETCH;
1195 break;
1196 case ASM_OP_MF_:
1197 asm_cmpltr_add(i, ASM_CC_MF, ASM_CT_NONE);
1198 op = ASM_OP_MF;
1199 break;
1200 case ASM_OP_MF_A:
1201 asm_cmpltr_add(i, ASM_CC_MF, ASM_CT_A);
1202 op = ASM_OP_MF;
1203 break;
1204 case ASM_OP_MIX1_L:
1205 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L);
1206 op = ASM_OP_MIX1;
1207 break;
1208 case ASM_OP_MIX1_R:
1209 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R);
1210 op = ASM_OP_MIX1;
1211 break;
1212 case ASM_OP_MIX2_L:
1213 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L);
1214 op = ASM_OP_MIX2;
1215 break;
1216 case ASM_OP_MIX2_R:
1217 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R);
1218 op = ASM_OP_MIX2;
1219 break;
1220 case ASM_OP_MIX4_L:
1221 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L);
1222 op = ASM_OP_MIX4;
1223 break;
1224 case ASM_OP_MIX4_R:
1225 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R);
1226 op = ASM_OP_MIX4;
1227 break;
1228 case ASM_OP_MOV_:
1229 asm_cmpltr_add(i, ASM_CC_MOV, ASM_CT_NONE);
1230 op = ASM_OP_MOV;
1231 break;
1232 case ASM_OP_MOV_I:
1233 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_I);
1234 op = ASM_OP_MOV;
1235 break;
1236 case ASM_OP_MOV_M:
1237 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_M);
1238 op = ASM_OP_MOV;
1239 break;
1240 case ASM_OP_MOV_RET:
1241 asm_cmpltr_add(i, ASM_CC_MOV, ASM_CT_RET);
1242 op = ASM_OP_MOV;
1243 break;
1244 case ASM_OP_MOV_CPUID:
1245 ot = ASM_OPER_CPUID;
1246 op = ASM_OP_MOV;
1247 break;
1248 case ASM_OP_MOV_DBR:
1249 ot = ASM_OPER_DBR;
1250 op = ASM_OP_MOV;
1251 break;
1252 case ASM_OP_MOV_IBR:
1253 ot = ASM_OPER_IBR;
1254 op = ASM_OP_MOV;
1255 break;
1256 case ASM_OP_MOV_IP:
1257 ot = ASM_OPER_IP;
1258 op = ASM_OP_MOV;
1259 break;
1260 case ASM_OP_MOV_MSR:
1261 ot = ASM_OPER_MSR;
1262 op = ASM_OP_MOV;
1263 break;
1264 case ASM_OP_MOV_PKR:
1265 ot = ASM_OPER_PKR;
1266 op = ASM_OP_MOV;
1267 break;
1268 case ASM_OP_MOV_PMC:
1269 ot = ASM_OPER_PMC;
1270 op = ASM_OP_MOV;
1271 break;
1272 case ASM_OP_MOV_PMD:
1273 ot = ASM_OPER_PMD;
1274 op = ASM_OP_MOV;
1275 break;
1276 case ASM_OP_MOV_PR:
1277 ot = ASM_OPER_PR;
1278 op = ASM_OP_MOV;
1279 break;
1280 case ASM_OP_MOV_PSR:
1281 ot = ASM_OPER_PSR;
1282 op = ASM_OP_MOV;
1283 break;
1284 case ASM_OP_MOV_PSR_L:
1285 ot = ASM_OPER_PSR_L;
1286 op = ASM_OP_MOV;
1287 break;
1288 case ASM_OP_MOV_PSR_UM:
1289 ot = ASM_OPER_PSR_UM;
1290 op = ASM_OP_MOV;
1291 break;
1292 case ASM_OP_MOV_RR:
1293 ot = ASM_OPER_RR;
1294 op = ASM_OP_MOV;
1295 break;
1296 case ASM_OP_NOP_B:
1297 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_B);
1298 op = ASM_OP_NOP;
1299 break;
1300 case ASM_OP_NOP_F:
1301 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_F);
1302 op = ASM_OP_NOP;
1303 break;
1304 case ASM_OP_NOP_I:
1305 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_I);
1306 op = ASM_OP_NOP;
1307 break;
1308 case ASM_OP_NOP_M:
1309 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_M);
1310 op = ASM_OP_NOP;
1311 break;
1312 case ASM_OP_NOP_X:
1313 asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_X);
1314 op = ASM_OP_NOP;
1315 break;
1316 case ASM_OP_PACK2_SSS:
1317 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_SSS);
1318 op = ASM_OP_PACK2;
1319 break;
1320 case ASM_OP_PACK2_USS:
1321 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_USS);
1322 op = ASM_OP_PACK2;
1323 break;
1324 case ASM_OP_PACK4_SSS:
1325 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_SSS);
1326 op = ASM_OP_PACK4;
1327 break;
1328 case ASM_OP_PADD1_:
1329 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_NONE);
1330 op = ASM_OP_PADD1;
1331 break;
1332 case ASM_OP_PADD1_SSS:
1333 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_SSS);
1334 op = ASM_OP_PADD1;
1335 break;
1336 case ASM_OP_PADD1_UUS:
1337 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUS);
1338 op = ASM_OP_PADD1;
1339 break;
1340 case ASM_OP_PADD1_UUU:
1341 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUU);
1342 op = ASM_OP_PADD1;
1343 break;
1344 case ASM_OP_PADD2_:
1345 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_NONE);
1346 op = ASM_OP_PADD2;
1347 break;
1348 case ASM_OP_PADD2_SSS:
1349 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_SSS);
1350 op = ASM_OP_PADD2;
1351 break;
1352 case ASM_OP_PADD2_UUS:
1353 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUS);
1354 op = ASM_OP_PADD2;
1355 break;
1356 case ASM_OP_PADD2_UUU:
1357 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUU);
1358 op = ASM_OP_PADD2;
1359 break;
1360 case ASM_OP_PAVG1_:
1361 asm_cmpltr_add(i, ASM_CC_PAVG, ASM_CT_NONE);
1362 op = ASM_OP_PAVG1;
1363 break;
1364 case ASM_OP_PAVG1_RAZ:
1365 asm_cmpltr_add(i, ASM_CC_PAVG, ASM_CT_RAZ);
1366 op = ASM_OP_PAVG1;
1367 break;
1368 case ASM_OP_PAVG2_:
1369 asm_cmpltr_add(i, ASM_CC_PAVG, ASM_CT_NONE);
1370 op = ASM_OP_PAVG2;
1371 break;
1372 case ASM_OP_PAVG2_RAZ:
1373 asm_cmpltr_add(i, ASM_CC_PAVG, ASM_CT_RAZ);
1374 op = ASM_OP_PAVG2;
1375 break;
1376 case ASM_OP_PCMP1_EQ:
1377 asm_cmpltr_add(i, ASM_CC_PREL, ASM_CT_EQ);
1378 op = ASM_OP_PCMP1;
1379 break;
1380 case ASM_OP_PCMP1_GT:
1381 asm_cmpltr_add(i, ASM_CC_PREL, ASM_CT_GT);
1382 op = ASM_OP_PCMP1;
1383 break;
1384 case ASM_OP_PCMP2_EQ:
1385 asm_cmpltr_add(i, ASM_CC_PREL, ASM_CT_EQ);
1386 op = ASM_OP_PCMP2;
1387 break;
1388 case ASM_OP_PCMP2_GT:
1389 asm_cmpltr_add(i, ASM_CC_PREL, ASM_CT_GT);
1390 op = ASM_OP_PCMP2;
1391 break;
1392 case ASM_OP_PCMP4_EQ:
1393 asm_cmpltr_add(i, ASM_CC_PREL, ASM_CT_EQ);
1394 op = ASM_OP_PCMP4;
1395 break;
1396 case ASM_OP_PCMP4_GT:
1397 asm_cmpltr_add(i, ASM_CC_PREL, ASM_CT_GT);
1398 op = ASM_OP_PCMP4;
1399 break;
1400 case ASM_OP_PMAX1_U:
1401 asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_U);
1402 op = ASM_OP_PMAX1;
1403 break;
1404 case ASM_OP_PMIN1_U:
1405 asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_U);
1406 op = ASM_OP_PMIN1;
1407 break;
1408 case ASM_OP_PMPY2_L:
1409 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L);
1410 op = ASM_OP_PMPY2;
1411 break;
1412 case ASM_OP_PMPY2_R:
1413 asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R);
1414 op = ASM_OP_PMPY2;
1415 break;
1416 case ASM_OP_PMPYSHR2_:
1417 asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_NONE);
1418 op = ASM_OP_PMPYSHR2;
1419 break;
1420 case ASM_OP_PMPYSHR2_U:
1421 asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_U);
1422 op = ASM_OP_PMPYSHR2;
1423 break;
1424 case ASM_OP_PROBE_R:
1425 asm_cmpltr_add(i, ASM_CC_RW, ASM_CT_R);
1426 asm_cmpltr_add(i, ASM_CC_PRTYPE, ASM_CT_NONE);
1427 op = ASM_OP_PROBE;
1428 break;
1429 case ASM_OP_PROBE_R_FAULT:
1430 asm_cmpltr_add(i, ASM_CC_RW, ASM_CT_R);
1431 asm_cmpltr_add(i, ASM_CC_PRTYPE, ASM_CT_FAULT);
1432 op = ASM_OP_PROBE;
1433 break;
1434 case ASM_OP_PROBE_RW_FAULT:
1435 asm_cmpltr_add(i, ASM_CC_RW, ASM_CT_RW);
1436 asm_cmpltr_add(i, ASM_CC_PRTYPE, ASM_CT_FAULT);
1437 op = ASM_OP_PROBE;
1438 break;
1439 case ASM_OP_PROBE_W:
1440 asm_cmpltr_add(i, ASM_CC_RW, ASM_CT_W);
1441 asm_cmpltr_add(i, ASM_CC_PRTYPE, ASM_CT_NONE);
1442 op = ASM_OP_PROBE;
1443 break;
1444 case ASM_OP_PROBE_W_FAULT:
1445 asm_cmpltr_add(i, ASM_CC_RW, ASM_CT_W);
1446 asm_cmpltr_add(i, ASM_CC_PRTYPE, ASM_CT_FAULT);
1447 op = ASM_OP_PROBE;
1448 break;
1449 case ASM_OP_PSHR2_:
1450 asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_NONE);
1451 op = ASM_OP_PSHR2;
1452 break;
1453 case ASM_OP_PSHR2_U:
1454 asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_U);
1455 op = ASM_OP_PSHR2;
1456 break;
1457 case ASM_OP_PSHR4_:
1458 asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_NONE);
1459 op = ASM_OP_PSHR4;
1460 break;
1461 case ASM_OP_PSHR4_U:
1462 asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_U);
1463 op = ASM_OP_PSHR4;
1464 break;
1465 case ASM_OP_PSUB1_:
1466 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_NONE);
1467 op = ASM_OP_PSUB1;
1468 break;
1469 case ASM_OP_PSUB1_SSS:
1470 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_SSS);
1471 op = ASM_OP_PSUB1;
1472 break;
1473 case ASM_OP_PSUB1_UUS:
1474 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUS);
1475 op = ASM_OP_PSUB1;
1476 break;
1477 case ASM_OP_PSUB1_UUU:
1478 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUU);
1479 op = ASM_OP_PSUB1;
1480 break;
1481 case ASM_OP_PSUB2_:
1482 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_NONE);
1483 op = ASM_OP_PSUB2;
1484 break;
1485 case ASM_OP_PSUB2_SSS:
1486 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_SSS);
1487 op = ASM_OP_PSUB2;
1488 break;
1489 case ASM_OP_PSUB2_UUS:
1490 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUS);
1491 op = ASM_OP_PSUB2;
1492 break;
1493 case ASM_OP_PSUB2_UUU:
1494 asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUU);
1495 op = ASM_OP_PSUB2;
1496 break;
1497 case ASM_OP_PTC_E:
1498 asm_cmpltr_add(i, ASM_CC_PTC, ASM_CT_E);
1499 op = ASM_OP_PTC;
1500 break;
1501 case ASM_OP_PTC_G:
1502 asm_cmpltr_add(i, ASM_CC_PTC, ASM_CT_G);
1503 op = ASM_OP_PTC;
1504 break;
1505 case ASM_OP_PTC_GA:
1506 asm_cmpltr_add(i, ASM_CC_PTC, ASM_CT_GA);
1507 op = ASM_OP_PTC;
1508 break;
1509 case ASM_OP_PTC_L:
1510 asm_cmpltr_add(i, ASM_CC_PTC, ASM_CT_L);
1511 op = ASM_OP_PTC;
1512 break;
1513 case ASM_OP_PTR_D:
1514 asm_cmpltr_add(i, ASM_CC_PTR, ASM_CT_D);
1515 op = ASM_OP_PTR;
1516 break;
1517 case ASM_OP_PTR_I:
1518 asm_cmpltr_add(i, ASM_CC_PTR, ASM_CT_I);
1519 op = ASM_OP_PTR;
1520 break;
1521 case ASM_OP_SETF_D:
1522 asm_cmpltr_add(i, ASM_CC_SETF, ASM_CT_D);
1523 op = ASM_OP_SETF;
1524 break;
1525 case ASM_OP_SETF_EXP:
1526 asm_cmpltr_add(i, ASM_CC_SETF, ASM_CT_EXP);
1527 op = ASM_OP_SETF;
1528 break;
1529 case ASM_OP_SETF_S:
1530 asm_cmpltr_add(i, ASM_CC_SETF, ASM_CT_S);
1531 op = ASM_OP_SETF;
1532 break;
1533 case ASM_OP_SETF_SIG:
1534 asm_cmpltr_add(i, ASM_CC_SETF, ASM_CT_SIG);
1535 op = ASM_OP_SETF;
1536 break;
1537 case ASM_OP_SHR_:
1538 asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_NONE);
1539 op = ASM_OP_SHR;
1540 break;
1541 case ASM_OP_SHR_U:
1542 asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_U);
1543 op = ASM_OP_SHR;
1544 break;
1545 case ASM_OP_SRLZ_D:
1546 asm_cmpltr_add(i, ASM_CC_SRLZ, ASM_CT_D);
1547 op = ASM_OP_SRLZ;
1548 break;
1549 case ASM_OP_SRLZ_I:
1550 asm_cmpltr_add(i, ASM_CC_SRLZ, ASM_CT_I);
1551 op = ASM_OP_SRLZ;
1552 break;
1553 case ASM_OP_ST1_:
1554 asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_NONE);
1555 op = ASM_OP_ST1;
1556 break;
1557 case ASM_OP_ST1_REL:
1558 asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_REL);
1559 op = ASM_OP_ST1;
1560 break;
1561 case ASM_OP_ST16_:
1562 asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_NONE);
1563 op = ASM_OP_ST16;
1564 break;
1565 case ASM_OP_ST16_REL:
1566 asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_REL);
1567 op = ASM_OP_ST16;
1568 break;
1569 case ASM_OP_ST2_:
1570 asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_NONE);
1571 op = ASM_OP_ST2;
1572 break;
1573 case ASM_OP_ST2_REL:
1574 asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_REL);
1575 op = ASM_OP_ST2;
1576 break;
1577 case ASM_OP_ST4_:
1578 asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_NONE);
1579 op = ASM_OP_ST4;
1580 break;
1581 case ASM_OP_ST4_REL:
1582 asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_REL);
1583 op = ASM_OP_ST4;
1584 break;
1585 case ASM_OP_ST8_:
1586 asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_NONE);
1587 op = ASM_OP_ST8;
1588 break;
1589 case ASM_OP_ST8_REL:
1590 asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_REL);
1591 op = ASM_OP_ST8;
1592 break;
1593 case ASM_OP_ST8_SPILL:
1594 asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_SPILL);
1595 op = ASM_OP_ST8;
1596 break;
1597 case ASM_OP_STF_SPILL:
1598 asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_SPILL);
1599 op = ASM_OP_STF;
1600 break;
1601 case ASM_OP_SYNC_I:
1602 asm_cmpltr_add(i, ASM_CC_SYNC, ASM_CT_I);
1603 op = ASM_OP_SYNC;
1604 break;
1605 case ASM_OP_TBIT_NZ_AND:
1606 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ);
1607 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
1608 op = ASM_OP_TBIT;
1609 break;
1610 case ASM_OP_TBIT_NZ_OR:
1611 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ);
1612 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
1613 op = ASM_OP_TBIT;
1614 break;
1615 case ASM_OP_TBIT_NZ_OR_ANDCM:
1616 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ);
1617 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
1618 op = ASM_OP_TBIT;
1619 break;
1620 case ASM_OP_TBIT_Z:
1621 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1622 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE);
1623 op = ASM_OP_TBIT;
1624 break;
1625 case ASM_OP_TBIT_Z_AND:
1626 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1627 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
1628 op = ASM_OP_TBIT;
1629 break;
1630 case ASM_OP_TBIT_Z_OR:
1631 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1632 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
1633 op = ASM_OP_TBIT;
1634 break;
1635 case ASM_OP_TBIT_Z_OR_ANDCM:
1636 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1637 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
1638 op = ASM_OP_TBIT;
1639 break;
1640 case ASM_OP_TBIT_Z_UNC:
1641 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1642 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC);
1643 op = ASM_OP_TBIT;
1644 break;
1645 case ASM_OP_TNAT_NZ_AND:
1646 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ);
1647 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
1648 op = ASM_OP_TNAT;
1649 break;
1650 case ASM_OP_TNAT_NZ_OR:
1651 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ);
1652 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
1653 op = ASM_OP_TNAT;
1654 break;
1655 case ASM_OP_TNAT_NZ_OR_ANDCM:
1656 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ);
1657 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
1658 op = ASM_OP_TNAT;
1659 break;
1660 case ASM_OP_TNAT_Z:
1661 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1662 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE);
1663 op = ASM_OP_TNAT;
1664 break;
1665 case ASM_OP_TNAT_Z_AND:
1666 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1667 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
1668 op = ASM_OP_TNAT;
1669 break;
1670 case ASM_OP_TNAT_Z_OR:
1671 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1672 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
1673 op = ASM_OP_TNAT;
1674 break;
1675 case ASM_OP_TNAT_Z_OR_ANDCM:
1676 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1677 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
1678 op = ASM_OP_TNAT;
1679 break;
1680 case ASM_OP_TNAT_Z_UNC:
1681 asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
1682 asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC);
1683 op = ASM_OP_TNAT;
1684 break;
1685 case ASM_OP_UNPACK1_H:
1686 asm_cmpltr_add(i, ASM_CC_UNPACK, ASM_CT_H);
1687 op = ASM_OP_UNPACK1;
1688 break;
1689 case ASM_OP_UNPACK1_L:
1690 asm_cmpltr_add(i, ASM_CC_UNPACK, ASM_CT_L);
1691 op = ASM_OP_UNPACK1;
1692 break;
1693 case ASM_OP_UNPACK2_H:
1694 asm_cmpltr_add(i, ASM_CC_UNPACK, ASM_CT_H);
1695 op = ASM_OP_UNPACK2;
1696 break;
1697 case ASM_OP_UNPACK2_L:
1698 asm_cmpltr_add(i, ASM_CC_UNPACK, ASM_CT_L);
1699 op = ASM_OP_UNPACK2;
1700 break;
1701 case ASM_OP_UNPACK4_H:
1702 asm_cmpltr_add(i, ASM_CC_UNPACK, ASM_CT_H);
1703 op = ASM_OP_UNPACK4;
1704 break;
1705 case ASM_OP_UNPACK4_L:
1706 asm_cmpltr_add(i, ASM_CC_UNPACK, ASM_CT_L);
1707 op = ASM_OP_UNPACK4;
1708 break;
1709 case ASM_OP_XMA_H:
1710 asm_cmpltr_add(i, ASM_CC_XMA, ASM_CT_H);
1711 op = ASM_OP_XMA;
1712 break;
1713 case ASM_OP_XMA_HU:
1714 asm_cmpltr_add(i, ASM_CC_XMA, ASM_CT_HU);
1715 op = ASM_OP_XMA;
1716 break;
1717 case ASM_OP_XMA_L:
1718 asm_cmpltr_add(i, ASM_CC_XMA, ASM_CT_L);
1719 op = ASM_OP_XMA;
1720 break;
1721 default:
1722 KASSERT(op < ASM_OP_NUMBER_OF_OPCODES);
1723 break;
1724 }
1725 i->i_op = op;
1726 return (ot);
1727 }
1728
1729 static __inline void
1730 op_imm(struct asm_inst *i, int op, uint64_t val)
1731 {
1732 i->i_oper[op].o_type = ASM_OPER_IMM;
1733 i->i_oper[op].o_value = val;
1734 }
1735
1736 static __inline void
1737 op_type(struct asm_inst *i, int op, enum asm_oper_type ot)
1738 {
1739 i->i_oper[op].o_type = ot;
1740 }
1741
1742 static __inline void
1743 op_value(struct asm_inst *i, int op, uint64_t val)
1744 {
1745 i->i_oper[op].o_value = val;
1746 }
1747
1748 static __inline void
1749 operand(struct asm_inst *i, int op, enum asm_oper_type ot, uint64_t bits,
1750 int o, int l)
1751 {
1752 i->i_oper[op].o_type = ot;
1753 i->i_oper[op].o_value = FIELD(bits, o, l);
1754 }
1755
1756 static uint64_t
1757 imm(uint64_t bits, int sign, int o, int l)
1758 {
1759 uint64_t val = FIELD(bits, o, l);
1760
1761 if (sign && (val & (1LL << (l - 1))) != 0)
1762 val |= -1LL << l;
1763 return (val);
1764 }
1765
1766 static void
1767 s_imm(struct asm_inst *i, int op, uint64_t bits, int o, int l)
1768 {
1769 i->i_oper[op].o_type = ASM_OPER_IMM;
1770 i->i_oper[op].o_value = imm(bits, 1, o, l);
1771 }
1772
1773 static void
1774 u_imm(struct asm_inst *i, int op, uint64_t bits, int o, int l)
1775 {
1776 i->i_oper[op].o_type = ASM_OPER_IMM;
1777 i->i_oper[op].o_value = imm(bits, 0, o, l);
1778 }
1779
1780 static uint64_t
1781 vimm(uint64_t bits, int sign, va_list ap)
1782 {
1783 uint64_t val = 0;
1784 int len = 0;
1785 int frag;
1786
1787 while ((frag = va_arg(ap, int)) != 0) {
1788 val |= (uint64_t)FIELD(bits, FRAG_OFS(frag), FRAG_LEN(frag))
1789 << len;
1790 len += FRAG_LEN(frag);
1791 }
1792 if (sign && (val & (1LL << (len - 1))) != 0)
1793 val |= -1LL << len;
1794 return (val);
1795 }
1796
1797 static void
1798 s_immf(struct asm_inst *i, int op, uint64_t bits, ...)
1799 {
1800 va_list ap;
1801 va_start(ap, bits);
1802 i->i_oper[op].o_type = ASM_OPER_IMM;
1803 i->i_oper[op].o_value = vimm(bits, 1, ap);
1804 va_end(ap);
1805 }
1806
1807 static void
1808 u_immf(struct asm_inst *i, int op, uint64_t bits, ...)
1809 {
1810 va_list ap;
1811 va_start(ap, bits);
1812 i->i_oper[op].o_type = ASM_OPER_IMM;
1813 i->i_oper[op].o_value = vimm(bits, 0, ap);
1814 va_end(ap);
1815 }
1816
1817 static void
1818 disp(struct asm_inst *i, int op, uint64_t bits, ...)
1819 {
1820 va_list ap;
1821 va_start(ap, bits);
1822 i->i_oper[op].o_type = ASM_OPER_DISP;
1823 i->i_oper[op].o_value = vimm(bits, 1, ap) << 4;
1824 va_end(ap);
1825 }
1826
1827 static __inline void
1828 combine(uint64_t *dst, int dl, uint64_t src, int sl, int so)
1829 {
1830 *dst = (*dst & ((1LL << dl) - 1LL)) |
1831 ((uint64_t)_FLD64(src, so, sl) << dl);
1832 }
1833
1834 int
1835 asm_extract(enum asm_op op, enum asm_fmt fmt, uint64_t bits,
1836 struct asm_bundle *b, int slot)
1837 {
1838 struct asm_inst *i = b->b_inst + slot;
1839 enum asm_oper_type ot;
1840
1841 KASSERT(op != ASM_OP_NONE);
1842 i->i_bits = bits;
1843 i->i_format = fmt;
1844 i->i_srcidx = 2;
1845
1846 ot = asm_normalize(i, op);
1847
1848 if (fmt != ASM_FMT_B6 && fmt != ASM_FMT_B7)
1849 operand(i, 0, ASM_OPER_PREG, bits, 0, 6);
1850
1851 switch (fmt) {
1852 case ASM_FMT_A1:
1853 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
1854 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
1855 operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
1856 if ((op == ASM_OP_ADD && FIELD(bits, 27, 2) == 1) ||
1857 (op == ASM_OP_SUB && FIELD(bits, 27, 2) == 0))
1858 op_imm(i, 4, 1LL);
1859 break;
1860 case ASM_FMT_A2:
1861 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
1862 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
1863 op_imm(i, 3, 1LL + FIELD(bits, 27, 2));
1864 operand(i, 4, ASM_OPER_GREG, bits, 20, 7);
1865 break;
1866 case ASM_FMT_A3:
1867 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
1868 s_immf(i, 2, bits, FRAG(13,7), FRAG(36,1), 0);
1869 operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
1870 break;
1871 case ASM_FMT_A4:
1872 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
1873 s_immf(i, 2, bits, FRAG(13,7), FRAG(27,6), FRAG(36,1), 0);
1874 operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
1875 break;
1876 case ASM_FMT_A5:
1877 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
1878 s_immf(i, 2, bits, FRAG(13,7), FRAG(27,9), FRAG(22,5),
1879 FRAG(36,1), 0);
1880 operand(i, 3, ASM_OPER_GREG, bits, 20, 2);
1881 break;
1882 case ASM_FMT_A6: /* 2 dst */
1883 operand(i, 1, ASM_OPER_PREG, bits, 6, 6);
1884 operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
1885 operand(i, 3, ASM_OPER_GREG, bits, 13, 7);
1886 operand(i, 4, ASM_OPER_GREG, bits, 20, 7);
1887 i->i_srcidx++;
1888 break;
1889 case ASM_FMT_A7: /* 2 dst */
1890 if (FIELD(bits, 13, 7) != 0)
1891 return (0);
1892 operand(i, 1, ASM_OPER_PREG, bits, 6, 6);
1893 operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
1894 operand(i, 3, ASM_OPER_GREG, bits, 13, 7);
1895 operand(i, 4, ASM_OPER_GREG, bits, 20, 7);
1896 i->i_srcidx++;
1897 break;
1898 case ASM_FMT_A8: /* 2 dst */
1899 operand(i, 1, ASM_OPER_PREG, bits, 6, 6);
1900 operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
1901 s_immf(i, 3, bits, FRAG(13,7), FRAG(36,1), 0);
1902 operand(i, 4, ASM_OPER_GREG, bits, 20, 7);
1903 i->i_srcidx++;
1904 break;
1905 case ASM_FMT_A9:
1906 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
1907 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
1908 operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
1909 break;
1910 case ASM_FMT_A10:
1911 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
1912 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
1913 op_imm(i, 3, 1LL + FIELD(bits, 27, 2));
1914 operand(i, 4, ASM_OPER_GREG, bits, 20, 7);
1915 break;
1916 case ASM_FMT_B1: /* 0 dst */
1917 asm_brhint(i);
1918 disp(i, 1, bits, FRAG(13,20), FRAG(36,1), 0);
1919 break;
1920 case ASM_FMT_B2: /* 0 dst */
1921 if (FIELD(bits, 0, 6) != 0)
1922 return (0);
1923 asm_brhint(i);
1924 disp(i, 1, bits, FRAG(13,20), FRAG(36,1), 0);
1925 break;
1926 case ASM_FMT_B3:
1927 asm_brhint(i);
1928 operand(i, 1, ASM_OPER_BREG, bits, 6, 3);
1929 disp(i, 2, bits, FRAG(13,20), FRAG(36,1), 0);
1930 break;
1931 case ASM_FMT_B4: /* 0 dst */
1932 asm_brhint(i);
1933 operand(i, 1, ASM_OPER_BREG, bits, 13, 3);
1934 break;
1935 case ASM_FMT_B5:
1936 #if 0
1937 if (FIELD(bits, 32, 1) == 0)
1938 return (0);
1939 #endif
1940 asm_brhint(i);
1941 operand(i, 1, ASM_OPER_BREG, bits, 6, 3);
1942 operand(i, 2, ASM_OPER_BREG, bits, 13, 3);
1943 break;
1944 case ASM_FMT_B6: /* 0 dst */
1945 asm_brphint(i);
1946 disp(i, 1, bits, FRAG(13,20), FRAG(36,1), 0);
1947 disp(i, 2, bits, FRAG(6,7), FRAG(33,2), 0);
1948 i->i_srcidx--;
1949 break;
1950 case ASM_FMT_B7: /* 0 dst */
1951 asm_brphint(i);
1952 operand(i, 1, ASM_OPER_BREG, bits, 13, 3);
1953 disp(i, 2, bits, FRAG(6,7), FRAG(33,2), 0);
1954 i->i_srcidx--;
1955 break;
1956 case ASM_FMT_B8:
1957 /* no operands */
1958 break;
1959 case ASM_FMT_B9: /* 0 dst */
1960 u_immf(i, 1, bits, FRAG(6,20), FRAG(36,1), 0);
1961 break;
1962 case ASM_FMT_F1:
1963 asm_sf(i);
1964 operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
1965 operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
1966 operand(i, 3, ASM_OPER_FREG, bits, 20, 7);
1967 operand(i, 4, ASM_OPER_FREG, bits, 27, 7);
1968 break;
1969 case ASM_FMT_F2:
1970 operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
1971 operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
1972 operand(i, 3, ASM_OPER_FREG, bits, 20, 7);
1973 operand(i, 4, ASM_OPER_FREG, bits, 27, 7);
1974 break;
1975 case ASM_FMT_F3:
1976 operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
1977 operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
1978 operand(i, 3, ASM_OPER_FREG, bits, 20, 7);
1979 operand(i, 4, ASM_OPER_FREG, bits, 27, 7);
1980 break;
1981 case ASM_FMT_F4: /* 2 dst */
1982 if (FIELD(bits, 33, 1)) { /* ra */
1983 if (FIELD(bits, 36, 1)) /* rb */
1984 asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_UNORD);
1985 else
1986 asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_LE);
1987 } else {
1988 if (FIELD(bits, 36, 1)) /* rb */
1989 asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_LT);
1990 else
1991 asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_EQ);
1992 }
1993 if (FIELD(bits, 12, 1)) /* ta */
1994 asm_cmpltr_add(i, ASM_CC_FCTYPE, ASM_CT_UNC);
1995 else
1996 asm_cmpltr_add(i, ASM_CC_FCTYPE, ASM_CT_NONE);
1997 asm_sf(i);
1998 operand(i, 1, ASM_OPER_PREG, bits, 6, 6);
1999 operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
2000 operand(i, 3, ASM_OPER_FREG, bits, 13, 7);
2001 operand(i, 4, ASM_OPER_FREG, bits, 20, 7);
2002 i->i_srcidx++;
2003 break;
2004 case ASM_FMT_F5: /* 2 dst */
2005 operand(i, 1, ASM_OPER_PREG, bits, 6, 6);
2006 operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
2007 operand(i, 3, ASM_OPER_FREG, bits, 13, 7);
2008 u_immf(i, 4, bits, FRAG(33,2), FRAG(20,7), 0);
2009 i->i_srcidx++;
2010 break;
2011 case ASM_FMT_F6: /* 2 dst */
2012 asm_sf(i);
2013 operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2014 operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
2015 operand(i, 3, ASM_OPER_FREG, bits, 13, 7);
2016 operand(i, 4, ASM_OPER_FREG, bits, 20, 7);
2017 i->i_srcidx++;
2018 break;
2019 case ASM_FMT_F7: /* 2 dst */
2020 asm_sf(i);
2021 operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2022 operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
2023 operand(i, 3, ASM_OPER_FREG, bits, 20, 7);
2024 i->i_srcidx++;
2025 break;
2026 case ASM_FMT_F8:
2027 asm_sf(i);
2028 operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2029 operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
2030 operand(i, 3, ASM_OPER_FREG, bits, 20, 7);
2031 break;
2032 case ASM_FMT_F9:
2033 operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2034 operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
2035 operand(i, 3, ASM_OPER_FREG, bits, 20, 7);
2036 break;
2037 case ASM_FMT_F10:
2038 asm_sf(i);
2039 operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2040 operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
2041 break;
2042 case ASM_FMT_F11:
2043 operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2044 operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
2045 break;
2046 case ASM_FMT_F12: /* 0 dst */
2047 asm_sf(i);
2048 u_imm(i, 1, bits, 13, 7);
2049 u_imm(i, 2, bits, 20, 7);
2050 i->i_srcidx--;
2051 break;
2052 case ASM_FMT_F13:
2053 asm_sf(i);
2054 /* no operands */
2055 break;
2056 case ASM_FMT_F14: /* 0 dst */
2057 asm_sf(i);
2058 disp(i, 1, bits, FRAG(6,20), FRAG(36,1), 0);
2059 break;
2060 case ASM_FMT_F15: /* 0 dst */
2061 u_imm(i, 1, bits, 6, 20);
2062 break;
2063 case ASM_FMT_I1:
2064 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2065 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2066 operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
2067 switch (FIELD(bits, 30, 2)) {
2068 case 0: op_imm(i, 4, 0LL); break;
2069 case 1: op_imm(i, 4, 7LL); break;
2070 case 2: op_imm(i, 4, 15LL); break;
2071 case 3: op_imm(i, 4, 16LL); break;
2072 }
2073 break;
2074 case ASM_FMT_I2:
2075 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2076 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2077 operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
2078 break;
2079 case ASM_FMT_I3:
2080 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2081 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2082 u_imm(i, 3, bits, 20, 4);
2083 break;
2084 case ASM_FMT_I4:
2085 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2086 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2087 u_imm(i, 3, bits, 20, 8);
2088 break;
2089 case ASM_FMT_I5:
2090 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2091 operand(i, 2, ASM_OPER_GREG, bits, 20, 7);
2092 operand(i, 3, ASM_OPER_GREG, bits, 13, 7);
2093 break;
2094 case ASM_FMT_I6:
2095 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2096 operand(i, 2, ASM_OPER_GREG, bits, 20, 7);
2097 u_imm(i, 3, bits, 14, 5);
2098 break;
2099 case ASM_FMT_I7:
2100 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2101 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2102 operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
2103 break;
2104 case ASM_FMT_I8:
2105 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2106 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2107 op_imm(i, 3, 31LL - FIELD(bits, 20, 5));
2108 break;
2109 case ASM_FMT_I9:
2110 if (FIELD(bits, 13, 7) != 0)
2111 return (0);
2112 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2113 operand(i, 2, ASM_OPER_GREG, bits, 20, 7);
2114 break;
2115 case ASM_FMT_I10:
2116 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2117 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2118 operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
2119 u_imm(i, 4, bits, 27, 6);
2120 break;
2121 case ASM_FMT_I11:
2122 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2123 operand(i, 2, ASM_OPER_GREG, bits, 20, 7);
2124 u_imm(i, 3, bits, 14, 6);
2125 op_imm(i, 4, 1LL + FIELD(bits, 27, 6));
2126 break;
2127 case ASM_FMT_I12:
2128 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2129 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2130 op_imm(i, 3, 63LL - FIELD(bits, 20, 6));
2131 op_imm(i, 4, 1LL + FIELD(bits, 27, 6));
2132 break;
2133 case ASM_FMT_I13:
2134 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2135 s_immf(i, 2, bits, FRAG(13,7), FRAG(36,1), 0);
2136 op_imm(i, 3, 63LL - FIELD(bits, 20, 6));
2137 op_imm(i, 4, 1LL + FIELD(bits, 27, 6));
2138 break;
2139 case ASM_FMT_I14:
2140 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2141 s_imm(i, 2, bits, 36, 1);
2142 operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
2143 op_imm(i, 4, 63LL - FIELD(bits, 14, 6));
2144 op_imm(i, 5, 1LL + FIELD(bits, 27, 6));
2145 break;
2146 case ASM_FMT_I15:
2147 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2148 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2149 operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
2150 op_imm(i, 4, 63LL - FIELD(bits, 31, 6));
2151 op_imm(i, 5, 1LL + FIELD(bits, 27, 4));
2152 break;
2153 case ASM_FMT_I16: /* 2 dst */
2154 operand(i, 1, ASM_OPER_PREG, bits, 6, 6);
2155 operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
2156 operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
2157 u_imm(i, 4, bits, 14, 6);
2158 i->i_srcidx++;
2159 break;
2160 case ASM_FMT_I17: /* 2 dst */
2161 operand(i, 1, ASM_OPER_PREG, bits, 6, 6);
2162 operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
2163 operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
2164 i->i_srcidx++;
2165 break;
2166 case ASM_FMT_I19:
2167 u_immf(i, 1, bits, FRAG(6,20), FRAG(36,1), 0);
2168 break;
2169 case ASM_FMT_I20: /* 0 dst */
2170 operand(i, 1, ASM_OPER_GREG, bits, 13, 7);
2171 disp(i, 2, bits, FRAG(6,7), FRAG(20,13), FRAG(36,1), 0);
2172 i->i_srcidx--;
2173 break;
2174 case ASM_FMT_I21:
2175 switch (FIELD(bits, 20, 2)) { /* wh */
2176 case 0: asm_cmpltr_add(i, ASM_CC_MWH, ASM_CT_SPTK); break;
2177 case 1: asm_cmpltr_add(i, ASM_CC_MWH, ASM_CT_NONE); break;
2178 case 2: asm_cmpltr_add(i, ASM_CC_MWH, ASM_CT_DPTK); break;
2179 case 3: return (0);
2180 }
2181 if (FIELD(bits, 23, 1)) /* ih */
2182 asm_cmpltr_add(i, ASM_CC_IH, ASM_CT_IMP);
2183 else
2184 asm_cmpltr_add(i, ASM_CC_IH, ASM_CT_NONE);
2185 operand(i, 1, ASM_OPER_BREG, bits, 6, 3);
2186 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2187 disp(i, 3, bits, FRAG(24,9), 0);
2188 break;
2189 case ASM_FMT_I22:
2190 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2191 operand(i, 2, ASM_OPER_BREG, bits, 13, 3);
2192 break;
2193 case ASM_FMT_I23:
2194 op_type(i, 1, ASM_OPER_PR);
2195 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2196 u_immf(i, 3, bits, FRAG(6,7), FRAG(24,8), FRAG(36,1), 0);
2197 i->i_oper[3].o_value <<= 1;
2198 break;
2199 case ASM_FMT_I24:
2200 op_type(i, 1, ASM_OPER_PR_ROT);
2201 s_immf(i, 2, bits, FRAG(6,27), FRAG(36,1), 0);
2202 break;
2203 case ASM_FMT_I25:
2204 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2205 op_type(i, 2, ot);
2206 break;
2207 case ASM_FMT_I26:
2208 operand(i, 1, ASM_OPER_AREG, bits, 20, 7);
2209 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2210 break;
2211 case ASM_FMT_I27:
2212 operand(i, 1, ASM_OPER_AREG, bits, 20, 7);
2213 s_immf(i, 2, bits, FRAG(13,7), FRAG(36,1), 0);
2214 break;
2215 case ASM_FMT_I28:
2216 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2217 operand(i, 2, ASM_OPER_AREG, bits, 20, 7);
2218 break;
2219 case ASM_FMT_I29:
2220 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2221 operand(i, 2, ASM_OPER_GREG, bits, 20, 7);
2222 break;
2223 case ASM_FMT_M1:
2224 asm_hint(i, ASM_CC_LDHINT);
2225 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2226 if (i->i_op == ASM_OP_LD16) {
2227 op_type(i, 2, ASM_OPER_AREG);
2228 op_value(i, 2, AR_CSD);
2229 i->i_srcidx++;
2230 }
2231 operand(i, i->i_srcidx, ASM_OPER_MEM, bits, 20, 7);
2232 break;
2233 case ASM_FMT_M2:
2234 asm_hint(i, ASM_CC_LDHINT);
2235 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2236 operand(i, 2, ASM_OPER_MEM, bits, 20, 7);
2237 operand(i, 3, ASM_OPER_GREG, bits, 13, 7);
2238 break;
2239 case ASM_FMT_M3:
2240 asm_hint(i, ASM_CC_LDHINT);
2241 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2242 operand(i, 2, ASM_OPER_MEM, bits, 20, 7);
2243 s_immf(i, 3, bits, FRAG(13,7), FRAG(27,1), FRAG(36,1), 0);
2244 break;
2245 case ASM_FMT_M4:
2246 asm_hint(i, ASM_CC_STHINT);
2247 operand(i, 1, ASM_OPER_MEM, bits, 20, 7);
2248 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2249 if (i->i_op == ASM_OP_ST16) {
2250 op_type(i, 3, ASM_OPER_AREG);
2251 op_value(i, 3, AR_CSD);
2252 }
2253 break;
2254 case ASM_FMT_M5:
2255 asm_hint(i, ASM_CC_STHINT);
2256 operand(i, 1, ASM_OPER_MEM, bits, 20, 7);
2257 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2258 s_immf(i, 3, bits, FRAG(6,7), FRAG(27,1), FRAG(36,1), 0);
2259 break;
2260 case ASM_FMT_M6:
2261 asm_hint(i, ASM_CC_LDHINT);
2262 operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2263 operand(i, 2, ASM_OPER_MEM, bits, 20, 7);
2264 break;
2265 case ASM_FMT_M7:
2266 asm_hint(i, ASM_CC_LDHINT);
2267 operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2268 operand(i, 2, ASM_OPER_MEM, bits, 20, 7);
2269 operand(i, 3, ASM_OPER_GREG, bits, 13, 7);
2270 break;
2271 case ASM_FMT_M8:
2272 asm_hint(i, ASM_CC_LDHINT);
2273 operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2274 operand(i, 2, ASM_OPER_MEM, bits, 20, 7);
2275 s_immf(i, 3, bits, FRAG(13,7), FRAG(27,1), FRAG(36,1), 0);
2276 break;
2277 case ASM_FMT_M9:
2278 asm_hint(i, ASM_CC_STHINT);
2279 operand(i, 1, ASM_OPER_MEM, bits, 20, 7);
2280 operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
2281 break;
2282 case ASM_FMT_M10:
2283 asm_hint(i, ASM_CC_STHINT);
2284 operand(i, 1, ASM_OPER_MEM, bits, 20, 7);
2285 operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
2286 s_immf(i, 3, bits, FRAG(6,7), FRAG(27,1), FRAG(36,1), 0);
2287 break;
2288 case ASM_FMT_M11: /* 2 dst */
2289 asm_hint(i, ASM_CC_LDHINT);
2290 operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2291 operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
2292 operand(i, 3, ASM_OPER_MEM, bits, 20, 7);
2293 i->i_srcidx++;
2294 break;
2295 case ASM_FMT_M12: /* 2 dst */
2296 asm_hint(i, ASM_CC_LDHINT);
2297 operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2298 operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
2299 operand(i, 3, ASM_OPER_MEM, bits, 20, 7);
2300 op_imm(i, 4, 8LL << FIELD(bits, 30, 1));
2301 i->i_srcidx++;
2302 break;
2303 case ASM_FMT_M13:
2304 asm_hint(i, ASM_CC_LFHINT);
2305 operand(i, 1, ASM_OPER_MEM, bits, 20, 7);
2306 break;
2307 case ASM_FMT_M14: /* 0 dst */
2308 asm_hint(i, ASM_CC_LFHINT);
2309 operand(i, 1, ASM_OPER_MEM, bits, 20, 7);
2310 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2311 i->i_srcidx--;
2312 break;
2313 case ASM_FMT_M15: /* 0 dst */
2314 asm_hint(i, ASM_CC_LFHINT);
2315 operand(i, 1, ASM_OPER_MEM, bits, 20, 7);
2316 s_immf(i, 2, bits, FRAG(13,7), FRAG(27,1), FRAG(36,1), 0);
2317 i->i_srcidx--;
2318 break;
2319 case ASM_FMT_M16: {
2320 int oper;
2321 asm_hint(i, ASM_CC_LDHINT);
2322 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2323 operand(i, 2, ASM_OPER_MEM, bits, 20, 7);
2324 operand(i, 3, ASM_OPER_GREG, bits, 13, 7);
2325 if (i->i_op == ASM_OP_CMP8XCHG16) {
2326 op_type(i, 4, ASM_OPER_AREG);
2327 op_value(i, 4, AR_CSD);
2328 oper = 5;
2329 } else
2330 oper = 4;
2331 if (FIELD(bits, 30, 6) < 8) {
2332 op_type(i, oper, ASM_OPER_AREG);
2333 op_value(i, oper, AR_CCV);
2334 }
2335 break;
2336 }
2337 case ASM_FMT_M17:
2338 asm_hint(i, ASM_CC_LDHINT);
2339 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2340 operand(i, 2, ASM_OPER_MEM, bits, 20, 7);
2341 switch (FIELD(bits, 13, 2)) {
2342 case 0: op_imm(i, 3, 1LL << 4); break;
2343 case 1: op_imm(i, 3, 1LL << 3); break;
2344 case 2: op_imm(i, 3, 1LL << 2); break;
2345 case 3: op_imm(i, 3, 1LL); break;
2346 }
2347 if (FIELD(bits, 15, 1))
2348 i->i_oper[3].o_value *= -1LL;
2349 break;
2350 case ASM_FMT_M18:
2351 operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2352 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2353 break;
2354 case ASM_FMT_M19:
2355 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2356 operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
2357 break;
2358 case ASM_FMT_M20: /* 0 dst */
2359 operand(i, 1, ASM_OPER_GREG, bits, 13, 7);
2360 disp(i, 2, bits, FRAG(6,7), FRAG(20,13), FRAG(36,1), 0);
2361 i->i_srcidx--;
2362 break;
2363 case ASM_FMT_M21: /* 0 dst */
2364 operand(i, 1, ASM_OPER_FREG, bits, 13, 7);
2365 disp(i, 2, bits, FRAG(6,7), FRAG(20,13), FRAG(36,1), 0);
2366 i->i_srcidx--;
2367 break;
2368 case ASM_FMT_M22: /* 0 dst */
2369 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2370 disp(i, 2, bits, FRAG(13,20), FRAG(36,1), 0);
2371 i->i_srcidx--;
2372 break;
2373 case ASM_FMT_M23: /* 0 dst */
2374 operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2375 disp(i, 2, bits, FRAG(13,20), FRAG(36,1), 0);
2376 i->i_srcidx--;
2377 break;
2378 case ASM_FMT_M24:
2379 /* no operands */
2380 break;
2381 case ASM_FMT_M25:
2382 if (FIELD(bits, 0, 6) != 0)
2383 return (0);
2384 /* no operands */
2385 break;
2386 case ASM_FMT_M26:
2387 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2388 break;
2389 case ASM_FMT_M27:
2390 operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
2391 break;
2392 case ASM_FMT_M28:
2393 operand(i, 1, ASM_OPER_GREG, bits, 20, 7);
2394 break;
2395 case ASM_FMT_M29:
2396 operand(i, 1, ASM_OPER_AREG, bits, 20, 7);
2397 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2398 break;
2399 case ASM_FMT_M30:
2400 operand(i, 1, ASM_OPER_AREG, bits, 20, 7);
2401 s_immf(i, 2, bits, FRAG(13,7), FRAG(36,1), 0);
2402 break;
2403 case ASM_FMT_M31:
2404 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2405 operand(i, 2, ASM_OPER_AREG, bits, 20, 7);
2406 break;
2407 case ASM_FMT_M32:
2408 operand(i, 1, ASM_OPER_CREG, bits, 20, 7);
2409 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2410 break;
2411 case ASM_FMT_M33:
2412 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2413 operand(i, 2, ASM_OPER_CREG, bits, 20, 7);
2414 break;
2415 case ASM_FMT_M34: {
2416 uint64_t loc, out;
2417 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2418 op_type(i, 2, ASM_OPER_AREG);
2419 op_value(i, 2, AR_PFS);
2420 loc = FIELD(bits, 20, 7);
2421 out = FIELD(bits, 13, 7) - loc;
2422 op_imm(i, 3, 0);
2423 op_imm(i, 4, loc);
2424 op_imm(i, 5, out);
2425 op_imm(i, 6, (uint64_t)FIELD(bits, 27, 4) << 3);
2426 break;
2427 }
2428 case ASM_FMT_M35:
2429 if (FIELD(bits, 27, 6) == 0x2D)
2430 op_type(i, 1, ASM_OPER_PSR_L);
2431 else
2432 op_type(i, 1, ASM_OPER_PSR_UM);
2433 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2434 break;
2435 case ASM_FMT_M36:
2436 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2437 if (FIELD(bits, 27, 6) == 0x25)
2438 op_type(i, 2, ASM_OPER_PSR);
2439 else
2440 op_type(i, 2, ASM_OPER_PSR_UM);
2441 break;
2442 case ASM_FMT_M37:
2443 u_immf(i, 1, bits, FRAG(6,20), FRAG(36,1), 0);
2444 break;
2445 case ASM_FMT_M38:
2446 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2447 operand(i, 2, ASM_OPER_GREG, bits, 20, 7);
2448 operand(i, 3, ASM_OPER_GREG, bits, 13, 7);
2449 break;
2450 case ASM_FMT_M39:
2451 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2452 operand(i, 2, ASM_OPER_GREG, bits, 20, 7);
2453 u_imm(i, 3, bits, 13, 2);
2454 break;
2455 case ASM_FMT_M40: /* 0 dst */
2456 operand(i, 1, ASM_OPER_GREG, bits, 20, 7);
2457 u_imm(i, 2, bits, 13, 2);
2458 i->i_srcidx--;
2459 break;
2460 case ASM_FMT_M41:
2461 operand(i, 1, ASM_OPER_GREG, bits, 13, 7);
2462 break;
2463 case ASM_FMT_M42:
2464 operand(i, 1, ot, bits, 20, 7);
2465 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2466 break;
2467 case ASM_FMT_M43:
2468 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2469 operand(i, 2, ot, bits, 20, 7);
2470 break;
2471 case ASM_FMT_M44:
2472 u_immf(i, 1, bits, FRAG(6,21), FRAG(31,2), FRAG(36,1), 0);
2473 break;
2474 case ASM_FMT_M45: /* 0 dst */
2475 operand(i, 1, ASM_OPER_GREG, bits, 20, 7);
2476 operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
2477 i->i_srcidx--;
2478 break;
2479 case ASM_FMT_M46:
2480 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2481 operand(i, 2, ASM_OPER_GREG, bits, 20, 7);
2482 break;
2483 case ASM_FMT_X1:
2484 KASSERT(slot == 2);
2485 u_immf(i, 1, bits, FRAG(6,20), FRAG(36,1), 0);
2486 combine(&i->i_oper[1].o_value, 21, b->b_inst[1].i_bits, 41, 0);
2487 break;
2488 case ASM_FMT_X2:
2489 KASSERT(slot == 2);
2490 operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
2491 u_immf(i, 2, bits, FRAG(13,7), FRAG(27,9), FRAG(22,5),
2492 FRAG(21,1), 0);
2493 combine(&i->i_oper[2].o_value, 22, b->b_inst[1].i_bits, 41, 0);
2494 combine(&i->i_oper[2].o_value, 63, bits, 1, 36);
2495 break;
2496 case ASM_FMT_X3:
2497 KASSERT(slot == 2);
2498 asm_brhint(i);
2499 u_imm(i, 1, bits, 13, 20);
2500 combine(&i->i_oper[1].o_value, 20, b->b_inst[1].i_bits, 39, 2);
2501 combine(&i->i_oper[1].o_value, 59, bits, 1, 36);
2502 i->i_oper[1].o_value <<= 4;
2503 i->i_oper[1].o_type = ASM_OPER_DISP;
2504 break;
2505 case ASM_FMT_X4:
2506 KASSERT(slot == 2);
2507 asm_brhint(i);
2508 operand(i, 1, ASM_OPER_BREG, bits, 6, 3);
2509 u_imm(i, 2, bits, 13, 20);
2510 combine(&i->i_oper[2].o_value, 20, b->b_inst[1].i_bits, 39, 2);
2511 combine(&i->i_oper[2].o_value, 59, bits, 1, 36);
2512 i->i_oper[2].o_value <<= 4;
2513 i->i_oper[2].o_type = ASM_OPER_DISP;
2514 break;
2515 default:
2516 KASSERT(fmt == ASM_FMT_NONE);
2517 return (0);
2518 }
2519
2520 return (1);
2521 }
NetBSD on the FriendlyARM MINI2440