sys/arch/mips/include/bus_dma.h

   1 /* $NetBSD: bus_dma.h,v 1.8 2007/03/04 06:00:11 christos Exp $ */
   2
   3 /*-
   4  * Copyright (c) 1997, 1998, 2000, 2001 The NetBSD Foundation, Inc.
   5  * All rights reserved.
   6  *
   7  * This code is derived from software contributed to The NetBSD Foundation
   8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
   9  * NASA Ames Research Center.
  10  *
  11  * Redistribution and use in source and binary forms, with or without
  12  * modification, are permitted provided that the following conditions
  13  * are met:
  14  * 1. Redistributions of source code must retain the above copyright
  15  *    notice, this list of conditions and the following disclaimer.
  16  * 2. Redistributions in binary form must reproduce the above copyright
  17  *    notice, this list of conditions and the following disclaimer in the
  18  *    documentation and/or other materials provided with the distribution.
  19  *
  20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  30  * POSSIBILITY OF SUCH DAMAGE.
  31  */
  32
  33 /*
  34  * Copyright (c) 1996 Carnegie-Mellon University.
  35  * All rights reserved.
  36  *
  37  * Author: Chris G. Demetriou
  38  *
  39  * Permission to use, copy, modify and distribute this software and
  40  * its documentation is hereby granted, provided that both the copyright
  41  * notice and this permission notice appear in all copies of the
  42  * software, derivative works or modified versions, and any portions
  43  * thereof, and that both notices appear in supporting documentation.
  44  *
  45  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
  46  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
  47  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
  48  *
  49  * Carnegie Mellon requests users of this software to return to
  50  *
  51  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
  52  *  School of Computer Science
  53  *  Carnegie Mellon University
  54  *  Pittsburgh PA 15213-3890
  55  *
  56  * any improvements or extensions that they make and grant Carnegie the
  57  * rights to redistribute these changes.
  58  */
  59
  60 #ifndef _MIPS_BUS_DMA_H_
  61 #define _MIPS_BUS_DMA_H_
  62
  63 #include <sys/types.h>
  64
  65 #ifdef _KERNEL
  66 /*
  67  * Bus DMA methods.
  68  */
  69
  70 /*
  71  * Flags used in various bus DMA methods.
  72  */
  73 #define BUS_DMA_WAITOK          0x000   /* safe to sleep (pseudo-flag) */
  74 #define BUS_DMA_NOWAIT          0x001   /* not safe to sleep */
  75 #define BUS_DMA_ALLOCNOW        0x002   /* perform resource allocation now */
  76 #define BUS_DMA_COHERENT        0x004   /* hint: map memory DMA coherent */
  77 #define BUS_DMA_STREAMING       0x008   /* hint: sequential, unidirectional */
  78 #define BUS_DMA_BUS1            0x010   /* placeholders for bus functions... */
  79 #define BUS_DMA_BUS2            0x020
  80 #define BUS_DMA_BUS3            0x040
  81 #define BUS_DMA_BUS4            0x080
  82 #define BUS_DMA_READ            0x100   /* mapping is device -> memory only */
  83 #define BUS_DMA_WRITE           0x200   /* mapping is memory -> device only */
  84 #define BUS_DMA_NOCACHE         0x400   /* hint: map non-cached memory */
  85
  86 /*
  87  * Private flags stored in the DMA map.
  88  */
  89 #define MIPS_DMAMAP_COHERENT    0x10000 /* no cache flush necessary on sync */
  90
  91 /* Forwards needed by prototypes below. */
  92 struct mbuf;
  93 struct uio;
  94
  95 /*
  96  * Operations performed by bus_dmamap_sync().
  97  */
  98 #define BUS_DMASYNC_PREREAD     0x01    /* pre-read synchronization */
  99 #define BUS_DMASYNC_POSTREAD    0x02    /* post-read synchronization */
 100 #define BUS_DMASYNC_PREWRITE    0x04    /* pre-write synchronization */
 101 #define BUS_DMASYNC_POSTWRITE   0x08    /* post-write synchronization */
 102
 103 typedef struct mips_bus_dma_tag *bus_dma_tag_t;
 104 typedef struct mips_bus_dmamap  *bus_dmamap_t;
 105
 106 /*
 107  *      bus_dma_segment_t
 108  *
 109  *      Describes a single contiguous DMA transaction.  Values
 110  *      are suitable for programming into DMA registers.
 111  */
 112 struct mips_bus_dma_segment {
 113         bus_addr_t      ds_addr;        /* DMA address */
 114         bus_size_t      ds_len;         /* length of transfer */
 115         bus_addr_t      _ds_vaddr;      /* virtual address, 0 if invalid */
 116 };
 117 typedef struct mips_bus_dma_segment     bus_dma_segment_t;
 118
 119 /*
 120  *      bus_dma_tag_t
 121  *
 122  *      A machine-dependent opaque type describing the implementation of
 123  *      DMA for a given bus.
 124  */
 125 struct mips_bus_dma_tag {
 126         void    *_cookie;               /* cookie used in the guts */
 127
 128         bus_addr_t _wbase;              /* DMA window base */
 129         bus_addr_t _physbase;           /* physical base of the window */
 130         bus_size_t _wsize;              /* size of the window */
 131
 132         /*
 133          * DMA mapping methods.
 134          */
 135         int     (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int,
 136                     bus_size_t, bus_size_t, int, bus_dmamap_t *);
 137         void    (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t);
 138         int     (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *,
 139                     bus_size_t, struct proc *, int);
 140         int     (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t,
 141                     struct mbuf *, int);
 142         int     (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t,
 143                     struct uio *, int);
 144         int     (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t,
 145                     bus_dma_segment_t *, int, bus_size_t, int);
 146         void    (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t);
 147         void    (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t,
 148                     bus_addr_t, bus_size_t, int);
 149
 150         /*
 151          * DMA memory utility functions.
 152          */
 153         int     (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t,
 154                     bus_size_t, bus_dma_segment_t *, int, int *, int);
 155         void    (*_dmamem_free)(bus_dma_tag_t,
 156                     bus_dma_segment_t *, int);
 157         int     (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *,
 158                     int, size_t, void **, int);
 159         void    (*_dmamem_unmap)(bus_dma_tag_t, void *, size_t);
 160         paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *,
 161                     int, off_t, int, int);
 162 };
 163
 164 #define bus_dmamap_create(t, s, n, m, b, f, p)                  \
 165         (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p))
 166 #define bus_dmamap_destroy(t, p)                                \
 167         (*(t)->_dmamap_destroy)((t), (p))
 168 #define bus_dmamap_load(t, m, b, s, p, f)                       \
 169         (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f))
 170 #define bus_dmamap_load_mbuf(t, m, b, f)                        \
 171         (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f))
 172 #define bus_dmamap_load_uio(t, m, u, f)                         \
 173         (*(t)->_dmamap_load_uio)((t), (m), (u), (f))
 174 #define bus_dmamap_load_raw(t, m, sg, n, s, f)                  \
 175         (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f))
 176 #define bus_dmamap_unload(t, p)                                 \
 177         (*(t)->_dmamap_unload)((t), (p))
 178 #define bus_dmamap_sync(t, p, o, l, ops)                        \
 179         (*(t)->_dmamap_sync)((t), (p), (o), (l), (ops))
 180
 181 #define bus_dmamem_alloc(t, s, a, b, sg, n, r, f)               \
 182         (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
 183 #define bus_dmamem_free(t, sg, n)                               \
 184         (*(t)->_dmamem_free)((t), (sg), (n))
 185 #define bus_dmamem_map(t, sg, n, s, k, f)                       \
 186         (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
 187 #define bus_dmamem_unmap(t, k, s)                               \
 188         (*(t)->_dmamem_unmap)((t), (k), (s))
 189 #define bus_dmamem_mmap(t, sg, n, o, p, f)                      \
 190         (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))
 191
 192 #define bus_dmatag_subregion(t, mna, mxa, nt, f) EOPNOTSUPP
 193 #define bus_dmatag_destroy(t)
 194
 195 /*
 196  *      bus_dmamap_t
 197  *
 198  *      Describes a DMA mapping.
 199  */
 200 struct mips_bus_dmamap {
 201         /*
 202          * PRIVATE MEMBERS: not for use my machine-independent code.
 203          */
 204         bus_size_t      _dm_size;       /* largest DMA transfer mappable */
 205         int             _dm_segcnt;     /* number of segs this map can map */
 206         bus_size_t      _dm_maxmaxsegsz; /* fixed largest possible segment */
 207         bus_size_t      _dm_boundary;   /* don't cross this */
 208         int             _dm_flags;      /* misc. flags */
 209         struct vmspace  *_dm_vmspace;   /* vmspace that owns the mapping */
 210
 211         /*
 212          * Private cookie to be used by the DMA back-end.
 213          */
 214         void            *_dm_cookie;
 215
 216         /*
 217          * PUBLIC MEMBERS: these are used by machine-independent code.
 218          */
 219         bus_size_t      dm_maxsegsz;    /* largest possible segment */
 220         bus_size_t      dm_mapsize;     /* size of the mapping */
 221         int             dm_nsegs;       /* # valid segments in mapping */
 222         bus_dma_segment_t dm_segs[1];   /* segments; variable length */
 223 };
 224
 225 #ifdef _MIPS_BUS_DMA_PRIVATE
 226 int     _bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t,
 227             bus_size_t, int, bus_dmamap_t *);
 228 void    _bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
 229
 230 int     _bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *, bus_size_t,
 231             struct proc *, int);
 232 int     _bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t, struct mbuf *, int);
 233 int     _bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t, struct uio *, int);
 234 int     _bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t, bus_dma_segment_t *,
 235             int, bus_size_t, int);
 236
 237 void    _bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
 238 void    _bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, bus_size_t,
 239             int);
 240
 241 int     _bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size,
 242             bus_size_t alignment, bus_size_t boundary,
 243             bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags);
 244 int     _bus_dmamem_alloc_range(bus_dma_tag_t tag, bus_size_t size,
 245             bus_size_t alignment, bus_size_t boundary,
 246             bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags,
 247             paddr_t low, paddr_t high);
 248 void    _bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs,
 249             int nsegs);
 250 int     _bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs,
 251             int nsegs, size_t size, void **kvap, int flags);
 252 void    _bus_dmamem_unmap(bus_dma_tag_t tag, void *kva,
 253             size_t size);
 254 paddr_t _bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs,
 255             int nsegs, off_t off, int prot, int flags);
 256 #endif /* _MIPS_BUS_DMA_PRIVATE */
 257
 258 #endif /* _KERNEL */
 259
 260 #endif /* _MIPS_BUS_DMA_H_ */