sys/arch/mips/sibyte/include/bcm1480_int.h

   1 /*  *********************************************************************
   2     *  BCM1280/BCM1480 Board Support Package
   3     *
   4     *  Interrupt Mapper definitions             File: bcm1480_int.h
   5     *
   6     *  This module contains constants for manipulating the
   7     *  BCM1255/BCM1280/BCM1455/BCM1480's interrupt mapper and
   8     *  definitions for the interrupt sources.
   9     *
  10     *  BCM1480 specification level: 1X55_1X80-UM100-D4 (11/24/03)
  11     *
  12     *********************************************************************
  13     *
  14     *  Copyright 2000,2001,2002,2003,2004
  15     *  Broadcom Corporation. All rights reserved.
  16     *
  17     *  This software is furnished under license and may be used and
  18     *  copied only in accordance with the following terms and
  19     *  conditions.  Subject to these conditions, you may download,
  20     *  copy, install, use, modify and distribute modified or unmodified
  21     *  copies of this software in source and/or binary form.  No title
  22     *  or ownership is transferred hereby.
  23     *
  24     *  1) Any source code used, modified or distributed must reproduce
  25     *     and retain this copyright notice and list of conditions
  26     *     as they appear in the source file.
  27     *
  28     *  2) No right is granted to use any trade name, trademark, or
  29     *     logo of Broadcom Corporation.  The "Broadcom Corporation"
  30     *     name may not be used to endorse or promote products derived
  31     *     from this software without the prior written permission of
  32     *     Broadcom Corporation.
  33     *
  34     *  3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR
  35     *     IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED
  36     *     WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
  37     *     PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT
  38     *     SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN
  39     *     PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT,
  40     *     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  41     *     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
  42     *     GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  43     *     BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
  44     *     OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  45     *     TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF
  46     *     THE POSSIBILITY OF SUCH DAMAGE.
  47     ********************************************************************* */
  48
  49
  50 #ifndef _BCM1480_INT_H
  51 #define _BCM1480_INT_H
  52
  53 #include "sb1250_defs.h"
  54
  55 /*  *********************************************************************
  56     *  Interrupt Mapper Constants
  57     ********************************************************************* */
  58
  59 /*
  60  * The interrupt mapper deals with 128-bit logical registers that are
  61  * implemented as pairs of 64-bit registers, with the "low" 64 bits in
  62  * a register that has an address 0x1000 higher(!) than the
  63  * corresponding "high" register.
  64  *
  65  * For appropriate registers, bit 0 of the "high" register is a
  66  * cascade bit that summarizes (as a bit-OR) the 64 bits of the "low"
  67  * register.
  68  */
  69
  70 /*
  71  * This entire file uses _BCM1480_ in all the symbols because it is
  72  * entirely BCM1480 specific.
  73  */
  74
  75 /*
  76  * Interrupt sources (Table 22)
  77  */
  78
  79 #define K_BCM1480_INT_SOURCES               128
  80
  81 #define _BCM1480_INT_HIGH(k)   (k)
  82 #define _BCM1480_INT_LOW(k)    ((k)+64)
  83
  84 #define K_BCM1480_INT_ADDR_TRAP             _BCM1480_INT_HIGH(1)
  85 #define K_BCM1480_INT_GPIO_0                _BCM1480_INT_HIGH(4)
  86 #define K_BCM1480_INT_GPIO_1                _BCM1480_INT_HIGH(5)
  87 #define K_BCM1480_INT_GPIO_2                _BCM1480_INT_HIGH(6)
  88 #define K_BCM1480_INT_GPIO_3                _BCM1480_INT_HIGH(7)
  89 #define K_BCM1480_INT_PCI_INTA              _BCM1480_INT_HIGH(8)
  90 #define K_BCM1480_INT_PCI_INTB              _BCM1480_INT_HIGH(9)
  91 #define K_BCM1480_INT_PCI_INTC              _BCM1480_INT_HIGH(10)
  92 #define K_BCM1480_INT_PCI_INTD              _BCM1480_INT_HIGH(11)
  93 #define K_BCM1480_INT_CYCLE_CP0             _BCM1480_INT_HIGH(12)
  94 #define K_BCM1480_INT_CYCLE_CP1             _BCM1480_INT_HIGH(13)
  95 #define K_BCM1480_INT_CYCLE_CP2             _BCM1480_INT_HIGH(14)
  96 #define K_BCM1480_INT_CYCLE_CP3             _BCM1480_INT_HIGH(15)
  97 #define K_BCM1480_INT_TIMER_0               _BCM1480_INT_HIGH(20)
  98 #define K_BCM1480_INT_TIMER_1               _BCM1480_INT_HIGH(21)
  99 #define K_BCM1480_INT_TIMER_2               _BCM1480_INT_HIGH(22)
 100 #define K_BCM1480_INT_TIMER_3               _BCM1480_INT_HIGH(23)
 101 #define K_BCM1480_INT_DM_CH_0               _BCM1480_INT_HIGH(28)
 102 #define K_BCM1480_INT_DM_CH_1               _BCM1480_INT_HIGH(29)
 103 #define K_BCM1480_INT_DM_CH_2               _BCM1480_INT_HIGH(30)
 104 #define K_BCM1480_INT_DM_CH_3               _BCM1480_INT_HIGH(31)
 105 #define K_BCM1480_INT_MAC_0                 _BCM1480_INT_HIGH(36)
 106 #define K_BCM1480_INT_MAC_0_CH1             _BCM1480_INT_HIGH(37)
 107 #define K_BCM1480_INT_MAC_1                 _BCM1480_INT_HIGH(38)
 108 #define K_BCM1480_INT_MAC_1_CH1             _BCM1480_INT_HIGH(39)
 109 #define K_BCM1480_INT_MAC_2                 _BCM1480_INT_HIGH(40)
 110 #define K_BCM1480_INT_MAC_2_CH1             _BCM1480_INT_HIGH(41)
 111 #define K_BCM1480_INT_MAC_3                 _BCM1480_INT_HIGH(42)
 112 #define K_BCM1480_INT_MAC_3_CH1             _BCM1480_INT_HIGH(43)
 113 #define K_BCM1480_INT_PMI_LOW               _BCM1480_INT_HIGH(52)
 114 #define K_BCM1480_INT_PMI_HIGH              _BCM1480_INT_HIGH(53)
 115 #define K_BCM1480_INT_PMO_LOW               _BCM1480_INT_HIGH(54)
 116 #define K_BCM1480_INT_PMO_HIGH              _BCM1480_INT_HIGH(55)
 117 #define K_BCM1480_INT_MBOX_0_0              _BCM1480_INT_HIGH(56)
 118 #define K_BCM1480_INT_MBOX_0_1              _BCM1480_INT_HIGH(57)
 119 #define K_BCM1480_INT_MBOX_0_2              _BCM1480_INT_HIGH(58)
 120 #define K_BCM1480_INT_MBOX_0_3              _BCM1480_INT_HIGH(59)
 121 #define K_BCM1480_INT_MBOX_1_0              _BCM1480_INT_HIGH(60)
 122 #define K_BCM1480_INT_MBOX_1_1              _BCM1480_INT_HIGH(61)
 123 #define K_BCM1480_INT_MBOX_1_2              _BCM1480_INT_HIGH(62)
 124 #define K_BCM1480_INT_MBOX_1_3              _BCM1480_INT_HIGH(63)
 125
 126 #define K_BCM1480_INT_BAD_ECC               _BCM1480_INT_LOW(1)
 127 #define K_BCM1480_INT_COR_ECC               _BCM1480_INT_LOW(2)
 128 #define K_BCM1480_INT_IO_BUS                _BCM1480_INT_LOW(3)
 129 #define K_BCM1480_INT_PERF_CNT              _BCM1480_INT_LOW(4)
 130 #define K_BCM1480_INT_SW_PERF_CNT           _BCM1480_INT_LOW(5)
 131 #define K_BCM1480_INT_TRACE_FREEZE          _BCM1480_INT_LOW(6)
 132 #define K_BCM1480_INT_SW_TRACE_FREEZE       _BCM1480_INT_LOW(7)
 133 #define K_BCM1480_INT_WATCHDOG_TIMER_0      _BCM1480_INT_LOW(8)
 134 #define K_BCM1480_INT_WATCHDOG_TIMER_1      _BCM1480_INT_LOW(9)
 135 #define K_BCM1480_INT_WATCHDOG_TIMER_2      _BCM1480_INT_LOW(10)
 136 #define K_BCM1480_INT_WATCHDOG_TIMER_3      _BCM1480_INT_LOW(11)
 137 #define K_BCM1480_INT_PCI_ERROR             _BCM1480_INT_LOW(16)
 138 #define K_BCM1480_INT_PCI_RESET             _BCM1480_INT_LOW(17)
 139 #define K_BCM1480_INT_NODE_CONTROLLER       _BCM1480_INT_LOW(18)
 140 #define K_BCM1480_INT_HOST_BRIDGE           _BCM1480_INT_LOW(19)
 141 #define K_BCM1480_INT_PORT_0_FATAL          _BCM1480_INT_LOW(20)
 142 #define K_BCM1480_INT_PORT_0_NONFATAL       _BCM1480_INT_LOW(21)
 143 #define K_BCM1480_INT_PORT_1_FATAL          _BCM1480_INT_LOW(22)
 144 #define K_BCM1480_INT_PORT_1_NONFATAL       _BCM1480_INT_LOW(23)
 145 #define K_BCM1480_INT_PORT_2_FATAL          _BCM1480_INT_LOW(24)
 146 #define K_BCM1480_INT_PORT_2_NONFATAL       _BCM1480_INT_LOW(25)
 147 #define K_BCM1480_INT_LDT_SMI               _BCM1480_INT_LOW(32)
 148 #define K_BCM1480_INT_LDT_NMI               _BCM1480_INT_LOW(33)
 149 #define K_BCM1480_INT_LDT_INIT              _BCM1480_INT_LOW(34)
 150 #define K_BCM1480_INT_LDT_STARTUP           _BCM1480_INT_LOW(35)
 151 #define K_BCM1480_INT_LDT_EXT               _BCM1480_INT_LOW(36)
 152 #define K_BCM1480_INT_SMB_0                 _BCM1480_INT_LOW(40)
 153 #define K_BCM1480_INT_SMB_1                 _BCM1480_INT_LOW(41)
 154 #define K_BCM1480_INT_PCMCIA                _BCM1480_INT_LOW(42)
 155 #define K_BCM1480_INT_UART_0                _BCM1480_INT_LOW(44)
 156 #define K_BCM1480_INT_UART_1                _BCM1480_INT_LOW(45)
 157 #define K_BCM1480_INT_UART_2                _BCM1480_INT_LOW(46)
 158 #define K_BCM1480_INT_UART_3                _BCM1480_INT_LOW(47)
 159 #define K_BCM1480_INT_GPIO_4                _BCM1480_INT_LOW(52)
 160 #define K_BCM1480_INT_GPIO_5                _BCM1480_INT_LOW(53)
 161 #define K_BCM1480_INT_GPIO_6                _BCM1480_INT_LOW(54)
 162 #define K_BCM1480_INT_GPIO_7                _BCM1480_INT_LOW(55)
 163 #define K_BCM1480_INT_GPIO_8                _BCM1480_INT_LOW(56)
 164 #define K_BCM1480_INT_GPIO_9                _BCM1480_INT_LOW(57)
 165 #define K_BCM1480_INT_GPIO_10               _BCM1480_INT_LOW(58)
 166 #define K_BCM1480_INT_GPIO_11               _BCM1480_INT_LOW(59)
 167 #define K_BCM1480_INT_GPIO_12               _BCM1480_INT_LOW(60)
 168 #define K_BCM1480_INT_GPIO_13               _BCM1480_INT_LOW(61)
 169 #define K_BCM1480_INT_GPIO_14               _BCM1480_INT_LOW(62)
 170 #define K_BCM1480_INT_GPIO_15               _BCM1480_INT_LOW(63)
 171
 172 /*
 173  * Mask values for each interrupt
 174  */
 175
 176 #define _BCM1480_INT_MASK(w,n)              _SB_MAKEMASK(w,((n) & 0x3F))
 177 #define _BCM1480_INT_MASK1(n)               _SB_MAKEMASK1(((n) & 0x3F))
 178 #define _BCM1480_INT_OFFSET(n)              (((n) & 0x40) << 6)
 179
 180 #define M_BCM1480_INT_CASCADE               _BCM1480_INT_MASK1(_BCM1480_INT_HIGH(0))
 181
 182 #define M_BCM1480_INT_ADDR_TRAP             _BCM1480_INT_MASK1(K_BCM1480_INT_ADDR_TRAP)
 183 #define M_BCM1480_INT_GPIO_0                _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_0)
 184 #define M_BCM1480_INT_GPIO_1                _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_1)
 185 #define M_BCM1480_INT_GPIO_2                _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_2)
 186 #define M_BCM1480_INT_GPIO_3                _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_3)
 187 #define M_BCM1480_INT_PCI_INTA              _BCM1480_INT_MASK1(K_BCM1480_INT_PCI_INTA)
 188 #define M_BCM1480_INT_PCI_INTB              _BCM1480_INT_MASK1(K_BCM1480_INT_PCI_INTB)
 189 #define M_BCM1480_INT_PCI_INTC              _BCM1480_INT_MASK1(K_BCM1480_INT_PCI_INTC)
 190 #define M_BCM1480_INT_PCI_INTD              _BCM1480_INT_MASK1(K_BCM1480_INT_PCI_INTD)
 191 #define M_BCM1480_INT_CYCLE_CP0             _BCM1480_INT_MASK1(K_BCM1480_INT_CYCLE_CP0)
 192 #define M_BCM1480_INT_CYCLE_CP1             _BCM1480_INT_MASK1(K_BCM1480_INT_CYCLE_CP1)
 193 #define M_BCM1480_INT_CYCLE_CP2             _BCM1480_INT_MASK1(K_BCM1480_INT_CYCLE_CP2)
 194 #define M_BCM1480_INT_CYCLE_CP3             _BCM1480_INT_MASK1(K_BCM1480_INT_CYCLE_CP3)
 195 #define M_BCM1480_INT_TIMER_0               _BCM1480_INT_MASK1(K_BCM1480_INT_TIMER_0)
 196 #define M_BCM1480_INT_TIMER_1               _BCM1480_INT_MASK1(K_BCM1480_INT_TIMER_1)
 197 #define M_BCM1480_INT_TIMER_2               _BCM1480_INT_MASK1(K_BCM1480_INT_TIMER_2)
 198 #define M_BCM1480_INT_TIMER_3               _BCM1480_INT_MASK1(K_BCM1480_INT_TIMER_3)
 199 #define M_BCM1480_INT_DM_CH_0               _BCM1480_INT_MASK1(K_BCM1480_INT_DM_CH_0)
 200 #define M_BCM1480_INT_DM_CH_1               _BCM1480_INT_MASK1(K_BCM1480_INT_DM_CH_1)
 201 #define M_BCM1480_INT_DM_CH_2               _BCM1480_INT_MASK1(K_BCM1480_INT_DM_CH_2)
 202 #define M_BCM1480_INT_DM_CH_3               _BCM1480_INT_MASK1(K_BCM1480_INT_DM_CH_3)
 203 #define M_BCM1480_INT_MAC_0                 _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_0)
 204 #define M_BCM1480_INT_MAC_0_CH1             _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_0_CH1)
 205 #define M_BCM1480_INT_MAC_1                 _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_1)
 206 #define M_BCM1480_INT_MAC_1_CH1             _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_1_CH1)
 207 #define M_BCM1480_INT_MAC_2                 _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_2)
 208 #define M_BCM1480_INT_MAC_2_CH1             _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_2_CH1)
 209 #define M_BCM1480_INT_MAC_3                 _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_3)
 210 #define M_BCM1480_INT_MAC_3_CH1             _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_3_CH1)
 211 #define M_BCM1480_INT_PMI_LOW               _BCM1480_INT_MASK1(K_BCM1480_INT_PMI_LOW)
 212 #define M_BCM1480_INT_PMI_HIGH              _BCM1480_INT_MASK1(K_BCM1480_INT_PMI_HIGH)
 213 #define M_BCM1480_INT_PMO_LOW               _BCM1480_INT_MASK1(K_BCM1480_INT_PMO_LOW)
 214 #define M_BCM1480_INT_PMO_HIGH              _BCM1480_INT_MASK1(K_BCM1480_INT_PMO_HIGH)
 215 #define M_BCM1480_INT_MBOX_ALL              _BCM1480_INT_MASK(8,K_BCM1480_INT_MBOX_0_0)
 216 #define M_BCM1480_INT_MBOX_0_0              _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_0_0)
 217 #define M_BCM1480_INT_MBOX_0_1              _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_0_1)
 218 #define M_BCM1480_INT_MBOX_0_2              _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_0_2)
 219 #define M_BCM1480_INT_MBOX_0_3              _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_0_3)
 220 #define M_BCM1480_INT_MBOX_1_0              _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_1_0)
 221 #define M_BCM1480_INT_MBOX_1_1              _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_1_1)
 222 #define M_BCM1480_INT_MBOX_1_2              _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_1_2)
 223 #define M_BCM1480_INT_MBOX_1_3              _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_1_3)
 224 #define M_BCM1480_INT_BAD_ECC               _BCM1480_INT_MASK1(K_BCM1480_INT_BAD_ECC)
 225 #define M_BCM1480_INT_COR_ECC               _BCM1480_INT_MASK1(K_BCM1480_INT_COR_ECC)
 226 #define M_BCM1480_INT_IO_BUS                _BCM1480_INT_MASK1(K_BCM1480_INT_IO_BUS)
 227 #define M_BCM1480_INT_PERF_CNT              _BCM1480_INT_MASK1(K_BCM1480_INT_PERF_CNT)
 228 #define M_BCM1480_INT_SW_PERF_CNT           _BCM1480_INT_MASK1(K_BCM1480_INT_SW_PERF_CNT)
 229 #define M_BCM1480_INT_TRACE_FREEZE          _BCM1480_INT_MASK1(K_BCM1480_INT_TRACE_FREEZE)
 230 #define M_BCM1480_INT_SW_TRACE_FREEZE       _BCM1480_INT_MASK1(K_BCM1480_INT_SW_TRACE_FREEZE)
 231 #define M_BCM1480_INT_WATCHDOG_TIMER_0      _BCM1480_INT_MASK1(K_BCM1480_INT_WATCHDOG_TIMER_0)
 232 #define M_BCM1480_INT_WATCHDOG_TIMER_1      _BCM1480_INT_MASK1(K_BCM1480_INT_WATCHDOG_TIMER_1)
 233 #define M_BCM1480_INT_WATCHDOG_TIMER_2      _BCM1480_INT_MASK1(K_BCM1480_INT_WATCHDOG_TIMER_2)
 234 #define M_BCM1480_INT_WATCHDOG_TIMER_3      _BCM1480_INT_MASK1(K_BCM1480_INT_WATCHDOG_TIMER_3)
 235 #define M_BCM1480_INT_PCI_ERROR             _BCM1480_INT_MASK1(K_BCM1480_INT_PCI_ERROR)
 236 #define M_BCM1480_INT_PCI_RESET             _BCM1480_INT_MASK1(K_BCM1480_INT_PCI_RESET)
 237 #define M_BCM1480_INT_NODE_CONTROLLER       _BCM1480_INT_MASK1(K_BCM1480_INT_NODE_CONTROLLER)
 238 #define M_BCM1480_INT_HOST_BRIDGE           _BCM1480_INT_MASK1(K_BCM1480_INT_HOST_BRIDGE)
 239 #define M_BCM1480_INT_PORT_0_FATAL          _BCM1480_INT_MASK1(K_BCM1480_INT_PORT_0_FATAL)
 240 #define M_BCM1480_INT_PORT_0_NONFATAL       _BCM1480_INT_MASK1(K_BCM1480_INT_PORT_0_NONFATAL)
 241 #define M_BCM1480_INT_PORT_1_FATAL          _BCM1480_INT_MASK1(K_BCM1480_INT_PORT_1_FATAL)
 242 #define M_BCM1480_INT_PORT_1_NONFATAL       _BCM1480_INT_MASK1(K_BCM1480_INT_PORT_1_NONFATAL)
 243 #define M_BCM1480_INT_PORT_2_FATAL          _BCM1480_INT_MASK1(K_BCM1480_INT_PORT_2_FATAL)
 244 #define M_BCM1480_INT_PORT_2_NONFATAL       _BCM1480_INT_MASK1(K_BCM1480_INT_PORT_2_NONFATAL)
 245 #define M_BCM1480_INT_LDT_SMI               _BCM1480_INT_MASK1(K_BCM1480_INT_LDT_SMI)
 246 #define M_BCM1480_INT_LDT_NMI               _BCM1480_INT_MASK1(K_BCM1480_INT_LDT_NMI)
 247 #define M_BCM1480_INT_LDT_INIT              _BCM1480_INT_MASK1(K_BCM1480_INT_LDT_INIT)
 248 #define M_BCM1480_INT_LDT_STARTUP           _BCM1480_INT_MASK1(K_BCM1480_INT_LDT_STARTUP)
 249 #define M_BCM1480_INT_LDT_EXT               _BCM1480_INT_MASK1(K_BCM1480_INT_LDT_EXT)
 250 #define M_BCM1480_INT_SMB_0                 _BCM1480_INT_MASK1(K_BCM1480_INT_SMB_0)
 251 #define M_BCM1480_INT_SMB_1                 _BCM1480_INT_MASK1(K_BCM1480_INT_SMB_1)
 252 #define M_BCM1480_INT_PCMCIA                _BCM1480_INT_MASK1(K_BCM1480_INT_PCMCIA)
 253 #define M_BCM1480_INT_UART_0                _BCM1480_INT_MASK1(K_BCM1480_INT_UART_0)
 254 #define M_BCM1480_INT_UART_1                _BCM1480_INT_MASK1(K_BCM1480_INT_UART_1)
 255 #define M_BCM1480_INT_UART_2                _BCM1480_INT_MASK1(K_BCM1480_INT_UART_2)
 256 #define M_BCM1480_INT_UART_3                _BCM1480_INT_MASK1(K_BCM1480_INT_UART_3)
 257 #define M_BCM1480_INT_GPIO_4                _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_4)
 258 #define M_BCM1480_INT_GPIO_5                _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_5)
 259 #define M_BCM1480_INT_GPIO_6                _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_6)
 260 #define M_BCM1480_INT_GPIO_7                _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_7)
 261 #define M_BCM1480_INT_GPIO_8                _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_8)
 262 #define M_BCM1480_INT_GPIO_9                _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_9)
 263 #define M_BCM1480_INT_GPIO_10               _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_10)
 264 #define M_BCM1480_INT_GPIO_11               _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_11)
 265 #define M_BCM1480_INT_GPIO_12               _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_12)
 266 #define M_BCM1480_INT_GPIO_13               _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_13)
 267 #define M_BCM1480_INT_GPIO_14               _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_14)
 268 #define M_BCM1480_INT_GPIO_15               _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_15)
 269
 270 /*
 271  * Interrupt mappings (Table 18)
 272  */
 273
 274 #define K_BCM1480_INT_MAP_I0    0               /* interrupt pins on processor */
 275 #define K_BCM1480_INT_MAP_I1    1
 276 #define K_BCM1480_INT_MAP_I2    2
 277 #define K_BCM1480_INT_MAP_I3    3
 278 #define K_BCM1480_INT_MAP_I4    4
 279 #define K_BCM1480_INT_MAP_I5    5
 280 #define K_BCM1480_INT_MAP_NMI   6               /* nonmaskable */
 281 #define K_BCM1480_INT_MAP_DINT  7               /* debug interrupt */
 282
 283 /*
 284  * Interrupt LDT Set Register (Table 19)
 285  */
 286
 287 #define S_BCM1480_INT_HT_INTMSG             0
 288 #define M_BCM1480_INT_HT_INTMSG             _SB_MAKEMASK(3,S_BCM1480_INT_HT_INTMSG)
 289 #define V_BCM1480_INT_HT_INTMSG(x)          _SB_MAKEVALUE(x,S_BCM1480_INT_HT_INTMSG)
 290 #define G_BCM1480_INT_HT_INTMSG(x)          _SB_GETVALUE(x,S_BCM1480_INT_HT_INTMSG,M_BCM1480_INT_HT_INTMSG)
 291
 292 #define K_BCM1480_INT_HT_INTMSG_FIXED       0
 293 #define K_BCM1480_INT_HT_INTMSG_ARBITRATED  1
 294 #define K_BCM1480_INT_HT_INTMSG_SMI         2
 295 #define K_BCM1480_INT_HT_INTMSG_NMI         3
 296 #define K_BCM1480_INT_HT_INTMSG_INIT        4
 297 #define K_BCM1480_INT_HT_INTMSG_STARTUP     5
 298 #define K_BCM1480_INT_HT_INTMSG_EXTINT      6
 299 #define K_BCM1480_INT_HT_INTMSG_RESERVED    7
 300
 301 #define M_BCM1480_INT_HT_TRIGGERMODE        _SB_MAKEMASK1(3)
 302 #define V_BCM1480_INT_HT_EDGETRIGGER        0
 303 #define V_BCM1480_INT_HT_LEVELTRIGGER       M_BCM1480_INT_HT_TRIGGERMODE
 304
 305 #define M_BCM1480_INT_HT_DESTMODE           _SB_MAKEMASK1(4)
 306 #define V_BCM1480_INT_HT_PHYSICALDEST       0
 307 #define V_BCM1480_INT_HT_LOGICALDEST        M_BCM1480_INT_HT_DESTMODE
 308
 309 #define S_BCM1480_INT_HT_INTDEST            5
 310 #define M_BCM1480_INT_HT_INTDEST            _SB_MAKEMASK(8,S_BCM1480_INT_HT_INTDEST)
 311 #define V_BCM1480_INT_HT_INTDEST(x)         _SB_MAKEVALUE(x,S_BCM1480_INT_HT_INTDEST)
 312 #define G_BCM1480_INT_HT_INTDEST(x)         _SB_GETVALUE(x,S_BCM1480_INT_HT_INTDEST,M_BCM1480_INT_HT_INTDEST)
 313
 314 #define S_BCM1480_INT_HT_VECTOR             13
 315 #define M_BCM1480_INT_HT_VECTOR             _SB_MAKEMASK(8,S_BCM1480_INT_HT_VECTOR)
 316 #define V_BCM1480_INT_HT_VECTOR(x)          _SB_MAKEVALUE(x,S_BCM1480_INT_HT_VECTOR)
 317 #define G_BCM1480_INT_HT_VECTOR(x)          _SB_GETVALUE(x,S_BCM1480_INT_HT_VECTOR,M_BCM1480_INT_HT_VECTOR)
 318
 319 /*
 320  * Vector prefix (Table 4-7)
 321  */
 322
 323 #define M_BCM1480_HTVECT_RAISE_INTLDT_HIGH  0x00
 324 #define M_BCM1480_HTVECT_RAISE_MBOX_0       0x40
 325 #define M_BCM1480_HTVECT_RAISE_INTLDT_LO    0x80
 326 #define M_BCM1480_HTVECT_RAISE_MBOX_1       0xC0
 327
 328 #endif /* _BCM1480_INT_H */